OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fp/] [implementation/] [mmix/] [primesx.mmconfig] - Blame information for rev 320

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 15 hellwig
% configuration for primes test -- still in preparation
2
memaddresstime 3
3
memreadtime 10 memwritetime 10
4
membusbytes 16
5
%branchpredictbits 2
6
%branchaddressbits 1
7
%branchhistorybits 1
8
%branchdualbits 1
9
memchunksmax 4
10
hashprime 5
11
Scache blocksize 64
12
Scache setsize 512
13
Scache associativity 4 pseudolru
14
Scache accesstime 2
15
Dcache blocksize 32
16
Dcache setsize 256
17
Icache blocksize 32
18
Icache setsize 256
19
Icache victimsize 2
20
unit ALU1 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
21
unit ALU2 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
22
unit ALU3 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
23
unit ALU4 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
24
unit LSU1 00000000000000000000000000000000fffffffcfffffffc0000000000000000
25
unit LSU2 00000000000000000000000000000000fffffffcfffffffc0000000000000000
26
unit LSU3 00000000000000000000000000000000fffffffcfffffffc0000000000000000
27
unit MUL1 000080f000000000000000000000000000000000000000000000000000000000
28
unit DIV1 00000c0f00000000000000000000000000000000000000000000000000000000
29
unit FPU1 7fff730000000000000000000000000000000000000000000000000000000000
30
dispatchmax 3
31
commitmax 3
32
fetchmax 4
33
memslots 4
34
renameregs 10
35
reorderbuffer 20
36
Dcache writeallocate 1
37
Scache writeallocate 1
38
Dcache writeback 1
39
Scache writeback 1
40
Dcache ports 2
41
DTcache ports 2
42
writebuffer 4
43
writeholdingtime 5
44
div 10 10 10 10 10 10

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.