OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] [experiments/] [memctrl/] [fpga/] [README] - Blame information for rev 320

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 316 hellwig
Here are two implementations of a memory controller, intended
2 317 hellwig
to be used on a real FPGA. The names of the subdirectories are
3
the same as the corresponding ones in ../sim. memctrl-0 does
4
not exist here, because the underlying RAM model cannot be
5
synthesized on the real FPGA. memctrl-1 is a memory controller
6
for SDRAM running at 100 MHz, where test circuit uses the same
7
clock rate. memctrl-2 is very similar to this, but runs the
8
test circuit at 50 MHz. For details see the README files in
9
the corresponding subdirectories of ../sim.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.