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[/] [eco32/] [trunk/] [fpga/] [experiments/] [memctrl/] [sim/] [README] - Blame information for rev 315

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Here are three implementations of a memory controller, all
three intended to be used in simulations. memctrl-0 provides
a very simple underlying RAM model (word access, constant
access delays for read and write). memctrl-1 utilizes a more
realistic SDRAM model (provided by Samsung Electronics).
memctrl-2 is very similar to memctrl-1, but clocks the test
circuit with half the frequency (50 MHz) of the SDRAM's
(and SDRAM controller's) clock (100 MHz). For details see
the README files in the subdirectories.

Line No.	Rev	Author	Line
1	315	hellwig	`Here are three implementations of a memory controller, all`
2			`three intended to be used in simulations. memctrl-0 provides`
3			`a very simple underlying RAM model (word access, constant`
4			`access delays for read and write). memctrl-1 utilizes a more`
5			`realistic SDRAM model (provided by Samsung Electronics).`
6			`memctrl-2 is very similar to memctrl-1, but clocks the test`
7			`circuit with half the frequency (50 MHz) of the SDRAM's`
8			`(and SDRAM controller's) clock (100 MHz). For details see`
9			`the README files in the subdirectories.`

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Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] [experiments/] [memctrl/] [sim/] [README] - Blame information for rev 315