URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [fpga/] [experiments/] [memdelay/] [README] - Blame information for rev 297

Line No.	Rev	Author	Line
1	297	hellwig	`This circuit implements a RAM simulation with adjustable`
2			`read/write delays. The test FSM allows verifying both`
3			`access times.`