Subversion Repositories eco32

#

# eco32.ucf -- ECO32 user constraints for S3E starter kit board

#

#

# clock and reset

#

NET "clk_in"

    PERIOD = 20.0ns HIGH 40%;

NET "clk_in"

    LOC = "C9"  | IOSTANDARD = LVCMOS33;

NET "rst_in"

    LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN;

#

# DDR SDRAM

#

NET "sdram_ck_p"

    LOC = "J5"  | IOSTANDARD = SSTL2_I;

NET "sdram_ck_n"

    LOC = "J4"  | IOSTANDARD = SSTL2_I;

NET "sdram_cke"

    LOC = "K3"  | IOSTANDARD = SSTL2_I;

NET "sdram_cs_n"

    LOC = "K4"  | IOSTANDARD = SSTL2_I;

NET "sdram_ras_n"

    LOC = "C1"  | IOSTANDARD = SSTL2_I;

NET "sdram_cas_n"

    LOC = "C2"  | IOSTANDARD = SSTL2_I;

NET "sdram_we_n"

    LOC = "D1"  | IOSTANDARD = SSTL2_I;

NET "sdram_ba<1>"

    LOC = "K6"  | IOSTANDARD = SSTL2_I;

NET "sdram_ba<0>"

    LOC = "K5"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<12>"

    LOC = "P2"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<11>"

    LOC = "N5"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<10>"

    LOC = "T2"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<9>"

    LOC = "N4"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<8>"

    LOC = "H2"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<7>"

    LOC = "H1"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<6>"

    LOC = "H3"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<5>"

    LOC = "H4"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<4>"

    LOC = "F4"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<3>"

    LOC = "P1"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<2>"

    LOC = "R2"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<1>"

    LOC = "R3"  | IOSTANDARD = SSTL2_I;

NET "sdram_a<0>"

    LOC = "T1"  | IOSTANDARD = SSTL2_I;

NET "sdram_udm"

    LOC = "J1"  | IOSTANDARD = SSTL2_I;

NET "sdram_ldm"

    LOC = "J2"  | IOSTANDARD = SSTL2_I;

NET "sdram_udqs"

    LOC = "G3"  | IOSTANDARD = SSTL2_I;

NET "sdram_ldqs"

    LOC = "L6"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<15>"

    LOC = "H5"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<14>"

    LOC = "H6"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<13>"

    LOC = "G5"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<12>"

    LOC = "G6"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<11>"

    LOC = "F2"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<10>"

    LOC = "F1"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<9>"

    LOC = "E1"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<8>"

    LOC = "E2"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<7>"

    LOC = "M6"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<6>"

    LOC = "M5"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<5>"

    LOC = "M4"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<4>"

    LOC = "M3"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<3>"

    LOC = "L4"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<2>"

    LOC = "L3"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<1>"

    LOC = "L1"  | IOSTANDARD = SSTL2_I;

NET "sdram_dq<0>"

    LOC = "L2"  | IOSTANDARD = SSTL2_I;

#

# prohibit VREF pins

#

CONFIG PROHIBIT = D2;

CONFIG PROHIBIT = G4;

CONFIG PROHIBIT = J6;

CONFIG PROHIBIT = L5;

CONFIG PROHIBIT = R4;

#

# parallel NOR flash ROM

#

NET "flash_ce_n"

    LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_oe_n"

    LOC = "C18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_we_n"

    LOC = "D17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_byte_n"

    LOC = "C17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<23>"

    LOC = "N11" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<22>"

    LOC = "V12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<21>"

    LOC = "V13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<20>"

    LOC = "T12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<19>"

    LOC = "V15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<18>"

    LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<17>"

    LOC = "T16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<16>"

    LOC = "U18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<15>"

    LOC = "T17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<14>"

    LOC = "R18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<13>"

    LOC = "T18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<12>"

    LOC = "L16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<11>"

    LOC = "L15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<10>"

    LOC = "K13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<9>"

    LOC = "K12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<8>"

    LOC = "K15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<7>"

    LOC = "K14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<6>"

    LOC = "J17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<5>"

    LOC = "J16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<4>"

    LOC = "J15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<3>"

    LOC = "J14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<2>"

    LOC = "J12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<1>"

    LOC = "J13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_a<0>"

    LOC = "H17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<15>"

    LOC = "T8"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<14>"

    LOC = "R8"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<13>"

    LOC = "P6"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<12>"

    LOC = "M16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<11>"

    LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<10>"

    LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<9>"

    LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<8>"

    LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<7>"

    LOC = "N9"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<6>"

    LOC = "M9"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<5>"

    LOC = "R9"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<4>"

    LOC = "U9"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<3>"

    LOC = "V9"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<2>"

    LOC = "R10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<1>"

    LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "flash_d<0>"

    LOC = "N10" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

#

# VGA display

#

NET "vga_hsync"

    LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;

NET "vga_vsync"

    LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;

NET "vga_r"

    LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;

NET "vga_g"

    LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;

NET "vga_b"

    LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST;

#

# keyboard

#

NET "ps2_clk"

    LOC = "G14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;

NET "ps2_data"

    LOC = "G13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;

#

# serial line 0

#

NET "rs232_0_rxd"

    LOC = "R7"  | IOSTANDARD = LVTTL;

NET "rs232_0_txd"

    LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

#

# serial line 1

#

NET "rs232_1_rxd"

    LOC = "U8"  | IOSTANDARD = LVTTL;

NET "rs232_1_txd"

    LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

#

# SPI bus controller

#

NET "spi_sck"

    LOC = "U16" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

NET "spi_mosi"

    LOC = "T4"  | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

NET "dac_cs_n"

    LOC = "N8"  | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;

NET "dac_clr_n"

    LOC = "P8"  | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW;

NET "amp_cs_n"

    LOC = "N7"  | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

NET "amp_shdn"

    LOC = "P7"  | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

NET "ad_conv"

    LOC = "P11" | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

#

# board I/O

#

NET "sw<3>"

    LOC = "N17" | IOSTANDARD = LVTTL | PULLUP;

NET "sw<2>"

    LOC = "H18" | IOSTANDARD = LVTTL | PULLUP;

NET "sw<1>"

    LOC = "L14" | IOSTANDARD = LVTTL | PULLUP;

NET "sw<0>"

    LOC = "L13" | IOSTANDARD = LVTTL | PULLUP;

NET "led<7>"

    LOC = "F9"  | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<6>"

    LOC = "E9"  | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<5>"

    LOC = "D11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<4>"

    LOC = "C11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<3>"

    LOC = "F11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<2>"

    LOC = "E11" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<1>"

    LOC = "E12" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "led<0>"

    LOC = "F12" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW;

NET "lcd_e"

    LOC = "M18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "lcd_rw"

    LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "lcd_rs"

    LOC = "L18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;

NET "spi_ss_b"

    LOC = "U3"  | IOSTANDARD = LVCMOS33 | DRIVE = 6 | SLEW = SLOW;

NET "fpga_init_b"

    LOC = "T3"  | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW;