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[/] [eco32/] [trunk/] [fpga/] [mc/] [src/] [ser/] [rcvbuf.v] - Blame information for rev 314

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Line No. Rev Author Line
1 117 hellwig
//
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// rcvbuf.v -- serial line receiver buffer
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//
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6 290 hellwig
`timescale 1ns/10ps
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`default_nettype none
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10 27 hellwig
module rcvbuf(clk, reset, read, ready, data_out, serial_in);
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    input clk;
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    input reset;
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    input read;
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    output reg ready;
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    output reg [7:0] data_out;
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    input serial_in;
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  wire full;
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  wire [7:0] parallel_out;
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21 290 hellwig
  rcv rcv_1(clk, reset, full, parallel_out, serial_in);
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  always @(posedge clk) begin
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    if (reset == 1) begin
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      ready <= 0;
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    end else begin
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      if (full == 1) begin
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        data_out <= parallel_out;
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      end
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      if (full == 1 || read == 1) begin
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        ready <= full;
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      end
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    end
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  end
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endmodule

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