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[/] [eco32/] [trunk/] [lcc/] [src/] [x86linux.md] - Blame information for rev 130

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Line No. Rev Author Line
1 4 hellwig
%{
2
/* x86/linux lburg spec. Derived from x86.md by
3
Marcos Ramirez 
4
Horst von Brand 
5
Jacob Navia 
6
*/
7
enum { EAX=0, ECX=1, EDX=2, EBX=3, ESI=6, EDI=7 };
8
#include "c.h"
9
#define NODEPTR_TYPE Node
10
#define OP_LABEL(p) ((p)->op)
11
#define LEFT_CHILD(p) ((p)->kids[0])
12
#define RIGHT_CHILD(p) ((p)->kids[1])
13
#define STATE_LABEL(p) ((p)->x.state)
14
extern int ckstack(Node, int);
15
extern int memop(Node);
16
extern int sametree(Node, Node);
17
static Symbol charreg[32], shortreg[32], intreg[32];
18
static Symbol fltreg[32];
19
 
20
static Symbol charregw, shortregw, intregw, fltregw;
21
 
22
static int cseg;
23
 
24
static Symbol quo, rem;
25
 
26
extern char *stabprefix;
27
extern void stabblock(int, int, Symbol*);
28
extern void stabend(Coordinate *, Symbol, Coordinate **, Symbol *, Symbol *);
29
extern void stabfend(Symbol, int);
30
extern void stabinit(char *, int, char *[]);
31
extern void stabline(Coordinate *);
32
extern void stabsym(Symbol);
33
extern void stabtype(Symbol);
34
 
35
static int pflag = 0;
36
static char rcsid[] = "$Id: x86linux.md,v 1.1 2002/08/28 23:12:48 drh Exp $";
37
 
38
#define hasargs(p) (p->syms[0] && p->syms[0]->u.c.v.i > 0 ? 0 : LBURG_MAX)
39
%}
40
%start stmt
41
%term CNSTF4=4113
42
%term CNSTF8=8209
43
%term CNSTF16=16401
44
%term CNSTI1=1045
45
%term CNSTI2=2069
46
%term CNSTI4=4117
47
%term CNSTI8=8213
48
%term CNSTP4=4119
49
%term CNSTP8=8215
50
%term CNSTU1=1046
51
%term CNSTU2=2070
52
%term CNSTU4=4118
53
%term CNSTU8=8214
54
 
55
%term ARGB=41
56
%term ARGF4=4129
57
%term ARGF8=8225
58
%term ARGF16=16417
59
%term ARGI4=4133
60
%term ARGI8=8229
61
%term ARGP4=4135
62
%term ARGP8=8231
63
%term ARGU4=4134
64
%term ARGU8=8230
65
 
66
%term ASGNB=57
67
%term ASGNF4=4145
68
%term ASGNF8=8241
69
%term ASGNF16=16433
70
%term ASGNI1=1077
71
%term ASGNI2=2101
72
%term ASGNI4=4149
73
%term ASGNI8=8245
74
%term ASGNP4=4151
75
%term ASGNP8=8247
76
%term ASGNU1=1078
77
%term ASGNU2=2102
78
%term ASGNU4=4150
79
%term ASGNU8=8246
80
 
81
%term INDIRB=73
82
%term INDIRF4=4161
83
%term INDIRF8=8257
84
%term INDIRF16=16449
85
%term INDIRI1=1093
86
%term INDIRI2=2117
87
%term INDIRI4=4165
88
%term INDIRI8=8261
89
%term INDIRP4=4167
90
%term INDIRP8=8263
91
%term INDIRU1=1094
92
%term INDIRU2=2118
93
%term INDIRU4=4166
94
%term INDIRU8=8262
95
 
96
%term CVFF4=4209
97
%term CVFF8=8305
98
%term CVFF16=16497
99
%term CVFI4=4213
100
%term CVFI8=8309
101
 
102
%term CVIF4=4225
103
%term CVIF8=8321
104
%term CVIF16=16513
105
%term CVII1=1157
106
%term CVII2=2181
107
%term CVII4=4229
108
%term CVII8=8325
109
%term CVIU1=1158
110
%term CVIU2=2182
111
%term CVIU4=4230
112
%term CVIU8=8326
113
 
114
%term CVPP4=4247
115
%term CVPP8=8343
116
%term CVPP16=16535
117
%term CVPU4=4246
118
%term CVPU8=8342
119
 
120
%term CVUI1=1205
121
%term CVUI2=2229
122
%term CVUI4=4277
123
%term CVUI8=8373
124
%term CVUP4=4279
125
%term CVUP8=8375
126
%term CVUP16=16567
127
%term CVUU1=1206
128
%term CVUU2=2230
129
%term CVUU4=4278
130
%term CVUU8=8374
131
 
132
%term NEGF4=4289
133
%term NEGF8=8385
134
%term NEGF16=16577
135
%term NEGI4=4293
136
%term NEGI8=8389
137
 
138
%term CALLB=217
139
%term CALLF4=4305
140
%term CALLF8=8401
141
%term CALLF16=16593
142
%term CALLI4=4309
143
%term CALLI8=8405
144
%term CALLP4=4311
145
%term CALLP8=8407
146
%term CALLU4=4310
147
%term CALLU8=8406
148
%term CALLV=216
149
 
150
%term RETF4=4337
151
%term RETF8=8433
152
%term RETF16=16625
153
%term RETI4=4341
154
%term RETI8=8437
155
%term RETP4=4343
156
%term RETP8=8439
157
%term RETU4=4342
158
%term RETU8=8438
159
%term RETV=248
160
 
161
%term ADDRGP4=4359
162
%term ADDRGP8=8455
163
 
164
%term ADDRFP4=4375
165
%term ADDRFP8=8471
166
 
167
%term ADDRLP4=4391
168
%term ADDRLP8=8487
169
 
170
%term ADDF4=4401
171
%term ADDF8=8497
172
%term ADDF16=16689
173
%term ADDI4=4405
174
%term ADDI8=8501
175
%term ADDP4=4407
176
%term ADDP8=8503
177
%term ADDU4=4406
178
%term ADDU8=8502
179
 
180
%term SUBF4=4417
181
%term SUBF8=8513
182
%term SUBF16=16705
183
%term SUBI4=4421
184
%term SUBI8=8517
185
%term SUBP4=4423
186
%term SUBP8=8519
187
%term SUBU4=4422
188
%term SUBU8=8518
189
 
190
%term LSHI4=4437
191
%term LSHI8=8533
192
%term LSHU4=4438
193
%term LSHU8=8534
194
 
195
%term MODI4=4453
196
%term MODI8=8549
197
%term MODU4=4454
198
%term MODU8=8550
199
 
200
%term RSHI4=4469
201
%term RSHI8=8565
202
%term RSHU4=4470
203
%term RSHU8=8566
204
 
205
%term BANDI4=4485
206
%term BANDI8=8581
207
%term BANDU4=4486
208
%term BANDU8=8582
209
 
210
%term BCOMI4=4501
211
%term BCOMI8=8597
212
%term BCOMU4=4502
213
%term BCOMU8=8598
214
 
215
%term BORI4=4517
216
%term BORI8=8613
217
%term BORU4=4518
218
%term BORU8=8614
219
 
220
%term BXORI4=4533
221
%term BXORI8=8629
222
%term BXORU4=4534
223
%term BXORU8=8630
224
 
225
%term DIVF4=4545
226
%term DIVF8=8641
227
%term DIVF16=16833
228
%term DIVI4=4549
229
%term DIVI8=8645
230
%term DIVU4=4550
231
%term DIVU8=8646
232
 
233
%term MULF4=4561
234
%term MULF8=8657
235
%term MULF16=16849
236
%term MULI4=4565
237
%term MULI8=8661
238
%term MULU4=4566
239
%term MULU8=8662
240
 
241
%term EQF4=4577
242
%term EQF8=8673
243
%term EQF16=16865
244
%term EQI4=4581
245
%term EQI8=8677
246
%term EQU4=4582
247
%term EQU8=8678
248
 
249
%term GEF4=4593
250
%term GEF8=8689
251
%term GEI4=4597
252
%term GEI8=8693
253
%term GEI16=16885
254
%term GEU4=4598
255
%term GEU8=8694
256
 
257
%term GTF4=4609
258
%term GTF8=8705
259
%term GTF16=16897
260
%term GTI4=4613
261
%term GTI8=8709
262
%term GTU4=4614
263
%term GTU8=8710
264
 
265
%term LEF4=4625
266
%term LEF8=8721
267
%term LEF16=16913
268
%term LEI4=4629
269
%term LEI8=8725
270
%term LEU4=4630
271
%term LEU8=8726
272
 
273
%term LTF4=4641
274
%term LTF8=8737
275
%term LTF16=16929
276
%term LTI4=4645
277
%term LTI8=8741
278
%term LTU4=4646
279
%term LTU8=8742
280
 
281
%term NEF4=4657
282
%term NEF8=8753
283
%term NEF16=16945
284
%term NEI4=4661
285
%term NEI8=8757
286
%term NEU4=4662
287
%term NEU8=8758
288
 
289
%term JUMPV=584
290
 
291
%term LABELV=600
292
 
293
%term LOADB=233
294
%term LOADF4=4321
295
%term LOADF8=8417
296
%term LOADF16=16609
297
%term LOADI1=1253
298
%term LOADI2=2277
299
%term LOADI4=4325
300
%term LOADI8=8421
301
%term LOADP4=4327
302
%term LOADP8=8423
303
%term LOADU1=1254
304
%term LOADU2=2278
305
%term LOADU4=4326
306
%term LOADU8=8422
307
 
308
%term VREGP=711
309
%%
310
reg:  INDIRI1(VREGP)     "# read register\n"
311
reg:  INDIRU1(VREGP)     "# read register\n"
312
 
313
reg:  INDIRI2(VREGP)     "# read register\n"
314
reg:  INDIRU2(VREGP)     "# read register\n"
315
 
316
reg:  INDIRI4(VREGP)     "# read register\n"
317
reg:  INDIRP4(VREGP)     "# read register\n"
318
reg:  INDIRU4(VREGP)     "# read register\n"
319
 
320
reg:  INDIRI8(VREGP)     "# read register\n"
321
reg:  INDIRP8(VREGP)     "# read register\n"
322
reg:  INDIRU8(VREGP)     "# read register\n"
323
 
324
freg:  INDIRF4(VREGP)     "# read register\n"
325
freg:  INDIRF8(VREGP)     "# read register\n"
326
 
327
stmt: ASGNI1(VREGP,reg)  "# write register\n"
328
stmt: ASGNU1(VREGP,reg)  "# write register\n"
329
 
330
stmt: ASGNI2(VREGP,reg)  "# write register\n"
331
stmt: ASGNU2(VREGP,reg)  "# write register\n"
332
 
333
stmt: ASGNF4(VREGP,reg)  "# write register\n"
334
stmt: ASGNI4(VREGP,reg)  "# write register\n"
335
stmt: ASGNP4(VREGP,reg)  "# write register\n"
336
stmt: ASGNU4(VREGP,reg)  "# write register\n"
337
 
338
stmt: ASGNF8(VREGP,reg)  "# write register\n"
339
stmt: ASGNI8(VREGP,reg)  "# write register\n"
340
stmt: ASGNP8(VREGP,reg)  "# write register\n"
341
stmt: ASGNU8(VREGP,reg)  "# write register\n"
342
 
343
cnst: CNSTI1    "%a"
344
cnst: CNSTU1    "%a"
345
 
346
cnst: CNSTI2    "%a"
347
cnst: CNSTU2    "%a"
348
 
349
cnst: CNSTI4    "%a"
350
cnst: CNSTU4    "%a"
351
cnst: CNSTP4    "%a"
352
 
353
cnst: CNSTI8    "%a"
354
cnst: CNSTU8    "%a"
355
cnst: CNSTP8    "%a"
356
 
357
con: cnst       "$%0"
358
 
359
stmt: reg       ""
360
stmt: freg      ""
361
 
362
acon: ADDRGP4  "%a"
363
acon: ADDRGP8  "%a"
364
acon: cnst       "%0"
365
 
366
baseaddr: ADDRGP4       "%a"
367
base: reg               "(%0)"
368
base: ADDI4(reg,acon)   "%1(%0)"
369
base: ADDP4(reg,acon)   "%1(%0)"
370
base: ADDU4(reg,acon)   "%1(%0)"
371
base: ADDRFP4           "%a(%%ebp)"
372
base: ADDRLP4           "%a(%%ebp)"
373
 
374
index: reg              "%0"
375
index: LSHI4(reg,con1)  "%0,2"
376
index: LSHI4(reg,con2)  "%0,4"
377
index: LSHI4(reg,con3)  "%0,8"
378
index: LSHU4(reg,con1)  "%0,2"
379
index: LSHU4(reg,con2)  "%0,4"
380
index: LSHU4(reg,con3)  "%0,8"
381
 
382
con0:  CNSTI4  "1"  range(a, 0, 0)
383
con0:  CNSTU4  "1"  range(a, 0, 0)
384
con1:  CNSTI4  "1"  range(a, 1, 1)
385
con1:  CNSTU4  "1"  range(a, 1, 1)
386
con2:  CNSTI4  "2"  range(a, 2, 2)
387
con2:  CNSTU4  "2"  range(a, 2, 2)
388
con3:  CNSTI4  "3"  range(a, 3, 3)
389
con3:  CNSTU4  "3"  range(a, 3, 3)
390
 
391
addr: base                      "%0"
392
addr: baseaddr                  "%0"
393
addr: ADDI4(index,baseaddr)     "%1(,%0)"
394
addr: ADDP4(index,baseaddr)     "%1(,%0)"
395
addr: ADDU4(index,baseaddr)     "%1(,%0)"
396
 
397
addr: ADDI4(reg,baseaddr)       "%1(%0)"
398
addr: ADDP4(reg,baseaddr)       "%1(%0)"
399
addr: ADDU4(reg,baseaddr)       "%1(%0)"
400
 
401
addr: ADDI4(index,reg)          "(%1,%0)"
402
addr: ADDP4(index,reg)          "(%1,%0)"
403
addr: ADDU4(index,reg)          "(%1,%0)"
404
 
405
addr: index  "(,%0)"
406
 
407
mem1: INDIRI1(addr)  "%0"
408
mem1: INDIRU1(addr)  "%0"
409
mem2: INDIRI2(addr)  "%0"
410
mem2: INDIRU2(addr)  "%0"
411
mem4: INDIRI4(addr)  "%0"
412
mem4: INDIRU4(addr)  "%0"
413
mem4: INDIRP4(addr)  "%0"
414
 
415
rc: reg         "%0"
416
rc: con         "%0"
417
 
418
mr: reg         "%0"
419
mr: mem4        "%0"
420
 
421
mr1: reg        "%0"
422
mr1: mem1       "%0"
423
 
424
mr2: reg        "%0"
425
mr2: mem2       "%0"
426
 
427
mrc: mem4       "%0"  1
428
mrc: mem1       "%0"  1
429
mrc: mem2       "%0"  1
430
mrc: rc         "%0"
431
 
432
reg: addr       "leal %0,%c\n"  1
433
reg: mr         "movl %0,%c\n"  1
434
reg: mr1        "movb %0,%c\n"  1
435
reg: mr2        "movw %0,%c\n"  1
436
reg: con        "mov %0,%c\n"  1
437
 
438
reg: LOADI1(reg)        "# move\n"  1
439
reg: LOADI2(reg)        "# move\n"  1
440
reg: LOADI4(reg)        "# move\n"  move(a)
441
reg: LOADU1(reg)        "# move\n"  1
442
reg: LOADU2(reg)        "# move\n"  1
443
reg: LOADU4(reg)        "# move\n"  move(a)
444
reg: LOADP4(reg)        "# move\n"  move(a)
445
reg: ADDI4(reg,mrc)     "?movl %0,%c\naddl %1,%c\n"  1
446
reg: ADDP4(reg,mrc)     "?movl %0,%c\naddl %1,%c\n"  1
447
reg: ADDU4(reg,mrc)     "?movl %0,%c\naddl %1,%c\n"  1
448
reg: SUBI4(reg,mrc)     "?movl %0,%c\nsubl %1,%c\n"  1
449
reg: SUBP4(reg,mrc)     "?movl %0,%c\nsubl %1,%c\n"  1
450
reg: SUBU4(reg,mrc)     "?movl %0,%c\nsubl %1,%c\n"  1
451
reg: BANDI4(reg,mrc)    "?movl %0,%c\nandl %1,%c\n"  1
452
reg: BORI4(reg,mrc)     "?movl %0,%c\norl %1,%c\n"   1
453
reg: BXORI4(reg,mrc)    "?movl %0,%c\nxorl %1,%c\n"  1
454
reg: BANDU4(reg,mrc)    "?movl %0,%c\nandl %1,%c\n"  1
455
reg: BORU4(reg,mrc)     "?movl %0,%c\norl %1,%c\n"   1
456
reg: BXORU4(reg,mrc)    "?movl %0,%c\nxorl %1,%c\n"  1
457
 
458
stmt: ASGNI4(addr,ADDI4(mem4,con1))     "incl %1\n"  memop(a)
459
stmt: ASGNI4(addr,ADDU4(mem4,con1))     "incl %1\n"  memop(a)
460
stmt: ASGNP4(addr,ADDP4(mem4,con1))     "incl %1\n"  memop(a)
461
stmt: ASGNI4(addr,SUBI4(mem4,con1))     "decl %1\n"  memop(a)
462
stmt: ASGNI4(addr,SUBU4(mem4,con1))     "decl %1\n"  memop(a)
463
stmt: ASGNP4(addr,SUBP4(mem4,con1))     "decl %1\n"  memop(a)
464
stmt: ASGNI4(addr,ADDI4(mem4,rc))       "addl %2,%1\n"  memop(a)
465
stmt: ASGNI4(addr,SUBI4(mem4,rc))       "subl %2,%1\n"  memop(a)
466
stmt: ASGNU4(addr,ADDU4(mem4,rc))       "addl %2,%1\n"  memop(a)
467
stmt: ASGNU4(addr,SUBU4(mem4,rc))       "subl %2,%1\n"  memop(a)
468
 
469
stmt: ASGNI4(addr,BANDI4(mem4,rc))      "andl %2,%1\n"  memop(a)
470
stmt: ASGNI4(addr,BORI4(mem4,rc))       "orl %2,%1\n"   memop(a)
471
stmt: ASGNI4(addr,BXORI4(mem4,rc))      "xorl %2,%1\n"  memop(a)
472
stmt: ASGNU4(addr,BANDU4(mem4,rc))      "andl %2,%1\n"  memop(a)
473
stmt: ASGNU4(addr,BORU4(mem4,rc))       "orl %2,%1\n"   memop(a)
474
stmt: ASGNU4(addr,BXORU4(mem4,rc))      "xorl %2,%1\n"  memop(a)
475
reg: BCOMI4(reg)        "?movl %0,%c\nnotl %c\n"  2
476
reg: BCOMU4(reg)        "?movl %0,%c\nnotl %c\n"  2
477
reg: NEGI4(reg)         "?movl %0,%c\nnegl %c\n"  2
478
 
479
stmt: ASGNI4(addr,BCOMI4(mem4)) "notl %1\n"  memop(a)
480
stmt: ASGNU4(addr,BCOMU4(mem4)) "notl %1\n"  memop(a)
481
stmt: ASGNI4(addr,NEGI4(mem4))  "negl %1\n"  memop(a)
482
reg: LSHI4(reg,rc5)     "?movl %0,%c\nsall %1,%c\n"  2
483
reg: LSHU4(reg,rc5)     "?movl %0,%c\nshll %1,%c\n"  2
484
reg: RSHI4(reg,rc5)     "?movl %0,%c\nsarl %1,%c\n"  2
485
reg: RSHU4(reg,rc5)     "?movl %0,%c\nshrl %1,%c\n"  2
486
 
487
stmt: ASGNI4(addr,LSHI4(mem4,rc5))      "sall %2,%1\n"  memop(a)
488
stmt: ASGNI4(addr,LSHU4(mem4,rc5))      "shll %2,%1\n"  memop(a)
489
stmt: ASGNI4(addr,RSHI4(mem4,rc5))      "sarl %2,%1\n"  memop(a)
490
stmt: ASGNI4(addr,RSHU4(mem4,rc5))      "shrl %2,%1\n"  memop(a)
491
 
492
rc5: CNSTI4     "$%a"  range(a, 0, 31)
493
rc5: reg        "%%cl"
494
reg: MULI4(reg,mrc)     "?movl %0,%c\nimull %1,%c\n"  14
495
reg: MULI4(con,mr)      "imul %0,%1,%c\n"  13
496
reg: MULU4(reg,mr)      "mull %1\n"  13
497
reg: DIVU4(reg,reg)     "xorl %%edx,%%edx\ndivl %1\n"
498
reg: MODU4(reg,reg)     "xorl %%edx,%%edx\ndivl %1\n"
499
reg: DIVI4(reg,reg)     "cdq\nidivl %1\n"
500
reg: MODI4(reg,reg)     "cdq\nidivl %1\n"
501
reg: CVPU4(reg)         "movl %0,%c\n"  move(a)
502
reg: CVUP4(reg)         "movl %0,%c\n"  move(a)
503
reg: CVII4(INDIRI1(addr))       "movsbl %0,%c\n"  3
504
reg: CVII4(INDIRI2(addr))       "movswl %0,%c\n"  3
505
reg: CVUU4(INDIRU1(addr))       "movzbl %0,%c\n"  3
506
reg: CVUU4(INDIRU2(addr))       "movzwl %0,%c\n"  3
507
reg: CVII4(reg) "# extend\n"  3
508
reg: CVIU4(reg) "# extend\n"  3
509
reg: CVUI4(reg) "# extend\n"  3
510
reg: CVUU4(reg) "# extend\n"  3
511
 
512
reg: CVII1(reg) "# truncate\n"  1
513
reg: CVII2(reg) "# truncate\n"  1
514
reg: CVUU1(reg) "# truncate\n"  1
515
reg: CVUU2(reg) "# truncate\n"  1
516
 
517
mrca: mem4      "%0"
518
mrca: rc        "%0"
519
mrca: ADDRGP4   "$%a"
520
mrca: ADDRGP8   "$%a"
521
 
522
stmt: ASGNI1(addr,rc)           "movb %1,%0\n"   1
523
stmt: ASGNI2(addr,rc)           "movw %1,%0\n"   1
524
stmt: ASGNI4(addr,rc)           "movl %1,%0\n"   1
525
stmt: ASGNU1(addr,rc)           "movb %1,%0\n"   1
526
stmt: ASGNU2(addr,rc)           "movw %1,%0\n"   1
527
stmt: ASGNU4(addr,rc)           "movl %1,%0\n"   1
528
stmt: ASGNP4(addr,rc)           "movl %1,%0\n"   1
529
stmt: ARGI4(mrca)               "pushl %0\n"  1
530
stmt: ARGU4(mrca)               "pushl %0\n"  1
531
stmt: ARGP4(mrca)               "pushl %0\n"  1
532
stmt: ASGNB(reg,INDIRB(reg))    "movl $%a,%%ecx\nrep\nmovsb\n"
533
stmt: ARGB(INDIRB(reg))         "# ARGB\n"
534
 
535
memf: INDIRF8(addr)         "l %0"
536
memf: INDIRF4(addr)         "s %0"
537
memf: CVFF8(INDIRF4(addr))  "s %0"
538
memf: CVFF4(INDIRF8(addr))  "l %0"
539
 
540
freg: memf      "fld%0\n"  3
541
 
542
stmt: ASGNF8(addr,freg)         "fstpl %0\n"  7
543
stmt: ASGNF4(addr,freg)         "fstps %0\n"  7
544
stmt: ASGNF4(addr,CVFF4(freg))  "fstps %0\n"  7
545
 
546
stmt: ARGF8(freg)       "subl $8,%%esp\nfstpl (%%esp)\n"
547
stmt: ARGF4(freg)       "subl $4,%%esp\nfstps (%%esp)\n"
548
freg: NEGF8(freg)       "fchs\n"
549
freg: NEGF4(freg)       "fchs\n"
550
 
551
flt: memf       "%0"
552
flt: freg       "p %%st,%%st(1)"
553
flt2: memf      "%0"
554
flt2: freg      "rp %%st,%%st(1)"
555
 
556
freg: ADDF4(freg,flt)   "fadd%1\n"
557
freg: ADDF8(freg,flt)   "fadd%1\n"
558
 
559
freg: DIVF4(freg,flt2)  "fdiv%1\n"
560
freg: DIVF8(freg,flt2)  "fdiv%1\n"
561
 
562
freg: MULF4(freg,flt)   "fmul%1\n"
563
freg: MULF8(freg,flt)   "fmul%1\n"
564
 
565
freg: SUBF4(freg,flt2)  "fsub%1\n"
566
freg: SUBF8(freg,flt2)  "fsub%1\n"
567
 
568
freg: CVFF8(freg)  "# CVFF8\n"
569
freg: CVFF4(freg)  "sub $4,%%esp\nfstps (%%esp)\nflds (%%esp)\naddl $4,%%esp\n"  12
570
 
571
reg: CVFI4(freg)  "subl $8,%%esp\nfnstcw 4(%%esp)\nmovl 4(%%esp),%%edx\nmovb $12,%%dh\nmovl %%edx,0(%%esp)\nfldcw 0(%%esp)\nfistpl 0(%%esp)\npopl %c\nfldcw 0(%%esp)\naddl $4,%%esp\n" 31
572
 
573
freg: CVIF8(INDIRI4(addr))      "fildl %0\n"  10
574
freg: CVIF8(reg)  "pushl %0\nfildl (%%esp)\naddl $4,%%esp\n"  12
575
 
576
freg: CVIF4(INDIRI4(addr))      "fildl %0\n"  10
577
freg: CVIF4(reg)  "pushl %0\nfildl (%%esp)\naddl $4,%%esp\n"  12
578
 
579
addrj: ADDRGP4  "%a"
580
addrj: reg      "*%0"  2
581
addrj: mem4     "*%0"  2
582
 
583
stmt: LABELV         "%a:\n"
584
stmt: JUMPV(addrj)   "jmp %0\n"  3
585
stmt: EQI4(mem4,rc)  "cmpl %1,%0\nje %a\n"   5
586
stmt: GEI4(mem4,rc)  "cmpl %1,%0\njge %a\n"  5
587
stmt: GTI4(mem4,rc)  "cmpl %1,%0\njg %a\n"   5
588
stmt: LEI4(mem4,rc)  "cmpl %1,%0\njle %a\n"  5
589
stmt: LTI4(mem4,rc)  "cmpl %1,%0\njl %a\n"   5
590
stmt: NEI4(mem4,rc)  "cmpl %1,%0\njne %a\n"  5
591
stmt: GEU4(mem4,rc)  "cmpl %1,%0\njae %a\n"  5
592
stmt: GTU4(mem4,rc)  "cmpl %1,%0\nja  %a\n"  5
593
stmt: LEU4(mem4,rc)  "cmpl %1,%0\njbe %a\n"  5
594
stmt: LTU4(mem4,rc)  "cmpl %1,%0\njb  %a\n"  5
595
stmt: EQI4(reg,mrc)  "cmpl %1,%0\nje %a\n"   4
596
stmt: GEI4(reg,mrc)  "cmpl %1,%0\njge %a\n"  4
597
stmt: GTI4(reg,mrc)  "cmpl %1,%0\njg %a\n"   4
598
stmt: LEI4(reg,mrc)  "cmpl %1,%0\njle %a\n"  4
599
stmt: LTI4(reg,mrc)  "cmpl %1,%0\njl %a\n"   4
600
stmt: NEI4(reg,mrc)  "cmpl %1,%0\njne %a\n"  4
601
 
602
stmt: EQU4(reg,mrc)  "cmpl %1,%0\nje %a\n"   4
603
stmt: GEU4(reg,mrc)  "cmpl %1,%0\njae %a\n"  4
604
stmt: GTU4(reg,mrc)  "cmpl %1,%0\nja %a\n"   4
605
stmt: LEU4(reg,mrc)  "cmpl %1,%0\njbe %a\n"  4
606
stmt: LTU4(reg,mrc)  "cmpl %1,%0\njb %a\n"   4
607
stmt: NEU4(reg,mrc)  "cmpl %1,%0\njne %a\n"  4
608
 
609
stmt: EQI4(BANDU4(mr,con),con0) "testl %1,%0\nje %a\n" 3
610
stmt: NEI4(BANDU4(mr,con),con0) "testl %1,%0\njne %a\n"
611
 
612
stmt: EQI4(BANDU4(CVII2(INDIRI2(addr)),con),con0) "testw %1,%0\nje %a\n"
613
stmt: NEI4(BANDU4(CVII2(INDIRI2(addr)),con),con0) "testw %1,%0\njne %a\n"
614
stmt: EQI4(BANDU4(CVIU2(INDIRI2(addr)),con),con0) "testw %1,%0\nje %a\n"
615
stmt: NEI4(BANDU4(CVIU2(INDIRI2(addr)),con),con0) "testw %1,%0\njne %a\n"
616
stmt: EQI4(BANDU4(CVII1(INDIRI1(addr)),con),con0) "testb %1,%0\nje %a\n"
617
 
618
cmpf: INDIRF8(addr)             "l %0"
619
cmpf: INDIRF4(addr)             "s %0"
620
cmpf: CVFF8(INDIRF4(addr))      "s %0"
621
cmpf: freg                      "p"
622
 
623
stmt: EQF8(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp 1f\nje %a\n1:\n"
624
stmt: GEF8(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njbe %a\n"
625
stmt: GTF8(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njb %a\n"
626
stmt: LEF8(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njae %a\n"
627
stmt: LTF8(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\nja %a\n"
628
stmt: NEF8(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njne %a\n"
629
 
630
stmt: EQF4(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp 1f\nje %a\n1:\n"
631
stmt: GEF4(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njbe %a\n"
632
stmt: GTF4(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njb %a\n"
633
stmt: LEF4(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njae %a\n"
634
stmt: LTF4(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\nja %a\n"
635
stmt: NEF4(cmpf,freg)  "fcomp%0\nfstsw %%ax\nsahf\njp %a\njne %a\n"
636
 
637
freg: DIVF8(freg,CVIF8(INDIRI4(addr)))          "fidivl %1\n"
638
freg: DIVF8(CVIF8(INDIRI4(addr)),freg)          "fidivrl %0\n"
639
freg: DIVF8(freg,CVIF8(CVII2(INDIRI2(addr))))   "fidivs %1\n"
640
freg: DIVF8(CVIF8(CVII2(INDIRI2(addr))),freg)   "fidivrs %0\n"
641
freg: MULF8(freg,CVIF8(INDIRI4(addr)))          "fimull %1\n"
642
freg: MULF8(freg,CVIF8(CVII2(INDIRI2(addr))))   "fimuls %1\n"
643
freg: SUBF8(freg,CVIF8(INDIRI4(addr)))          "fisubl %1\n"
644
freg: SUBF8(CVIF8(INDIRI4(addr)),freg)          "fisubrl %0\n"
645
freg: SUBF8(freg,CVIF8(CVII2(INDIRI2(addr))))   "fisubs %1\n"
646
freg: SUBF8(CVIF8(CVII2(INDIRI2(addr))),freg)   "fisubrs %0\n"
647
freg: ADDF8(freg,CVIF8(INDIRI4(addr)))          "fiaddl %1\n"
648
freg: ADDF8(freg,CVIF8(CVII2(INDIRI2(addr))))   "fiadds %1\n"
649
freg: ADDF8(freg,CVFF8(INDIRF4(addr)))          "fdivs %1\n"
650
freg: SUBF8(freg,CVFF8(INDIRF4(addr)))          "fsubs %1\n"
651
freg: MULF8(freg,CVFF8(INDIRF4(addr)))          "fmuls %1\n"
652
freg: DIVF8(freg,CVFF8(INDIRF4(addr)))          "fdivs %1\n"
653
freg: LOADF8(memf)                              "fld%0\n"
654
 
655
reg:  CALLI4(addrj)  "call %0\naddl $%a,%%esp\n"        hasargs(a)
656
reg:  CALLU4(addrj)  "call %0\naddl $%a,%%esp\n"        hasargs(a)
657
reg:  CALLP4(addrj)  "call %0\naddl $%a,%%esp\n"        hasargs(a)
658
 
659
reg:  CALLI4(addrj)  "call %0\n"                        1
660
reg:  CALLU4(addrj)  "call %0\n"                        1
661
reg:  CALLP4(addrj)  "call %0\n"                        1
662
 
663
stmt: CALLV(addrj)   "call %0\naddl $%a,%%esp\n"        hasargs(a)
664
stmt: CALLV(addrj)   "call %0\n"                        1
665
 
666
freg: CALLF4(addrj)  "call %0\naddl $%a,%%esp\n"        hasargs(a)
667
freg: CALLF4(addrj)  "call %0\n"                        1
668
 
669
stmt: CALLF4(addrj)  "call %0\naddl $%a,%%esp\nfstp %%st(0)\n"  hasargs(a)
670
stmt: CALLF4(addrj)  "call %0\nfstp %%st(0)\n"                  1
671
 
672
freg: CALLF8(addrj)  "call %0\naddl $%a,%%esp\n"        hasargs(a)
673
freg: CALLF8(addrj)  "call %0\n"                        1
674
 
675
stmt: CALLF8(addrj)  "call %0\naddl $%a,%%esp\nfstp %%st(0)\n"  hasargs(a)
676
stmt: CALLF8(addrj)  "call %0\nfstp %%st(0)\n"                  1
677
 
678
stmt: RETI4(reg)  "# ret\n"
679
stmt: RETU4(reg)  "# ret\n"
680
stmt: RETP4(reg)  "# ret\n"
681
stmt: RETF4(freg) "# ret\n"
682
stmt: RETF8(freg) "# ret\n"
683
%%
684
static void progbeg(int argc, char *argv[]) {
685
        int i;
686
        extern Interface x86IR, x86linuxIR;
687
 
688
#define xx(f) assert(!x86linuxIR.f); x86linuxIR.f = x86IR.f
689
        xx(address);
690
        xx(local);
691
        xx(x.blkfetch);
692
        xx(x.blkstore);
693
        xx(x.blkloop);
694
        xx(x.doarg);
695
#undef xx
696
        {
697
                union {
698
                        char c;
699
                        int i;
700
                } u;
701
                u.i = 0;
702
                u.c = 1;
703
                swap = ((int)(u.i == 1)) != IR->little_endian;
704
        }
705
        parseflags(argc, argv);
706
        for (i = 0; i < argc; i++)
707
                if (strcmp(argv[i], "-p") == 0 || strcmp(argv[i], "-pg") == 0)
708
                        pflag = 1;
709
        intreg[EAX]   = mkreg("%%eax", EAX, 1, IREG);
710
        intreg[EDX]   = mkreg("%%edx", EDX, 1, IREG);
711
        intreg[ECX]   = mkreg("%%ecx", ECX, 1, IREG);
712
        intreg[EBX]   = mkreg("%%ebx", EBX, 1, IREG);
713
        intreg[ESI]   = mkreg("%%esi", ESI, 1, IREG);
714
        intreg[EDI]   = mkreg("%%edi", EDI, 1, IREG);
715
        shortreg[EAX] = mkreg("%%ax", EAX, 1, IREG);
716
        shortreg[ECX] = mkreg("%%cx", ECX, 1, IREG);
717
        shortreg[EDX] = mkreg("%%dx", EDX, 1, IREG);
718
        shortreg[EBX] = mkreg("%%bx", EBX, 1, IREG);
719
        shortreg[ESI] = mkreg("%%si", ESI, 1, IREG);
720
        shortreg[EDI] = mkreg("%%di", EDI, 1, IREG);
721
        charreg[EAX]  = mkreg("%%al", EAX, 1, IREG);
722
        charreg[ECX]  = mkreg("%%cl", ECX, 1, IREG);
723
        charreg[EDX]  = mkreg("%%dl", EDX, 1, IREG);
724
        charreg[EBX]  = mkreg("%%bl", EBX, 1, IREG);
725
        for (i = 0; i < 8; i++)
726
                fltreg[i] = mkreg("%d", i, 0, FREG);
727
        charregw = mkwildcard(charreg);
728
        shortregw = mkwildcard(shortreg);
729
        intregw = mkwildcard(intreg);
730
        fltregw = mkwildcard(fltreg);
731
 
732
        tmask[IREG] = (1<
733
                    | (1<
734
        vmask[IREG] = 0;
735
        tmask[FREG] = 0xff;
736
        vmask[FREG] = 0;
737
 
738
        cseg = 0;
739
        quo = mkreg("%%eax", EAX, 1, IREG);
740
        quo->x.regnode->mask |= 1<
741
        rem = mkreg("%%edx", EDX, 1, IREG);
742
        rem->x.regnode->mask |= 1<
743
 
744
        stabprefix = ".LL";
745
}
746
 
747
static Symbol rmap(int opk) {
748
        switch (optype(opk)) {
749
        case B: case P:
750
                return intregw;
751
        case I: case U:
752
                if (opsize(opk) == 1)
753
                        return charregw;
754
                else if (opsize(opk) == 2)
755
                        return shortregw;
756
                else
757
                        return intregw;
758
        case F:
759
                return fltregw;
760
        default:
761
                return 0;
762
        }
763
}
764
 
765
static Symbol prevg;
766
 
767
static void globalend(void) {
768
        if (prevg && prevg->type->size > 0)
769
                print(".size %s,%d\n", prevg->x.name, prevg->type->size);
770
        prevg = NULL;
771
}
772
 
773
static void progend(void) {
774
        globalend();
775
        (*IR->segment)(CODE);
776
        print(".ident \"LCC: 4.1\"\n");
777
}
778
 
779
static void target(Node p) {
780
        assert(p);
781
        switch (specific(p->op)) {
782
        case RSH+I: case RSH+U: case LSH+I: case LSH+U:
783
                if (generic(p->kids[1]->op) != CNST
784
                && !(   generic(p->kids[1]->op) == INDIR
785
                     && specific(p->kids[1]->kids[0]->op) == VREG+P
786
                     && p->kids[1]->syms[RX]->u.t.cse
787
                     && generic(p->kids[1]->syms[RX]->u.t.cse->op) == CNST)) {
788
                        rtarget(p, 1, intreg[ECX]);
789
                        setreg(p, intreg[EAX]);
790
                }
791
                break;
792
        case MUL+U:
793
                setreg(p, quo);
794
                rtarget(p, 0, intreg[EAX]);
795
                break;
796
        case DIV+I: case DIV+U:
797
                setreg(p, quo);
798
                rtarget(p, 0, intreg[EAX]);
799
                rtarget(p, 1, intreg[ECX]);
800
                break;
801
        case MOD+I: case MOD+U:
802
                setreg(p, rem);
803
                rtarget(p, 0, intreg[EAX]);
804
                rtarget(p, 1, intreg[ECX]);
805
                break;
806
        case ASGN+B:
807
                rtarget(p, 0, intreg[EDI]);
808
                rtarget(p->kids[1], 0, intreg[ESI]);
809
                break;
810
        case ARG+B:
811
                rtarget(p->kids[0], 0, intreg[ESI]);
812
                break;
813
        case CVF+I:
814
                setreg(p, intreg[EAX]);
815
                break;
816
        case CALL+I: case CALL+U: case CALL+P: case CALL+V:
817
                setreg(p, intreg[EAX]);
818
                break;
819
        case RET+I: case RET+U: case RET+P:
820
                rtarget(p, 0, intreg[EAX]);
821
                break;
822
        }
823
}
824
 
825
static void clobber(Node p) {
826
        static int nstack = 0;
827
 
828
        assert(p);
829
        nstack = ckstack(p, nstack);
830
        switch (specific(p->op)) {
831
        case ASGN+B: case ARG+B:
832
                spill(1<
833
                break;
834
        case EQ+F: case LE+F: case GE+F: case LT+F: case GT+F: case NE+F:
835
                spill(1<
836
                break;
837
        case CVF+I:
838
                spill(1<
839
                break;
840
        case CALL+F:
841
                spill(1<
842
                break;
843
        case CALL+I: case CALL+U: case CALL+P: case CALL+V:
844
                spill(1<
845
                break;
846
        }
847
}
848
 
849
static void emit2(Node p) {
850
        int op = specific(p->op);
851
#define preg(f) ((f)[getregnum(p->x.kids[0])]->x.name)
852
 
853
        if (op == CVI+I && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 1)
854
                print("movsbl %s,%s\n", preg(charreg), p->syms[RX]->x.name);
855
        else if (op == CVI+U && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 1)
856
                print("movsbl %s,%s\n", preg(charreg), p->syms[RX]->x.name);
857
        else if (op == CVI+I && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 2)
858
                print("movswl %s,%s\n", preg(shortreg), p->syms[RX]->x.name);
859
        else if (op == CVI+U && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 2)
860
                print("movswl %s,%s\n", preg(shortreg), p->syms[RX]->x.name);
861
        else if (op == CVU+I && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 1)
862
                print("movzbl %s,%s\n", preg(charreg), p->syms[RX]->x.name);
863
        else if (op == CVU+U && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 1)
864
                print("movzbl %s,%s\n", preg(charreg), p->syms[RX]->x.name);
865
        else if (op == CVU+I && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 2)
866
                print("movzwl %s,%s\n", preg(shortreg), p->syms[RX]->x.name);
867
        else if (op == CVU+U && opsize(p->op) == 4 && opsize(p->x.kids[0]->op) == 2)
868
                print("movzwl %s,%s\n", preg(shortreg), p->syms[RX]->x.name);
869
        else if (generic(op) == CVI || generic(op) == CVU || generic(op) == LOAD) {
870
                char *dst = intreg[getregnum(p)]->x.name;
871
                char *src = preg(intreg);
872
                assert(opsize(p->op) <= opsize(p->x.kids[0]->op));
873
                if (dst != src)
874
                        print("movl %s,%s\n", src, dst);
875
        } else if (op == ARG+B)
876
                print("subl $%d,%%esp\nmovl %%esp,%%edi\nmovl $%d,%%ecx\nrep\nmovsb\n",
877
                        roundup(p->syms[0]->u.c.v.i, 4), p->syms[0]->u.c.v.i);
878
}
879
 
880
static void function(Symbol f, Symbol caller[], Symbol callee[], int n) {
881
        int i;
882
 
883
        globalend();
884
        print(".align 16\n");
885
        print(".type %s,@function\n", f->x.name);
886
        print("%s:\n", f->x.name);
887
        print("pushl %%ebp\n");
888
        if (pflag) {
889
                static int plab;
890
                print("movl %%esp,%%ebp\n");
891
                (*IR->segment)(DATA);
892
                print(".align 4\n.LP%d:\n.long 0\n", plab);
893
                (*IR->segment)(CODE);
894
                print("movl $.LP%d,%%edx\ncall mcount\n", plab);
895
                plab++;
896
        }
897
        print("pushl %%ebx\n");
898
        print("pushl %%esi\n");
899
        print("pushl %%edi\n");
900
        print("movl %%esp,%%ebp\n");
901
 
902
        usedmask[0] = usedmask[1] = 0;
903
        freemask[0] = freemask[1] = ~0U;
904
        offset = 16 + 4;
905
        for (i = 0; callee[i]; i++) {
906
                Symbol p = callee[i];
907
                Symbol q = caller[i];
908
                assert(q);
909
                offset = roundup(offset, q->type->align);
910
                p->x.offset = q->x.offset = offset;
911
                p->x.name = q->x.name = stringf("%d", p->x.offset);
912
                p->sclass = q->sclass = AUTO;
913
                offset += roundup(q->type->size, 4);
914
        }
915
        assert(caller[i] == 0);
916
        offset = maxoffset = 0;
917
        gencode(caller, callee);
918
        framesize = roundup(maxoffset, 4);
919
        if (framesize > 0)
920
                print("subl $%d,%%esp\n", framesize);
921
        emitcode();
922
        print("movl %%ebp,%%esp\n");
923
        print("popl %%edi\n");
924
        print("popl %%esi\n");
925
        print("popl %%ebx\n");
926
        print("popl %%ebp\n");
927
        print("ret\n");
928
        { int l = genlabel(1);
929
          print(".Lf%d:\n", l);
930
          print(".size %s,.Lf%d-%s\n", f->x.name, l, f->x.name);
931
        }
932
}
933
 
934
static void defsymbol(Symbol p) {
935
        if (p->scope >= LOCAL && p->sclass == STATIC)
936
                p->x.name = stringf("%s.%d", p->name, genlabel(1));
937
        else if (p->generated)
938
                p->x.name = stringf(".LC%s", p->name);
939
        else if (p->scope == GLOBAL || p->sclass == EXTERN)
940
                p->x.name = stringf("%s", p->name);
941
        else
942
                p->x.name = p->name;
943
}
944
 
945
static void segment(int n) {
946
        if (n == cseg)
947
                return;
948
        cseg = n;
949
        if (cseg == CODE)
950
                print(".text\n");
951
        else if (cseg == BSS)
952
                print(".bss\n");
953
        else if (cseg == DATA || cseg == LIT)
954
                print(".data\n");
955
}
956
 
957
static void defconst(int suffix, int size, Value v) {
958
        if (suffix == I && size == 1)
959
                print(".byte %d\n", (int)v.u);
960
        else if (suffix == I && size == 2)
961
                print(".word %d\n", (int)v.i);
962
        else if (suffix == I && size == 4)
963
                print(".long %d\n", (int)v.i);
964
        else if (suffix == U && size == 1)
965
                print(".byte %d\n", (int)((char)v.u));
966
        else if (suffix == U && size == 2)
967
                print(".word %d\n", (int)v.u);
968
        else if (suffix == U && size == 4)
969
                print(".long %d\n", (int)v.u);
970
        else if (suffix == P && size == 4)
971
                print(".long %d\n", (int)v.p);
972
        else if (suffix == F && size == 4) {
973
                float f = v.d;
974
                print(".long %d\n", (int)(*(unsigned *)&f));
975
        } else if (suffix == F && size == 8) {
976
                double d = v.d;
977
                unsigned *p = (unsigned *)&d;
978
                print(".long %d\n.long %d\n", (int)p[swap], (int)p[!swap]);
979
        }
980
        else assert(0);
981
}
982
 
983
static void defaddress(Symbol p) {
984
        print(".long %s\n", p->x.name);
985
}
986
 
987
static void defstring(int n, char *str) {
988
        char *s;
989
 
990
        for (s = str; s < str + n; s++)
991
                print(".byte %d\n", (*s)&0377);
992
}
993
 
994
static void export(Symbol p) {
995
        globalend();
996
        print(".globl %s\n", p->x.name);
997
}
998
 
999
static void import(Symbol p) {}
1000
 
1001
static void global(Symbol p) {
1002
        globalend();
1003
        print(".align %d\n", p->type->align > 4 ? 4 : p->type->align);
1004
        if (!p->generated) {
1005
                print(".type %s,@%s\n", p->x.name,
1006
                        isfunc(p->type) ? "function" : "object");
1007
                if (p->type->size > 0)
1008
                        print(".size %s,%d\n", p->x.name, p->type->size);
1009
                else
1010
                        prevg = p;
1011
        }
1012
        if (p->u.seg == BSS) {
1013
                if (p->sclass == STATIC)
1014
                        print(".lcomm %s,%d\n", p->x.name, p->type->size);
1015
                else
1016
                        print(".comm %s,%d\n", p->x.name, p->type->size);
1017
        } else {
1018
                print("%s:\n", p->x.name);
1019
        }
1020
}
1021
 
1022
static void space(int n) {
1023
        if (cseg != BSS)
1024
                print(".space %d\n", n);
1025
}
1026
 
1027
Interface x86linuxIR = {
1028
        1, 1, 0,  /* char */
1029
        2, 2, 0,  /* short */
1030
        4, 4, 0,  /* int */
1031
        4, 4, 0,  /* long */
1032
        4, 4, 0,  /* long long */
1033
        4, 4, 1,  /* float */
1034
        8, 4, 1,  /* double */
1035
        8, 4, 1,  /* long double */
1036
        4, 4, 0,  /* T * */
1037
        0, 1, 0,  /* struct */
1038
        1,        /* little_endian */
1039
        0,        /* mulops_calls */
1040
        0,        /* wants_callb */
1041
        1,        /* wants_argb */
1042
        0,        /* left_to_right */
1043
        0,        /* wants_dag */
1044
        0,        /* unsigned_char */
1045
        0, /* address */
1046
        blockbeg,
1047
        blockend,
1048
        defaddress,
1049
        defconst,
1050
        defstring,
1051
        defsymbol,
1052
        emit,
1053
        export,
1054
        function,
1055
        gen,
1056
        global,
1057
        import,
1058
        0, /* local */
1059
        progbeg,
1060
        progend,
1061
        segment,
1062
        space,
1063
        stabblock, stabend, 0, stabinit, stabline, stabsym, stabtype,
1064
        {1, rmap,
1065
            0, 0, 0,    /* blkfetch, blkstore, blkloop */
1066
            _label,
1067
            _rule,
1068
            _nts,
1069
            _kids,
1070
            _string,
1071
            _templates,
1072
            _isinstruction,
1073
            _ntname,
1074
            emit2,
1075
            0, /* doarg */
1076
            target,
1077
            clobber,
1078
        }
1079
};

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