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[/] [eco32/] [trunk/] [monitor/] [monitor/] [common/] [asm.c] - Blame information for rev 128

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Line No. Rev Author Line
1 59 hellwig
/*
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 * asm.c -- assembler
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 */
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#include "common.h"
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#include "stdarg.h"
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#include "romlib.h"
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#include "instr.h"
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#include "asm.h"
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#define MAX_TOKENS      10
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static char *msgs[] = {
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  /*  0 */  "too many tokens on line",
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  /*  1 */  "empty line",
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  /*  2 */  "unknown instruction name",
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  /*  3 */  "unknown instruction format",
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  /*  4 */  "excess tokens on line",
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  /*  5 */  "too few operands",
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  /*  6 */  "illegal register",
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  /*  7 */  "illegal immediate value",
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  /*  8 */  "immediate value out of range",
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  /*  9 */  "target is not aligned",
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  /* 10 */  "target cannot be reached"
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};
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static Bool asmReg(char *token, int *reg) {
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  char *end;
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  if (*token != '$') {
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    return false;
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  }
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  *reg = strtoul(token + 1, &end, 10);
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  if (*end != '\0') {
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    return false;
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  }
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  if (*reg < 0 || *reg >= 32) {
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    return false;
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  }
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  return true;
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}
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static Bool asmNum(char *token, unsigned int *val) {
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  char *end;
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  *val = strtoul(token, &end, 16);
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  return *end == '\0';
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}
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char *asmInstr(char *line, Word addr, Word *instrPtr) {
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  char *tokens[MAX_TOKENS];
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  int n;
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  char *p;
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  Instr *instr;
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  Word result;
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  int r1, r2, r3;
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  unsigned int uimm;
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  signed int simm;
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  /* separate tokens */
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  n = 0;
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  p = strtok(line, " \t\n,");
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  while (p != NULL) {
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    if (n == MAX_TOKENS) {
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      return msgs[0];
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    }
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    tokens[n++] = p;
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    p = strtok(NULL, " \t\n,");
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  }
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  if (n == 0) {
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    return msgs[1];
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  }
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  /* lookup mnemonic */
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  instr = lookupInstr(tokens[0]);
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  if (instr == NULL) {
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    return msgs[2];
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  }
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  /* do processing according to format */
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  switch (instr->format) {
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    case FORMAT_N:
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      /* no operands (but may get a constant operand) */
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      if (n > 2) {
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        return msgs[4];
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      }
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      if (n < 1) {
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        return msgs[5];
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      }
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      if (n == 2) {
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        if (!asmNum(tokens[1], &uimm)) {
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          return msgs[7];
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        }
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      } else {
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        uimm = 0;
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      }
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      result = ((Word) instr->opcode << 26) |
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               (uimm & MASK(26));
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      break;
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    case FORMAT_RH:
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      /* one register and a half operand */
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      if (n > 3) {
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        return msgs[4];
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      }
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      if (n < 3) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmNum(tokens[2], &uimm)) {
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        return msgs[7];
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      }
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      if (uimm >= (unsigned) (1 << 16)) {
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        return msgs[8];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r1 << 16) |
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               (uimm & MASK(16));
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      break;
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    case FORMAT_RHH:
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      /* one register and a half operand */
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      /* ATTENTION: high-order 16 bits encoded */
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      if (n > 3) {
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        return msgs[4];
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      }
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      if (n < 3) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmNum(tokens[2], &uimm)) {
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        return msgs[7];
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      }
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      uimm >>= 16;
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      if (uimm >= (unsigned) (1 << 16)) {
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        return msgs[8];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r1 << 16) |
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               (uimm & MASK(16));
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      break;
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    case FORMAT_RRH:
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      /* two registers and a half operand */
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      if (n > 4) {
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        return msgs[4];
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      }
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      if (n < 4) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmReg(tokens[2], &r2)) {
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        return msgs[6];
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      }
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      if (!asmNum(tokens[3], &uimm)) {
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        return msgs[7];
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      }
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      if (uimm >= (unsigned) (1 << 16)) {
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        return msgs[8];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r2 << 21) |
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               (r1 << 16) |
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               (uimm & MASK(16));
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      break;
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    case FORMAT_RRS:
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      /* two registers and a signed half operand */
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      if (n > 4) {
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        return msgs[4];
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      }
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      if (n < 4) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmReg(tokens[2], &r2)) {
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        return msgs[6];
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      }
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      if (!asmNum(tokens[3], (unsigned int *) &simm)) {
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        return msgs[7];
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      }
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      if (simm >= (signed) (1 << 15) ||
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          simm < - (signed) (1 << 15)) {
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        return msgs[8];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r2 << 21) |
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               (r1 << 16) |
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               (simm & MASK(16));
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      break;
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    case FORMAT_RRR:
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      /* three register operands */
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      if (n > 4) {
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        return msgs[4];
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      }
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      if (n < 4) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmReg(tokens[2], &r2)) {
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        return msgs[6];
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      }
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      if (!asmReg(tokens[3], &r3)) {
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        return msgs[6];
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      }
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      result = ((Word) instr->opcode << 26) |
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               (r2 << 21) |
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               (r3 << 16) |
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               (r1 << 11);
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      break;
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    case FORMAT_RRX:
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      /* either FORMAT_RRR or FORMAT_RRH */
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      if (n > 4) {
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        return msgs[4];
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      }
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      if (n < 4) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmReg(tokens[2], &r2)) {
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        return msgs[6];
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      }
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      if (*tokens[3] == '$') {
236
        /* FORMAT_RRR */
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        if (!asmReg(tokens[3], &r3)) {
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          return msgs[6];
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        }
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        result = ((Word) instr->opcode << 26) |
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                 (r2 << 21) |
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                 (r3 << 16) |
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                 (r1 << 11);
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      } else {
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        /* FORMAT_RRH */
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        if (!asmNum(tokens[3], &uimm)) {
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          return msgs[7];
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        }
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        if (uimm >= (unsigned) (1 << 16)) {
250
          return msgs[8];
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        }
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        result = (((Word) instr->opcode + 1) << 26) |
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                 (r2 << 21) |
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                 (r1 << 16) |
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                 (uimm & MASK(16));
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      }
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      break;
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    case FORMAT_RRY:
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      /* either FORMAT_RRR or FORMAT_RRS */
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      if (n > 4) {
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        return msgs[4];
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      }
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      if (n < 4) {
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        return msgs[5];
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      }
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      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
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      if (!asmReg(tokens[2], &r2)) {
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        return msgs[6];
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      }
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      if (*tokens[3] == '$') {
273
        /* FORMAT_RRR */
274
        if (!asmReg(tokens[3], &r3)) {
275
          return msgs[6];
276
        }
277
        result = ((Word) instr->opcode << 26) |
278
                 (r2 << 21) |
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                 (r3 << 16) |
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                 (r1 << 11);
281
      } else {
282
        /* FORMAT_RRS */
283
        if (!asmNum(tokens[3], (unsigned int *) &simm)) {
284
          return msgs[7];
285
        }
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        if (simm >= (signed) (1 << 15) ||
287
            simm < - (signed) (1 << 15)) {
288
          return msgs[8];
289
        }
290
        result = (((Word) instr->opcode + 1) << 26) |
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                 (r2 << 21) |
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                 (r1 << 16) |
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                 (simm & MASK(16));
294
      }
295
      break;
296
    case FORMAT_RRB:
297
      /* two registers and a 16 bit signed offset operand */
298
      if (n > 4) {
299
        return msgs[4];
300
      }
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      if (n < 4) {
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        return msgs[5];
303
      }
304
      if (!asmReg(tokens[1], &r1)) {
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        return msgs[6];
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      }
307
      if (!asmReg(tokens[2], &r2)) {
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        return msgs[6];
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      }
310
      if (!asmNum(tokens[3], (unsigned int *) &simm)) {
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        return msgs[7];
312
      }
313
      if ((simm & 0x00000003) != 0) {
314
        return msgs[9];
315
      }
316
      simm -= addr + 4;
317
      simm /= 4;
318
      if (simm >= (signed) (1 << 15) ||
319
          simm < - (signed) (1 << 15)) {
320
        return msgs[10];
321
      }
322
      result = ((Word) instr->opcode << 26) |
323
               (r1 << 21) |
324
               (r2 << 16) |
325
               (simm & MASK(16));
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      break;
327
    case FORMAT_J:
328
      /* no registers and a 26 bit signed offset operand */
329
      if (n > 2) {
330
        return msgs[4];
331
      }
332
      if (n < 2) {
333
        return msgs[5];
334
      }
335
      if (!asmNum(tokens[1], (unsigned int *) &simm)) {
336
        return msgs[7];
337
      }
338
      if ((simm & 0x00000003) != 0) {
339
        return msgs[9];
340
      }
341
      simm -= addr + 4;
342
      simm /= 4;
343
      if (simm >= (signed) (1 << 25) ||
344
          simm < - (signed) (1 << 25)) {
345
        return msgs[10];
346
      }
347
      result = ((Word) instr->opcode << 26) |
348
               (simm & MASK(26));
349
      break;
350
    case FORMAT_JR:
351
      /* one register operand */
352
      if (n > 2) {
353
        return msgs[4];
354
      }
355
      if (n < 2) {
356
        return msgs[5];
357
      }
358
      if (!asmReg(tokens[1], &r1)) {
359
        return msgs[6];
360
      }
361
      result = ((Word) instr->opcode << 26) |
362
               (r1 << 21);
363
      break;
364
    default:
365
      return msgs[3];
366
  }
367
  /* line successfully assembled */
368
  *instrPtr = result;
369
  return NULL;
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}

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