OpenCores
URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] [trunk/] [monitor/] [monitor/] [common/] [cpu.h] - Blame information for rev 128

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 59 hellwig
/*
2
 * cpu.h -- execute instructions
3
 */
4
 
5
 
6
#ifndef _CPU_H_
7
#define _CPU_H_
8
 
9
 
10
#define PSW_V           0x08000000      /* interrupt vector bit in PSW */
11
#define PSW_UM          0x04000000      /* user mode enable bit in PSW */
12
#define PSW_PUM         0x02000000      /* previous value of PSW_UM */
13
#define PSW_OUM         0x01000000      /* old value of PSW_UM */
14
#define PSW_IE          0x00800000      /* interrupt enable bit in PSW */
15
#define PSW_PIE         0x00400000      /* previous value of PSW_IE */
16
#define PSW_OIE         0x00200000      /* old value of PSW_IE */
17
#define PSW_PRIO_MASK   0x001F0000      /* bits to encode IRQ prio in PSW */
18
 
19
 
20
Word cpuGetPC(void);
21
void cpuSetPC(Word addr);
22
 
23
Word cpuGetReg(int regnum);
24
void cpuSetReg(int regnum, Word value);
25
 
26
Word cpuGetPSW(void);
27
void cpuSetPSW(Word value);
28
 
29
Bool cpuTestBreak(void);
30
Word cpuGetBreak(void);
31
void cpuSetBreak(Word addr);
32
void cpuResetBreak(void);
33
 
34
char *exceptionToString(int exception);
35
 
36
void cpuStep(void);
37
void cpuRun(void);
38
 
39
 
40
#endif /* _CPU_H_ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.