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[/] [eco32/] [trunk/] [sim/] [mmu.c] - Blame information for rev 103

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Line No. Rev Author Line
1 8 hellwig
/*
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 * mmu.c -- MMU simulation
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 */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <setjmp.h>
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#include "common.h"
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#include "console.h"
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#include "error.h"
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#include "except.h"
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#include "cpu.h"
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#include "mmu.h"
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#include "memory.h"
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static Bool debugUse = false;
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static Bool debugWrite = false;
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static TLB_Entry tlb[TLB_SIZE];
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static Word tlbIndex;
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static Word tlbEntryHi;
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static Word tlbEntryLo;
28 78 hellwig
static Word mmuBadAddr;
29 8 hellwig
 
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static int assoc(Word page) {
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  int n, i;
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  n = -1;
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  for (i = 0; i < TLB_SIZE; i++) {
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    if (tlb[i].page == page) {
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      n = i;
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    }
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  }
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  return n;
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}
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static void assocDelay(void) {
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  int n, i;
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  /* simulate delay introduced by assoc when using mapped
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     addresses but not experienced with unmapped addresses */
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  n = -1;
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  for (i = 0; i < TLB_SIZE; i++) {
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    if (tlb[i].page == 0) {
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      n = i;
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    }
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  }
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}
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static Word v2p(Word vAddr, Bool userMode, Bool writing) {
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  Word pAddr;
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  Word page, offset;
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  int index;
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  if (debugUse) {
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    cPrintf("**** vAddr = 0x%08X", vAddr);
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  }
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  if ((vAddr & 0x80000000) != 0 && userMode) {
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    /* trying to access a privileged address from user mode */
68 78 hellwig
    mmuBadAddr = vAddr;
69 8 hellwig
    throwException(EXC_PRV_ADDRESS);
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  }
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  if ((vAddr & 0xC0000000) == 0xC0000000) {
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    /* unmapped address space */
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    assocDelay();
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    pAddr = vAddr & ~0xC0000000;
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  } else {
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    /* mapped address space */
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    page = vAddr & PAGE_MASK;
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    offset = vAddr & OFFSET_MASK;
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    index = assoc(page);
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    if (index == -1) {
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      /* TLB miss exception */
82 78 hellwig
      mmuBadAddr = vAddr;
83 8 hellwig
      tlbEntryHi = page;
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      throwException(EXC_TLB_MISS);
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    }
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    if (!tlb[index].valid) {
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      /* TLB invalid exception */
88 78 hellwig
      mmuBadAddr = vAddr;
89 8 hellwig
      tlbEntryHi = page;
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      throwException(EXC_TLB_INVALID);
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    }
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    if (!tlb[index].write && writing) {
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      /* TLB write exception */
94 78 hellwig
      mmuBadAddr = vAddr;
95 8 hellwig
      tlbEntryHi = page;
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      throwException(EXC_TLB_WRITE);
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    }
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    pAddr = tlb[index].frame | offset;
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  }
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  if (debugUse) {
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    cPrintf(", pAddr = 0x%08X ****\n", pAddr);
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  }
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  return pAddr;
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}
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106
 
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Word mmuReadWord(Word vAddr, Bool userMode) {
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  if ((vAddr & 3) != 0) {
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    /* throw illegal address exception */
110 78 hellwig
    mmuBadAddr = vAddr;
111 8 hellwig
    throwException(EXC_ILL_ADDRESS);
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  }
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  return memoryReadWord(v2p(vAddr, userMode, false));
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}
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116
 
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Half mmuReadHalf(Word vAddr, Bool userMode) {
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  if ((vAddr & 1) != 0) {
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    /* throw illegal address exception */
120 78 hellwig
    mmuBadAddr = vAddr;
121 8 hellwig
    throwException(EXC_ILL_ADDRESS);
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  }
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  return memoryReadHalf(v2p(vAddr, userMode, false));
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}
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Byte mmuReadByte(Word vAddr, Bool userMode) {
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  return memoryReadByte(v2p(vAddr, userMode, false));
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}
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void mmuWriteWord(Word vAddr, Word data, Bool userMode) {
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  if ((vAddr & 3) != 0) {
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    /* throw illegal address exception */
135 78 hellwig
    mmuBadAddr = vAddr;
136 8 hellwig
    throwException(EXC_ILL_ADDRESS);
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  }
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  memoryWriteWord(v2p(vAddr, userMode, true), data);
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}
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141
 
142
void mmuWriteHalf(Word vAddr, Half data, Bool userMode) {
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  if ((vAddr & 1) != 0) {
144
    /* throw illegal address exception */
145 78 hellwig
    mmuBadAddr = vAddr;
146 8 hellwig
    throwException(EXC_ILL_ADDRESS);
147
  }
148
  memoryWriteHalf(v2p(vAddr, userMode, true), data);
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}
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void mmuWriteByte(Word vAddr, Byte data, Bool userMode) {
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  memoryWriteByte(v2p(vAddr, userMode, true), data);
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}
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156
 
157
Word mmuGetIndex(void) {
158
  return tlbIndex;
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}
160
 
161
 
162
void mmuSetIndex(Word value) {
163
  tlbIndex = value & TLB_MASK;
164
}
165
 
166
 
167
Word mmuGetEntryHi(void) {
168
  return tlbEntryHi;
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}
170
 
171
 
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void mmuSetEntryHi(Word value) {
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  tlbEntryHi = value & PAGE_MASK;
174
}
175
 
176
 
177
Word mmuGetEntryLo(void) {
178
  return tlbEntryLo;
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}
180
 
181
 
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void mmuSetEntryLo(Word value) {
183
  tlbEntryLo = value & (PAGE_MASK | TLB_WRITE | TLB_VALID);
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}
185
 
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Word mmuGetBadAddr(void) {
188 78 hellwig
  return mmuBadAddr;
189 8 hellwig
}
190
 
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192
void mmuSetBadAddr(Word value) {
193 78 hellwig
  mmuBadAddr = value;
194 8 hellwig
}
195
 
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197
void mmuTbs(void) {
198
  int index;
199
 
200
  index = assoc(tlbEntryHi & PAGE_MASK);
201
  if (index == -1) {
202
    tlbIndex = 0x80000000;
203
  } else {
204
    tlbIndex = index;
205
  }
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}
207
 
208
 
209
void mmuTbwr(void) {
210
  int index;
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212
  /* choose a random index, but don't touch fixed entries */
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  do {
214
    index = rand() & TLB_MASK;
215
  } while (index < TLB_FIXED);
216
  tlb[index].page = tlbEntryHi & PAGE_MASK;
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  tlb[index].frame = tlbEntryLo & PAGE_MASK;
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  tlb[index].write = tlbEntryLo & TLB_WRITE ? true : false;
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  tlb[index].valid = tlbEntryLo & TLB_VALID ? true : false;
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  if (debugWrite) {
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    cPrintf("**** TLB[%02d] <- 0x%08X 0x%08X %c %c ****\n",
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            index, tlb[index].page, tlb[index].frame,
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            tlb[index].write ? 'w' : '-',
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            tlb[index].valid ? 'v' : '-');
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  }
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}
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void mmuTbri(void) {
230
  int index;
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  index = tlbIndex & TLB_MASK;
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  tlbEntryHi = tlb[index].page;
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  tlbEntryLo = tlb[index].frame;
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  if (tlb[index].write) {
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    tlbEntryLo |= TLB_WRITE;
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  }
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  if (tlb[index].valid) {
239
    tlbEntryLo |= TLB_VALID;
240
  }
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}
242
 
243
 
244
void mmuTbwi(void) {
245
  int index;
246
 
247
  index = tlbIndex & TLB_MASK;
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  tlb[index].page = tlbEntryHi & PAGE_MASK;
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  tlb[index].frame = tlbEntryLo & PAGE_MASK;
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  tlb[index].write = tlbEntryLo & TLB_WRITE ? true : false;
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  tlb[index].valid = tlbEntryLo & TLB_VALID ? true : false;
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  if (debugWrite) {
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    cPrintf("**** TLB[%02d] <- 0x%08X 0x%08X %c %c ****\n",
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            index, tlb[index].page, tlb[index].frame,
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            tlb[index].write ? 'w' : '-',
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            tlb[index].valid ? 'v' : '-');
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  }
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}
259
 
260
 
261
TLB_Entry mmuGetTLB(int index) {
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  return tlb[index & TLB_MASK];
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}
264
 
265
 
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void mmuSetTLB(int index, TLB_Entry tlbEntry) {
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  index &= TLB_MASK;
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  tlb[index] = tlbEntry;
269
  if (debugWrite) {
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    cPrintf("**** TLB[%02d] <- 0x%08X 0x%08X %c %c ****\n",
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            index, tlb[index].page, tlb[index].frame,
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            tlb[index].write ? 'w' : '-',
273
            tlb[index].valid ? 'v' : '-');
274
  }
275
}
276
 
277
 
278
void mmuReset(void) {
279
  int i;
280
 
281
  cPrintf("Resetting MMU...\n");
282
  for (i = 0; i < TLB_SIZE; i++) {
283
    tlb[i].page = rand() & PAGE_MASK;
284
    tlb[i].frame = rand() & PAGE_MASK;
285
    tlb[i].write = rand() & 0x1000 ? true : false;
286
    tlb[i].valid = rand() & 0x1000 ? true : false;
287
    if (debugWrite) {
288
      cPrintf("**** TLB[%02d] <- 0x%08X 0x%08X %c %c ****\n",
289
              i, tlb[i].page, tlb[i].frame,
290
              tlb[i].write ? 'w' : '-',
291
              tlb[i].valid ? 'v' : '-');
292
    }
293
  }
294
  tlbIndex = rand() & TLB_MASK;
295
  tlbEntryHi = rand() & PAGE_MASK;
296
  tlbEntryLo = rand() & (PAGE_MASK | TLB_WRITE | TLB_VALID);
297 78 hellwig
  mmuBadAddr = rand();
298 8 hellwig
}
299
 
300
 
301
void mmuInit(void) {
302
  mmuReset();
303
}
304
 
305
 
306
void mmuExit(void) {
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}

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