URL https://opencores.org/ocsvn/eco32/eco32/trunk

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[/] [eco32/] [trunk/] [simtest/] [rom/] [rom01.s] - Blame information for rev 244

Line No.	Rev	Author	Line
1	9	hellwig	`;`
2			`; rom01.s -- one example of each ECO32 instruction`
3			`;`
4
5			`add $5,$2,$13`
6			`add $5,$2,13`
7			`sub $5,$2,$13`
8			`sub $5,$2,13`
9
10			`mul $5,$2,$13`
11			`mul $5,$2,13`
12			`mulu $5,$2,$13`
13			`mulu $5,$2,13`
14			`div $5,$2,$13`
15			`div $5,$2,13`
16			`divu $5,$2,$13`
17			`divu $5,$2,13`
18			`rem $5,$2,$13`
19			`rem $5,$2,13`
20			`remu $5,$2,$13`
21			`remu $5,$2,13`
22
23			`and $5,$2,$13`
24			`and $5,$2,13`
25			`or $5,$2,$13`
26			`or $5,$2,13`
27			`xor $5,$2,$13`
28			`xor $5,$2,13`
29			`xnor $5,$2,$13`
30			`xnor $5,$2,13`
31
32			`sll $5,$2,$13`
33			`sll $5,$2,13`
34			`slr $5,$2,$13`
35			`slr $5,$2,13`
36			`sar $5,$2,$13`
37			`sar $5,$2,13`
38
39			`ldhi $5,L1`
40
41			`L1:`
42			`beq $5,$2,L1`
43			`bne $5,$2,L2`
44			`ble $5,$2,L1`
45			`bleu $5,$2,L2`
46			`blt $5,$2,L1`
47			`bltu $5,$2,L2`
48			`bge $5,$2,L1`
49			`bgeu $5,$2,L2`
50			`bgt $5,$2,L1`
51			`bgtu $5,$2,L2`
52
53			`j L1`
54			`jr $5`
55			`jal L2`
56			`jalr $5`
57			`L2:`
58
59			`trap 0x1234DEAD`
60			`rfx`
61
62			`ldw $5,$2,13`
63			`ldh $5,$2,13`
64			`ldhu $5,$2,-13`
65			`ldb $5,$2,13`
66			`ldbu $5,$2,-13`
67
68			`stw $5,$2,13`
69			`sth $5,$2,-13`
70			`stb $5,$2,13`
71
72			`mvfs $5,1`
73			`mvts $5,1`
74			`tbs`
75			`tbwr`
76			`tbri`
77			`tbwi`