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[/] [eco32/] [trunk/] [stdalone/] [dhrystone/] [port/] [start.s] - Blame information for rev 280

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;
; start.s -- startup code
;
 
        .import main
        .import _ecode
        .import _edata
        .import _ebss
 
        .export _bcode
        .export _bdata
        .export _bbss
 
        .code
_bcode:
 
        .data
_bdata:
 
        .bss
_bbss:
 
        .code
 
start:
        mvfs    $8,0
        or      $8,$8,1 << 27   ; let vector point to RAM
        mvts    $8,0
        add     $29,$0,stack     ; set sp
        add     $10,$0,_bdata    ; copy data segment
        add     $8,$0,_edata
        sub     $9,$8,$10
        add     $9,$9,_ecode
        j       cpytest
cpyloop:
        ldw     $11,$9,0
        stw     $11,$8,0
cpytest:
        sub     $8,$8,4
        sub     $9,$9,4
        bgeu    $8,$10,cpyloop
        add     $8,$0,_bbss      ; clear bss
        add     $9,$0,_ebss
        j       clrtest
clrloop:
        stw     $0,$8,0
        add     $8,$8,4
clrtest:
        bltu    $8,$9,clrloop
        jal     main            ; call 'main'
start1:
        j       start1          ; loop
 
        .bss
 
        .align  4
        .space  0x800
stack:

Line No.	Rev	Author	Line
1	280	hellwig	`;`
2			`; start.s -- startup code`
3			`;`
4
5			`.import main`
6			`.import _ecode`
7			`.import _edata`
8			`.import _ebss`
9
10			`.export _bcode`
11			`.export _bdata`
12			`.export _bbss`
13
14			`.code`
15			`_bcode:`
16
17			`.data`
18			`_bdata:`
19
20			`.bss`
21			`_bbss:`
22
23			`.code`
24
25			`start:`
26			`mvfs $8,0`
27			`or $8,$8,1 << 27 ; let vector point to RAM`
28			`mvts $8,0`
29			`add $29,$0,stack ; set sp`
30			`add $10,$0,_bdata ; copy data segment`
31			`add $8,$0,_edata`
32			`sub $9,$8,$10`
33			`add $9,$9,_ecode`
34			`j cpytest`
35			`cpyloop:`
36			`ldw $11,$9,0`
37			`stw $11,$8,0`
38			`cpytest:`
39			`sub $8,$8,4`
40			`sub $9,$9,4`
41			`bgeu $8,$10,cpyloop`
42			`add $8,$0,_bbss ; clear bss`
43			`add $9,$0,_ebss`
44			`j clrtest`
45			`clrloop:`
46			`stw $0,$8,0`
47			`add $8,$8,4`
48			`clrtest:`
49			`bltu $8,$9,clrloop`
50			`jal main ; call 'main'`
51			`start1:`
52			`j start1 ; loop`
53
54			`.bss`
55
56			`.align 4`
57			`.space 0x800`
58			`stack:`

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[/] [eco32/] [trunk/] [stdalone/] [dhrystone/] [port/] [start.s] - Blame information for rev 280