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[/] [eco32/] [trunk/] [stdalone/] [twotasks-1/] [os/] [start.s] - Blame information for rev 317

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Line No. Rev Author Line
1 18 hellwig
;
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; start.s -- startup code
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;
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        .import main
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        .import task0StkTop
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        .import currentStkTop
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        .import _ecode
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        .import _edata
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        .import _ebss
11
 
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        .export _bcode
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        .export _bdata
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        .export _bbss
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        .export enable
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        .export disable
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        .export orMask
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        .export andMask
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        .export getISR
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        .export setISR
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        .export startTask
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        .export setTLB
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        .code
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_bcode:
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        .data
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_bdata:
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        .bss
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_bbss:
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        .code
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        ; reset arrives here
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reset:
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        j       start
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        ; interrupts arrive here
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intrpt:
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        j       isr
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        ; user TLB misses arrive here
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userMiss:
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        j       isr
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isr:
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        add     $26,$29,$0               ; sp -> $26
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        add     $27,$1,$0                ; $1 -> $27
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        ldw     $29,$0,currentStkTop     ; setup kernel mode stack
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        sub     $29,$29,128             ; save registers
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        stw     $2,$29,8
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        stw     $3,$29,12
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        stw     $4,$29,16
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        stw     $5,$29,20
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        stw     $6,$29,24
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        stw     $7,$29,28
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        stw     $8,$29,32
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        stw     $9,$29,36
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        stw     $10,$29,40
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        stw     $11,$29,44
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        stw     $12,$29,48
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        stw     $13,$29,52
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        stw     $14,$29,56
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        stw     $15,$29,60
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        stw     $16,$29,64
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        stw     $17,$29,68
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        stw     $18,$29,72
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        stw     $19,$29,76
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        stw     $20,$29,80
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        stw     $21,$29,84
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        stw     $22,$29,88
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        stw     $23,$29,92
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        stw     $24,$29,96
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        stw     $25,$29,100
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        stw     $26,$29,116             ; this is the task's sp
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        stw     $27,$29,4               ; this is the task's $1
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        stw     $30,$29,120             ; this is the task's resumption addr
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        stw     $31,$29,124
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        add     $5,$29,$0                ; $5 = pointer to register array
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        mvfs    $4,0                     ; $4 = IRQ number
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        slr     $4,$4,16
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        and     $4,$4,0x1F
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        sll     $26,$4,2                ; $26 = 4 * IRQ number
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        ldw     $26,$26,irqsrv          ; get addr of service routine
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        jalr    $26                     ; call service routine
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        j       resume                  ; resume task if ISR returns
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        ; resume a task
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resume:
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        ldw     $29,$0,currentStkTop     ; setup kernel mode stack
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        sub     $29,$29,128             ; restore registers
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        ldw     $2,$29,8
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        ldw     $3,$29,12
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        ldw     $4,$29,16
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        ldw     $5,$29,20
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        ldw     $6,$29,24
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        ldw     $7,$29,28
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        ldw     $8,$29,32
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        ldw     $9,$29,36
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        ldw     $10,$29,40
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        ldw     $11,$29,44
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        ldw     $12,$29,48
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        ldw     $13,$29,52
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        ldw     $14,$29,56
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        ldw     $15,$29,60
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        ldw     $16,$29,64
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        ldw     $17,$29,68
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        ldw     $18,$29,72
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        ldw     $19,$29,76
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        ldw     $20,$29,80
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        ldw     $21,$29,84
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        ldw     $22,$29,88
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        ldw     $23,$29,92
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        ldw     $24,$29,96
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        ldw     $25,$29,100
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        ldw     $26,$29,116             ; this is the task's sp
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        ldw     $27,$29,4               ; this is the task's $1
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        ldw     $30,$29,120             ; this is the task's resumption addr
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        ldw     $31,$29,124
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        add     $1,$27,$0                ; $27 -> $1
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        add     $29,$26,$0               ; $26 -> sp
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        rfx                             ; return from exception
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start:
127 101 hellwig
        add     $8,$0,0xA8003FFF
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        add     $9,$0,0xC0000000
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        stw     $8,$9,0          ; 0xC0000000: j 0xC0010000
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        stw     $8,$9,4         ; 0xC0000004: j 0xC0010004
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        stw     $8,$9,8         ; 0xC0000008: j 0xC0010008
132 18 hellwig
        mvfs    $8,0
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        or      $8,$8,1 << 27           ; let vector point to RAM
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        mvts    $8,0
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        add     $10,$0,_bdata            ; copy data segment
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        add     $8,$0,_edata
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        sub     $9,$8,$10
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        add     $9,$9,_ecode
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        j       cpytest
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cpyloop:
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        ldw     $11,$9,0
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        stw     $11,$8,0
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cpytest:
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        sub     $8,$8,4
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        sub     $9,$9,4
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        bgeu    $8,$10,cpyloop
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        add     $8,$0,_bbss              ; clear bss
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        add     $9,$0,_ebss
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        j       clrtest
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clrloop:
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        stw     $0,$8,0
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        add     $8,$8,4
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clrtest:
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        bltu    $8,$9,clrloop
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        ldw     $29,$0,task0StkTop       ; setup kernel mode stack for task 0
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        jal     main                    ; call 'main'
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start1:
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        j       start1                  ; loop
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enable:
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        mvfs    $8,0
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        or      $8,$8,1 << 23
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        mvts    $8,0
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        jr      $31
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disable:
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        mvfs    $8,0
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        and     $8,$8,~(1 << 23)
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        mvts    $8,0
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        jr      $31
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orMask:
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        mvfs    $8,0
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        and     $4,$4,0x0000FFFF        ; use lower 16 bits only
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        or      $8,$8,$4
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        mvts    $8,0
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        jr      $31
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andMask:
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        mvfs    $8,0
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        or      $4,$4,0xFFFF0000        ; use lower 16 bits only
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        and     $8,$8,$4
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        mvts    $8,0
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        jr      $31
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getISR:
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        sll     $4,$4,2
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        ldw     $2,$4,irqsrv
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        jr      $31
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setISR:
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        sll     $4,$4,2
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        stw     $5,$4,irqsrv
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        jr      $31
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startTask:
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        ldw     $29,$0,currentStkTop     ; setup kernel mode stack
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        sub     $29,$29,128
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        stw     $0,$29,0          ; preset registers
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        stw     $0,$29,4
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        stw     $0,$29,8
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        stw     $0,$29,12
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        stw     $0,$29,16
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        stw     $0,$29,20
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        stw     $0,$29,24
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        stw     $0,$29,28
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        stw     $0,$29,32
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        stw     $0,$29,36
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        stw     $0,$29,40
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        stw     $0,$29,44
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        stw     $0,$29,48
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        stw     $0,$29,52
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        stw     $0,$29,56
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        stw     $0,$29,60
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        stw     $0,$29,64
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        stw     $0,$29,68
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        stw     $0,$29,72
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        stw     $0,$29,76
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        stw     $0,$29,80
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        stw     $0,$29,84
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        stw     $0,$29,88
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        stw     $0,$29,92
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        stw     $0,$29,96
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        stw     $0,$29,100
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        stw     $0,$29,104
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        stw     $0,$29,108
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        stw     $0,$29,112
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        add     $8,$0,0x80000000
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        stw     $8,$29,116              ; sp
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        stw     $0,$29,120               ; task starts at virtual addr 0
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        stw     $0,$29,124
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        mvfs    $8,0
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        or      $8,$8,1 << 25           ; set previous mode to 'user'
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        or      $8,$8,1 << 22           ; and enable interrupts
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        mvts    $8,0
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        j       resume
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setTLB:
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        mvts    $4,1                    ; set index
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        mvts    $5,2                    ; set entryHi
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        mvts    $6,3                    ; set entryLo
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        tbwi                            ; write TLB entry at index
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        jr      $31
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        .data
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; interrupt service routine table
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        .align  4
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irqsrv:
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        .word   0                ; 00: terminal 0 transmitter interrupt
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        .word   0                ; 01: terminal 0 receiver interrupt
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        .word   0                ; 02: terminal 1 transmitter interrupt
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        .word   0                ; 03: terminal 1 receiver interrupt
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        .word   0                ; 04: keyboard interrupt
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        .word   0                ; 05: unused
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        .word   0                ; 06: unused
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        .word   0                ; 07: unused
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        .word   0                ; 08: disk interrupt
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        .word   0                ; 09: unused
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        .word   0                ; 10: unused
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        .word   0                ; 11: unused
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        .word   0                ; 12: unused
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        .word   0                ; 13: unused
266 38 hellwig
        .word   0                ; 14: timer 0 interrupt
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        .word   0                ; 15: timer 1 interrupt
268 18 hellwig
        .word   0                ; 16: bus timeout exception
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        .word   0                ; 17: illegal instruction exception
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        .word   0                ; 18: privileged instruction exception
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        .word   0                ; 19: divide instruction exception
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        .word   0                ; 20: trap instruction exception
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        .word   0                ; 21: TLB miss exception
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        .word   0                ; 22: TLB write exception
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        .word   0                ; 23: TLB invalid exception
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        .word   0                ; 24: illegal address exception
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        .word   0                ; 25: privileged address exception
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        .word   0                ; 26: unused
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        .word   0                ; 27: unused
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        .word   0                ; 28: unused
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        .word   0                ; 29: unused
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        .word   0                ; 30: unused
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        .word   0                ; 31: unused

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