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lmaarsen |
# ---------------------------------------------------------------------------------
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# BUILD SCRIPT
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# ---------------------------------------------------------------------------------
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#
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# Build custom IP
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#
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/package_txt_utilities.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/package_crc32_8b.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/package_hash10_24b.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/package_hash10_48b.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/package_esoc_configuration.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_clk_en_gen.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_control.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_bus_arbiter.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_mal_clock.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_mal_control.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_mal_inbound.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_mal_outbound.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_mal.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_interface.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_processor.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_processor_control.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_processor_inbound.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_processor_outbound.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_processor_search.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port_storage.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_port.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_reset.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_search_engine.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_search_engine_control.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_search_engine_da.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_search_engine_sa.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_search_engine_sa_store.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc.vhd
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#
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# Build vendor IP
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#
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_pll1_c3/esoc_pll1_c3.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_pll2_c3/esoc_pll2_c3.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx112/esoc_fifo_256x112.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx80/esoc_fifo_128x80.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx32/esoc_fifo_2kx32.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx32/esoc_fifo_256x32.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx16/esoc_fifo_256x16.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx32x64/esoc_fifo_2kx32x64.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_fifo_nkx32x64/esoc_fifo_2kx64x32.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_ram_nkx1/esoc_ram_4kx1.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_ram_nkx80/esoc_ram_8kx80.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_rom_nkx32/esoc_rom_2kx32.vhd
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vcom -work work -source -2002 $path_project_files/$path_design_files_altera/esoc_port_mac/esoc_port_mac.vho
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#
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# Build testbench
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#
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vcom -work work -source -2002 $path_project_files/$path_design_files_logixa/esoc_tb.vhd
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#
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# ---------------------------------------------------------------------------------
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# START MODELSIM
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# ---------------------------------------------------------------------------------
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# vsim -t ps work.esoc_tb
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