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[/] [esoc/] [trunk/] [Simulation/] [Modelsim/] [esoc_ram_4kx1.mif] - Blame information for rev 56
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-- Copyright (C) 1991-2008 Altera Corporation
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-- Your use of Altera Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Altera Program License
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-- Subscription Agreement, Altera MegaCore Function License
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-- Agreement, or other applicable license agreement, including,
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-- without limitation, that your use is for the sole purpose of
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-- programming logic devices manufactured by Altera and sold by
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-- Altera or its authorized distributors. Please refer to the
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-- applicable agreement for further details.
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-- Quartus II generated Memory Initialization File (.mif)
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WIDTH=1;
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DEPTH=4096;
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ADDRESS_RADIX=HEX;
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DATA_RADIX=HEX;
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CONTENT BEGIN
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[0000..0001] : 1;
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[0002..0FFF] : 0;
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END;
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