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1 42 lmaarsen 
<html>
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<title>Sample Waveforms for esoc_fifo_16kx32.vhd </title>
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<body>
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<h2><CENTER>Sample behavioral waveforms for design file esoc_fifo_16kx32.vhd </CENTER></h2>
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<P>The following waveforms show the behavior of dcfifo megafunction for the chosen set of parameters in design esoc_fifo_16kx32.vhd.  The design esoc_fifo_16kx32.vhd has a depth of 16384 words of 8 bits each. The fifo is in legacy synchronous mode.  The data becomes available after 'rdreq' is asserted; 'rdreq' acts as a read request. </P>
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<CENTER><img src=esoc_fifo_16kx32_wave0.jpg> </CENTER>
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<P><CENTER><FONT size=2>Fig. 1 : Wave showing read and write operation. </CENTER></P>
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<P><FONT size=3>The above waveform shows the behavior of the design under normal read and write conditions with aclr . </P>

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