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lmaarsen |
-- megafunction wizard: %Triple Speed Ethernet v8.1%
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-- GENERATION: XML
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-- ============================================================
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-- Megafunction Name(s):
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-- altera_tse_mac
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-- ============================================================
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-- Generated by Triple Speed Ethernet 8.1 [Altera, IP Toolbench 1.3.0 Build 163]
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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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-- ************************************************************
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-- Copyright (C) 1991-2013 Altera Corporation
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-- Any megafunction design, and related net list (encrypted or decrypted),
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-- support information, device programming or simulation file, and any other
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-- associated documentation or information provided by Altera or a partner
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-- under Altera's Megafunction Partnership Program may be used only to
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-- program PLD devices (but not masked PLD devices) from Altera. Any other
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-- use of such megafunction design, net list, support information, device
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-- programming or simulation file, or any other related documentation or
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-- information is prohibited for any other purpose, including, but not
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-- limited to modification, reverse engineering, de-compiling, or use with
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-- any other silicon devices, unless such use is explicitly licensed under
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-- a separate agreement with Altera or a megafunction partner. Title to
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-- the intellectual property, including patents, copyrights, trademarks,
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-- trade secrets, or maskworks, embodied in any such megafunction design,
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-- net list, support information, device programming or simulation file, or
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-- any other related documentation or information provided by Altera or a
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-- megafunction partner, remains with Altera, the megafunction partner, or
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-- their respective licensors. No other licenses, including any licenses
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-- needed under any third party's intellectual property, are provided herein.
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library IEEE;
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use IEEE.std_logic_1164.all;
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ENTITY esoc_port_mac IS
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PORT (
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ff_tx_crc_fwd : IN STD_LOGIC;
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ff_tx_data : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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ff_tx_eop : IN STD_LOGIC;
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ff_tx_err : IN STD_LOGIC;
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ff_tx_mod : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
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ff_tx_sop : IN STD_LOGIC;
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ff_tx_wren : IN STD_LOGIC;
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ff_tx_clk : IN STD_LOGIC;
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ff_rx_rdy : IN STD_LOGIC;
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ff_rx_clk : IN STD_LOGIC;
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address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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read : IN STD_LOGIC;
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writedata : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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write : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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reset : IN STD_LOGIC;
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rgmii_in : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
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rx_control : IN STD_LOGIC;
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tx_clk : IN STD_LOGIC;
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rx_clk : IN STD_LOGIC;
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set_10 : IN STD_LOGIC;
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set_1000 : IN STD_LOGIC;
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xon_gen : IN STD_LOGIC;
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xoff_gen : IN STD_LOGIC;
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magic_sleep_n : IN STD_LOGIC;
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mdio_in : IN STD_LOGIC;
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ff_tx_rdy : OUT STD_LOGIC;
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ff_rx_data : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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ff_rx_dval : OUT STD_LOGIC;
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ff_rx_eop : OUT STD_LOGIC;
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ff_rx_mod : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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ff_rx_sop : OUT STD_LOGIC;
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rx_err : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
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rx_err_stat : OUT STD_LOGIC_VECTOR (17 DOWNTO 0);
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rx_frm_type : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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ff_rx_dsav : OUT STD_LOGIC;
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readdata : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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waitrequest : OUT STD_LOGIC;
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rgmii_out : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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tx_control : OUT STD_LOGIC;
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ena_10 : OUT STD_LOGIC;
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eth_mode : OUT STD_LOGIC;
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ff_tx_septy : OUT STD_LOGIC;
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tx_ff_uflow : OUT STD_LOGIC;
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ff_rx_a_full : OUT STD_LOGIC;
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ff_rx_a_empty : OUT STD_LOGIC;
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ff_tx_a_full : OUT STD_LOGIC;
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ff_tx_a_empty : OUT STD_LOGIC;
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magic_wakeup : OUT STD_LOGIC;
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mdio_out : OUT STD_LOGIC;
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mdio_oen : OUT STD_LOGIC;
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mdc : OUT STD_LOGIC
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);
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END esoc_port_mac;
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ARCHITECTURE SYN OF esoc_port_mac IS
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COMPONENT altera_tse_mac
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GENERIC (
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ENABLE_MAGIC_DETECT : NATURAL;
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ENABLE_MDIO : NATURAL;
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ENABLE_SHIFT16 : NATURAL;
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ENABLE_SUP_ADDR : NATURAL;
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CORE_VERSION : STD_LOGIC_VECTOR := X"0800";
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CRC32GENDELAY : NATURAL;
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MDIO_CLK_DIV : NATURAL;
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ENA_HASH : NATURAL;
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USE_SYNC_RESET : NATURAL;
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STAT_CNT_ENA : NATURAL;
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ENABLE_HD_LOGIC : NATURAL;
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REDUCED_INTERFACE_ENA : NATURAL;
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CRC32S1L2_EXTERN : NATURAL;
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ENABLE_GMII_LOOPBACK : NATURAL;
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CRC32DWIDTH : NATURAL;
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CUST_VERSION : NATURAL;
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RESET_LEVEL : STD_LOGIC_VECTOR := X"01";
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CRC32CHECK16BIT : STD_LOGIC_VECTOR := X"00";
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ENABLE_MAC_FLOW_CTRL : NATURAL;
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ENABLE_MAC_TXADDR_SET : NATURAL;
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ENABLE_MAC_RX_VLAN : NATURAL;
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ENABLE_MAC_TX_VLAN : NATURAL;
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EG_FIFO : NATURAL;
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EG_ADDR : NATURAL;
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ING_FIFO : NATURAL;
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ENABLE_ENA : NATURAL;
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ING_ADDR : NATURAL;
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RAM_TYPE : STRING;
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INSERT_TA : NATURAL;
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ENABLE_MACLITE : NATURAL;
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MACLITE_GIGE : NATURAL
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);
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PORT (
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ff_tx_crc_fwd : IN STD_LOGIC;
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ff_tx_data : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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ff_tx_eop : IN STD_LOGIC;
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ff_tx_err : IN STD_LOGIC;
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ff_tx_mod : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
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ff_tx_sop : IN STD_LOGIC;
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ff_tx_wren : IN STD_LOGIC;
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ff_tx_clk : IN STD_LOGIC;
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ff_rx_rdy : IN STD_LOGIC;
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ff_rx_clk : IN STD_LOGIC;
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address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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read : IN STD_LOGIC;
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writedata : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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write : IN STD_LOGIC;
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clk : IN STD_LOGIC;
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reset : IN STD_LOGIC;
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rgmii_in : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
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rx_control : IN STD_LOGIC;
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tx_clk : IN STD_LOGIC;
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rx_clk : IN STD_LOGIC;
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set_10 : IN STD_LOGIC;
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set_1000 : IN STD_LOGIC;
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xon_gen : IN STD_LOGIC;
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xoff_gen : IN STD_LOGIC;
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magic_sleep_n : IN STD_LOGIC;
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mdio_in : IN STD_LOGIC;
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ff_tx_rdy : OUT STD_LOGIC;
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ff_rx_data : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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ff_rx_dval : OUT STD_LOGIC;
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ff_rx_eop : OUT STD_LOGIC;
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ff_rx_mod : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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ff_rx_sop : OUT STD_LOGIC;
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rx_err : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
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rx_err_stat : OUT STD_LOGIC_VECTOR (17 DOWNTO 0);
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rx_frm_type : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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ff_rx_dsav : OUT STD_LOGIC;
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readdata : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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waitrequest : OUT STD_LOGIC;
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rgmii_out : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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tx_control : OUT STD_LOGIC;
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ena_10 : OUT STD_LOGIC;
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eth_mode : OUT STD_LOGIC;
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ff_tx_septy : OUT STD_LOGIC;
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tx_ff_uflow : OUT STD_LOGIC;
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ff_rx_a_full : OUT STD_LOGIC;
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ff_rx_a_empty : OUT STD_LOGIC;
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ff_tx_a_full : OUT STD_LOGIC;
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ff_tx_a_empty : OUT STD_LOGIC;
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magic_wakeup : OUT STD_LOGIC;
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mdio_out : OUT STD_LOGIC;
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mdio_oen : OUT STD_LOGIC;
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mdc : OUT STD_LOGIC
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);
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END COMPONENT;
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BEGIN
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altera_tse_mac_inst : altera_tse_mac
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GENERIC MAP (
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ENABLE_MAGIC_DETECT => 1,
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ENABLE_MDIO => 1,
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ENABLE_SHIFT16 => 0,
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ENABLE_SUP_ADDR => 0,
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CORE_VERSION => X"0800",
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CRC32GENDELAY => 6,
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MDIO_CLK_DIV => 40,
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ENA_HASH => 0,
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USE_SYNC_RESET => 0,
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STAT_CNT_ENA => 1,
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ENABLE_HD_LOGIC => 1,
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REDUCED_INTERFACE_ENA => 1,
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CRC32S1L2_EXTERN => 0,
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ENABLE_GMII_LOOPBACK => 1,
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CRC32DWIDTH => 8,
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CUST_VERSION => 0,
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RESET_LEVEL => X"01",
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CRC32CHECK16BIT => X"00",
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ENABLE_MAC_FLOW_CTRL => 1,
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ENABLE_MAC_TXADDR_SET => 1,
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ENABLE_MAC_RX_VLAN => 0,
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ENABLE_MAC_TX_VLAN => 0,
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EG_FIFO => 2048,
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EG_ADDR => 11,
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ING_FIFO => 2048,
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ENABLE_ENA => 32,
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ING_ADDR => 11,
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RAM_TYPE => "AUTO",
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INSERT_TA => 0,
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ENABLE_MACLITE => 0,
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MACLITE_GIGE => 0
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)
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PORT MAP (
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ff_tx_crc_fwd => ff_tx_crc_fwd,
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ff_tx_data => ff_tx_data,
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ff_tx_eop => ff_tx_eop,
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ff_tx_err => ff_tx_err,
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ff_tx_mod => ff_tx_mod,
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ff_tx_rdy => ff_tx_rdy,
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ff_tx_sop => ff_tx_sop,
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ff_tx_wren => ff_tx_wren,
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ff_tx_clk => ff_tx_clk,
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ff_rx_data => ff_rx_data,
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ff_rx_dval => ff_rx_dval,
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ff_rx_eop => ff_rx_eop,
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ff_rx_mod => ff_rx_mod,
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ff_rx_rdy => ff_rx_rdy,
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ff_rx_sop => ff_rx_sop,
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rx_err => rx_err,
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rx_err_stat => rx_err_stat,
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rx_frm_type => rx_frm_type,
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ff_rx_dsav => ff_rx_dsav,
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ff_rx_clk => ff_rx_clk,
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address => address,
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readdata => readdata,
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read => read,
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writedata => writedata,
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write => write,
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waitrequest => waitrequest,
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clk => clk,
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reset => reset,
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rgmii_in => rgmii_in,
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rgmii_out => rgmii_out,
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rx_control => rx_control,
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tx_control => tx_control,
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tx_clk => tx_clk,
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256 |
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rx_clk => rx_clk,
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set_10 => set_10,
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set_1000 => set_1000,
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ena_10 => ena_10,
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eth_mode => eth_mode,
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ff_tx_septy => ff_tx_septy,
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tx_ff_uflow => tx_ff_uflow,
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263 |
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ff_rx_a_full => ff_rx_a_full,
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264 |
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ff_rx_a_empty => ff_rx_a_empty,
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ff_tx_a_full => ff_tx_a_full,
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ff_tx_a_empty => ff_tx_a_empty,
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xon_gen => xon_gen,
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xoff_gen => xoff_gen,
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magic_wakeup => magic_wakeup,
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magic_sleep_n => magic_sleep_n,
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mdio_out => mdio_out,
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272 |
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mdio_oen => mdio_oen,
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273 |
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mdio_in => mdio_in,
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274 |
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mdc => mdc
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);
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END SYN;
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281 |
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-- =========================================================
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282 |
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-- Triple Speed Ethernet Wizard Data
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283 |
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-- ===============================
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284 |
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-- DO NOT EDIT FOLLOWING DATA
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285 |
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-- @Altera, IP Toolbench@
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286 |
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-- Warning: If you modify this section, Triple Speed Ethernet Wizard may not be able to reproduce your chosen configuration.
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287 |
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--
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288 |
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-- Retrieval info: <?xml version="1.0"?>
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289 |
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-- Retrieval info: <MEGACORE title="Triple Speed Ethernet MegaCore Function" version="8.1" build="163" iptb_version="1.3.0 Build 163" format_version="120" >
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-- Retrieval info: <NETLIST_SECTION class="altera.ipbu.flowbase.netlist.model.TSEMVCModel" active_core="altera_tse_mac" >
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-- Retrieval info: <STATIC_SECTION>
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-- Retrieval info: <PRIVATES>
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293 |
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-- Retrieval info: <NAMESPACE name = "parameterization">
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-- Retrieval info: <PRIVATE name = "atlanticSinkClockRate" value="0" type="STRING" enable="1" />
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295 |
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-- Retrieval info: <PRIVATE name = "atlanticSinkClockSource" value="unassigned" type="STRING" enable="1" />
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296 |
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-- Retrieval info: <PRIVATE name = "atlanticSourceClockRate" value="0" type="STRING" enable="1" />
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297 |
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-- Retrieval info: <PRIVATE name = "atlanticSourceClockSource" value="unassigned" type="STRING" enable="1" />
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298 |
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-- Retrieval info: <PRIVATE name = "avalonSlaveClockRate" value="0" type="STRING" enable="1" />
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299 |
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-- Retrieval info: <PRIVATE name = "avalonSlaveClockSource" value="unassigned" type="STRING" enable="1" />
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300 |
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-- Retrieval info: <PRIVATE name = "avalonStNeighbours" value="{}" type="STRING" enable="1" />
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301 |
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-- Retrieval info: <PRIVATE name = "channel_count" value="1" type="INTEGER" enable="1" />
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302 |
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-- Retrieval info: <PRIVATE name = "core_variation" value="MAC_ONLY" type="STRING" enable="1" />
|
303 |
|
|
-- Retrieval info: <PRIVATE name = "core_version" value="1794" type="STRING" enable="1" />
|
304 |
|
|
-- Retrieval info: <PRIVATE name = "crc32dwidth" value="8" type="INTEGER" enable="1" />
|
305 |
|
|
-- Retrieval info: <PRIVATE name = "crc32gendelay" value="6" type="INTEGER" enable="1" />
|
306 |
|
|
-- Retrieval info: <PRIVATE name = "crc32s1l2_extern" value="0" type="BOOLEAN" enable="1" />
|
307 |
|
|
-- Retrieval info: <PRIVATE name = "cust_version" value="0" type="INTEGER" enable="1" />
|
308 |
|
|
-- Retrieval info: <PRIVATE name = "dataBitsPerSymbol" value="8" type="INTEGER" enable="1" />
|
309 |
|
|
-- Retrieval info: <PRIVATE name = "dev_version" value="2048" type="STRING" enable="1" />
|
310 |
|
|
-- Retrieval info: <PRIVATE name = "deviceFamily" value="STRATIX" type="STRING" enable="1" />
|
311 |
|
|
-- Retrieval info: <PRIVATE name = "eg_addr" value="11" type="INTEGER" enable="1" />
|
312 |
|
|
-- Retrieval info: <PRIVATE name = "eg_fifo" value="2048" type="INTEGER" enable="1" />
|
313 |
|
|
-- Retrieval info: <PRIVATE name = "ena_hash" value="0" type="BOOLEAN" enable="1" />
|
314 |
|
|
-- Retrieval info: <PRIVATE name = "enable_alt_reconfig" value="0" type="BOOLEAN" enable="1" />
|
315 |
|
|
-- Retrieval info: <PRIVATE name = "enable_clk_sharing" value="0" type="BOOLEAN" enable="1" />
|
316 |
|
|
-- Retrieval info: <PRIVATE name = "enable_ena" value="32" type="INTEGER" enable="1" />
|
317 |
|
|
-- Retrieval info: <PRIVATE name = "enable_fifoless" value="0" type="BOOLEAN" enable="1" />
|
318 |
|
|
-- Retrieval info: <PRIVATE name = "enable_gmii_loopback" value="1" type="BOOLEAN" enable="1" />
|
319 |
|
|
-- Retrieval info: <PRIVATE name = "enable_hd_logic" value="1" type="BOOLEAN" enable="1" />
|
320 |
|
|
-- Retrieval info: <PRIVATE name = "enable_mac_flow_ctrl" value="1" type="BOOLEAN" enable="1" />
|
321 |
|
|
-- Retrieval info: <PRIVATE name = "enable_mac_txaddr_set" value="1" type="BOOLEAN" enable="1" />
|
322 |
|
|
-- Retrieval info: <PRIVATE name = "enable_mac_vlan" value="0" type="BOOLEAN" enable="1" />
|
323 |
|
|
-- Retrieval info: <PRIVATE name = "enable_maclite" value="0" type="BOOLEAN" enable="1" />
|
324 |
|
|
-- Retrieval info: <PRIVATE name = "enable_magic_detect" value="1" type="BOOLEAN" enable="1" />
|
325 |
|
|
-- Retrieval info: <PRIVATE name = "enable_multi_channel" value="0" type="BOOLEAN" enable="1" />
|
326 |
|
|
-- Retrieval info: <PRIVATE name = "enable_pkt_class" value="1" type="BOOLEAN" enable="1" />
|
327 |
|
|
-- Retrieval info: <PRIVATE name = "enable_pma" value="0" type="BOOLEAN" enable="1" />
|
328 |
|
|
-- Retrieval info: <PRIVATE name = "enable_reg_sharing" value="0" type="BOOLEAN" enable="1" />
|
329 |
|
|
-- Retrieval info: <PRIVATE name = "enable_sgmii" value="0" type="BOOLEAN" enable="1" />
|
330 |
|
|
-- Retrieval info: <PRIVATE name = "enable_shift16" value="0" type="BOOLEAN" enable="1" />
|
331 |
|
|
-- Retrieval info: <PRIVATE name = "enable_sup_addr" value="0" type="BOOLEAN" enable="1" />
|
332 |
|
|
-- Retrieval info: <PRIVATE name = "enable_use_internal_fifo" value="1" type="BOOLEAN" enable="1" />
|
333 |
|
|
-- Retrieval info: <PRIVATE name = "export_calblkclk" value="0" type="BOOLEAN" enable="1" />
|
334 |
|
|
-- Retrieval info: <PRIVATE name = "export_pwrdn" value="0" type="BOOLEAN" enable="1" />
|
335 |
|
|
-- Retrieval info: <PRIVATE name = "gigeAdvanceMode" value="1" type="BOOLEAN" enable="1" />
|
336 |
|
|
-- Retrieval info: <PRIVATE name = "ifGMII" value="RGMII" type="STRING" enable="1" />
|
337 |
|
|
-- Retrieval info: <PRIVATE name = "ifPCSuseEmbeddedSerdes" value="0" type="BOOLEAN" enable="1" />
|
338 |
|
|
-- Retrieval info: <PRIVATE name = "ing_addr" value="11" type="INTEGER" enable="1" />
|
339 |
|
|
-- Retrieval info: <PRIVATE name = "ing_fifo" value="2048" type="INTEGER" enable="1" />
|
340 |
|
|
-- Retrieval info: <PRIVATE name = "insert_ta" value="0" type="BOOLEAN" enable="1" />
|
341 |
|
|
-- Retrieval info: <PRIVATE name = "maclite_gige" value="0" type="BOOLEAN" enable="1" />
|
342 |
|
|
-- Retrieval info: <PRIVATE name = "max_channels" value="0" type="INTEGER" enable="1" />
|
343 |
|
|
-- Retrieval info: <PRIVATE name = "mdio_clk_div" value="40" type="INTEGER" enable="1" />
|
344 |
|
|
-- Retrieval info: <PRIVATE name = "phy_identifier" value="0" type="STRING" enable="1" />
|
345 |
|
|
-- Retrieval info: <PRIVATE name = "ramType" value="AUTO" type="STRING" enable="1" />
|
346 |
|
|
-- Retrieval info: <PRIVATE name = "sopcSystemTopLevelName" value="system" type="STRING" enable="1" />
|
347 |
|
|
-- Retrieval info: <PRIVATE name = "stat_cnt_ena" value="1" type="BOOLEAN" enable="1" />
|
348 |
|
|
-- Retrieval info: <PRIVATE name = "timingAdapterName" value="timingAdapter" type="STRING" enable="1" />
|
349 |
|
|
-- Retrieval info: <PRIVATE name = "toolContext" value="STANDALONE" type="STRING" enable="1" />
|
350 |
|
|
-- Retrieval info: <PRIVATE name = "transceiver_type" value="GXB" type="STRING" enable="1" />
|
351 |
|
|
-- Retrieval info: <PRIVATE name = "uiEgFIFOSize" value="2048 x 32 Bits" type="STRING" enable="1" />
|
352 |
|
|
-- Retrieval info: <PRIVATE name = "uiHostClockFrequency" value="0" type="INTEGER" enable="1" />
|
353 |
|
|
-- Retrieval info: <PRIVATE name = "uiIngFIFOSize" value="2048 x 32 Bits" type="STRING" enable="1" />
|
354 |
|
|
-- Retrieval info: <PRIVATE name = "uiMACFIFO" value="0" type="BOOLEAN" enable="1" />
|
355 |
|
|
-- Retrieval info: <PRIVATE name = "uiMACOptions" value="0" type="BOOLEAN" enable="1" />
|
356 |
|
|
-- Retrieval info: <PRIVATE name = "uiMDIOFreq" value="0.0 MHz" type="STRING" enable="1" />
|
357 |
|
|
-- Retrieval info: <PRIVATE name = "uiMIIInterfaceOptions" value="0" type="BOOLEAN" enable="1" />
|
358 |
|
|
-- Retrieval info: <PRIVATE name = "uiPCSInterface" value="0" type="BOOLEAN" enable="1" />
|
359 |
|
|
-- Retrieval info: <PRIVATE name = "uiPCSInterfaceOptions" value="0" type="BOOLEAN" enable="1" />
|
360 |
|
|
-- Retrieval info: <PRIVATE name = "useLvds" value="0" type="BOOLEAN" enable="1" />
|
361 |
|
|
-- Retrieval info: <PRIVATE name = "useMAC" value="1" type="BOOLEAN" enable="1" />
|
362 |
|
|
-- Retrieval info: <PRIVATE name = "useMDIO" value="1" type="BOOLEAN" enable="1" />
|
363 |
|
|
-- Retrieval info: <PRIVATE name = "usePCS" value="0" type="BOOLEAN" enable="1" />
|
364 |
|
|
-- Retrieval info: <PRIVATE name = "use_sync_reset" value="0" type="BOOLEAN" enable="1" />
|
365 |
|
|
-- Retrieval info: </NAMESPACE>
|
366 |
|
|
-- Retrieval info: <NAMESPACE name = "simgen_enable">
|
367 |
|
|
-- Retrieval info: <PRIVATE name = "language" value="VHDL" type="STRING" enable="1" />
|
368 |
|
|
-- Retrieval info: <PRIVATE name = "enabled" value="1" type="STRING" enable="1" />
|
369 |
|
|
-- Retrieval info: <PRIVATE name = "gb_enabled" value="0" type="STRING" enable="1" />
|
370 |
|
|
-- Retrieval info: </NAMESPACE>
|
371 |
|
|
-- Retrieval info: <NAMESPACE name = "testbench">
|
372 |
|
|
-- Retrieval info: <PRIVATE name = "variation_name" value="esoc_port_mac" type="STRING" enable="1" />
|
373 |
|
|
-- Retrieval info: <PRIVATE name = "project_name" value="system" type="STRING" enable="1" />
|
374 |
|
|
-- Retrieval info: <PRIVATE name = "output_name" value="esoc_port_mac" type="STRING" enable="1" />
|
375 |
|
|
-- Retrieval info: <PRIVATE name = "tool_context" value="STANDALONE" type="STRING" enable="1" />
|
376 |
|
|
-- Retrieval info: </NAMESPACE>
|
377 |
|
|
-- Retrieval info: <NAMESPACE name = "constraint_file_generator">
|
378 |
|
|
-- Retrieval info: <PRIVATE name = "variation_name" value="esoc_port_mac" type="STRING" enable="1" />
|
379 |
|
|
-- Retrieval info: <PRIVATE name = "instance_name" value="esoc_port_mac" type="STRING" enable="1" />
|
380 |
|
|
-- Retrieval info: <PRIVATE name = "output_name" value="esoc_port_mac" type="STRING" enable="1" />
|
381 |
|
|
-- Retrieval info: </NAMESPACE>
|
382 |
|
|
-- Retrieval info: <NAMESPACE name = "modelsim_script_generator">
|
383 |
|
|
-- Retrieval info: <PRIVATE name = "variation_name" value="esoc_port_mac" type="STRING" enable="1" />
|
384 |
|
|
-- Retrieval info: <PRIVATE name = "instance_name" value="esoc_port_mac" type="STRING" enable="1" />
|
385 |
|
|
-- Retrieval info: <PRIVATE name = "plugin_worker" value="1" type="STRING" enable="1" />
|
386 |
|
|
-- Retrieval info: </NAMESPACE>
|
387 |
|
|
-- Retrieval info: <NAMESPACE name = "europa_executor">
|
388 |
|
|
-- Retrieval info: <PRIVATE name = "plugin_worker" value="0" type="STRING" enable="1" />
|
389 |
|
|
-- Retrieval info: </NAMESPACE>
|
390 |
|
|
-- Retrieval info: <NAMESPACE name = "simgen">
|
391 |
|
|
-- Retrieval info: <PRIVATE name = "use_alt_top" value="0" type="STRING" enable="1" />
|
392 |
|
|
-- Retrieval info: <PRIVATE name = "filename" value="esoc_port_mac.vho" type="STRING" enable="1" />
|
393 |
|
|
-- Retrieval info: </NAMESPACE>
|
394 |
|
|
-- Retrieval info: <NAMESPACE name = "modelsim_wave_script_plugin">
|
395 |
|
|
-- Retrieval info: <PRIVATE name = "plugin_worker" value="1" type="STRING" enable="1" />
|
396 |
|
|
-- Retrieval info: <PRIVATE name = "output_name" value="esoc_port_mac" type="STRING" enable="1" />
|
397 |
|
|
-- Retrieval info: </NAMESPACE>
|
398 |
|
|
-- Retrieval info: <NAMESPACE name = "nativelink">
|
399 |
|
|
-- Retrieval info: <PRIVATE name = "plugin_worker" value="1" type="STRING" enable="1" />
|
400 |
|
|
-- Retrieval info: <PRIVATE name = "language" value="VHDL" type="STRING" enable="1" />
|
401 |
|
|
-- Retrieval info: <PRIVATE name = "output_name" value="esoc_port_mac" type="STRING" enable="1" />
|
402 |
|
|
-- Retrieval info: <PRIVATE name = "variation_name" value="esoc_port_mac" type="STRING" enable="1" />
|
403 |
|
|
-- Retrieval info: <PRIVATE name = "top_level_name" value="esoc_port_mac" type="STRING" enable="1" />
|
404 |
|
|
-- Retrieval info: </NAMESPACE>
|
405 |
|
|
-- Retrieval info: <NAMESPACE name = "greybox">
|
406 |
|
|
-- Retrieval info: <PRIVATE name = "filename" value="esoc_port_mac_syn.v" type="STRING" enable="1" />
|
407 |
|
|
-- Retrieval info: </NAMESPACE>
|
408 |
|
|
-- Retrieval info: <NAMESPACE name = "serializer"/>
|
409 |
|
|
-- Retrieval info: </PRIVATES>
|
410 |
|
|
-- Retrieval info: <FILES/>
|
411 |
|
|
-- Retrieval info: <PORTS/>
|
412 |
|
|
-- Retrieval info: <LIBRARIES/>
|
413 |
|
|
-- Retrieval info: </STATIC_SECTION>
|
414 |
|
|
-- Retrieval info: </NETLIST_SECTION>
|
415 |
|
|
-- Retrieval info: </MEGACORE>
|
416 |
|
|
-- =========================================================
|
417 |
|
|
-- RELATED_FILES: esoc_port_mac.vhd, altera_tse_mac.v;
|
418 |
|
|
-- IPFS_FILES: esoc_port_mac.vho;
|
419 |
|
|
-- =========================================================
|