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URL https://opencores.org/ocsvn/esoc/esoc/trunk

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[/] [esoc/] [trunk/] [Sources/] [altera/] [esoc_port_mac/] [esoc_port_mac.vhd] - Blame information for rev 47

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1 42 lmaarsen
-- megafunction wizard: %Triple Speed Ethernet v8.1%
2
-- GENERATION: XML
3
 
4
-- ============================================================
5
-- Megafunction Name(s):
6
--                      altera_tse_mac
7
-- ============================================================
8
-- Generated by Triple Speed Ethernet 8.1 [Altera, IP Toolbench 1.3.0 Build 163]
9
-- ************************************************************
10
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
11
-- ************************************************************
12
-- Copyright (C) 1991-2013 Altera Corporation
13
-- Any megafunction design, and related net list (encrypted or decrypted),
14
-- support information, device programming or simulation file, and any other
15
-- associated documentation or information provided by Altera or a partner
16
-- under Altera's Megafunction Partnership Program may be used only to
17
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
18
-- use of such megafunction design, net list, support information, device
19
-- programming or simulation file, or any other related documentation or
20
-- information is prohibited for any other purpose, including, but not
21
-- limited to modification, reverse engineering, de-compiling, or use with
22
-- any other silicon devices, unless such use is explicitly licensed under
23
-- a separate agreement with Altera or a megafunction partner.  Title to
24
-- the intellectual property, including patents, copyrights, trademarks,
25
-- trade secrets, or maskworks, embodied in any such megafunction design,
26
-- net list, support information, device programming or simulation file, or
27
-- any other related documentation or information provided by Altera or a
28
-- megafunction partner, remains with Altera, the megafunction partner, or
29
-- their respective licensors.  No other licenses, including any licenses
30
-- needed under any third party's intellectual property, are provided herein.
31
 
32
library IEEE;
33
use IEEE.std_logic_1164.all;
34
 
35
ENTITY esoc_port_mac IS
36
        PORT (
37
                ff_tx_crc_fwd   : IN STD_LOGIC;
38
                ff_tx_data      : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
39
                ff_tx_eop       : IN STD_LOGIC;
40
                ff_tx_err       : IN STD_LOGIC;
41
                ff_tx_mod       : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
42
                ff_tx_sop       : IN STD_LOGIC;
43
                ff_tx_wren      : IN STD_LOGIC;
44
                ff_tx_clk       : IN STD_LOGIC;
45
                ff_rx_rdy       : IN STD_LOGIC;
46
                ff_rx_clk       : IN STD_LOGIC;
47
                address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
48
                read    : IN STD_LOGIC;
49
                writedata       : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
50
                write   : IN STD_LOGIC;
51
                clk     : IN STD_LOGIC;
52
                reset   : IN STD_LOGIC;
53
                rgmii_in        : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
54
                rx_control      : IN STD_LOGIC;
55
                tx_clk  : IN STD_LOGIC;
56
                rx_clk  : IN STD_LOGIC;
57
                set_10  : IN STD_LOGIC;
58
                set_1000        : IN STD_LOGIC;
59
                xon_gen : IN STD_LOGIC;
60
                xoff_gen        : IN STD_LOGIC;
61
                magic_sleep_n   : IN STD_LOGIC;
62
                mdio_in : IN STD_LOGIC;
63
                ff_tx_rdy       : OUT STD_LOGIC;
64
                ff_rx_data      : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
65
                ff_rx_dval      : OUT STD_LOGIC;
66
                ff_rx_eop       : OUT STD_LOGIC;
67
                ff_rx_mod       : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
68
                ff_rx_sop       : OUT STD_LOGIC;
69
                rx_err  : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
70
                rx_err_stat     : OUT STD_LOGIC_VECTOR (17 DOWNTO 0);
71
                rx_frm_type     : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
72
                ff_rx_dsav      : OUT STD_LOGIC;
73
                readdata        : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
74
                waitrequest     : OUT STD_LOGIC;
75
                rgmii_out       : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
76
                tx_control      : OUT STD_LOGIC;
77
                ena_10  : OUT STD_LOGIC;
78
                eth_mode        : OUT STD_LOGIC;
79
                ff_tx_septy     : OUT STD_LOGIC;
80
                tx_ff_uflow     : OUT STD_LOGIC;
81
                ff_rx_a_full    : OUT STD_LOGIC;
82
                ff_rx_a_empty   : OUT STD_LOGIC;
83
                ff_tx_a_full    : OUT STD_LOGIC;
84
                ff_tx_a_empty   : OUT STD_LOGIC;
85
                magic_wakeup    : OUT STD_LOGIC;
86
                mdio_out        : OUT STD_LOGIC;
87
                mdio_oen        : OUT STD_LOGIC;
88
                mdc     : OUT STD_LOGIC
89
        );
90
END esoc_port_mac;
91
 
92
ARCHITECTURE SYN OF esoc_port_mac IS
93
 
94
 
95
        COMPONENT altera_tse_mac
96
        GENERIC (
97
                ENABLE_MAGIC_DETECT     : NATURAL;
98
                ENABLE_MDIO     : NATURAL;
99
                ENABLE_SHIFT16  : NATURAL;
100
                ENABLE_SUP_ADDR : NATURAL;
101
                CORE_VERSION    : STD_LOGIC_VECTOR := X"0800";
102
                CRC32GENDELAY   : NATURAL;
103
                MDIO_CLK_DIV    : NATURAL;
104
                ENA_HASH        : NATURAL;
105
                USE_SYNC_RESET  : NATURAL;
106
                STAT_CNT_ENA    : NATURAL;
107
                ENABLE_HD_LOGIC : NATURAL;
108
                REDUCED_INTERFACE_ENA   : NATURAL;
109
                CRC32S1L2_EXTERN        : NATURAL;
110
                ENABLE_GMII_LOOPBACK    : NATURAL;
111
                CRC32DWIDTH     : NATURAL;
112
                CUST_VERSION    : NATURAL;
113
                RESET_LEVEL     : STD_LOGIC_VECTOR := X"01";
114
                CRC32CHECK16BIT : STD_LOGIC_VECTOR := X"00";
115
                ENABLE_MAC_FLOW_CTRL    : NATURAL;
116
                ENABLE_MAC_TXADDR_SET   : NATURAL;
117
                ENABLE_MAC_RX_VLAN      : NATURAL;
118
                ENABLE_MAC_TX_VLAN      : NATURAL;
119
                EG_FIFO : NATURAL;
120
                EG_ADDR : NATURAL;
121
                ING_FIFO        : NATURAL;
122
                ENABLE_ENA      : NATURAL;
123
                ING_ADDR        : NATURAL;
124
                RAM_TYPE        : STRING;
125
                INSERT_TA       : NATURAL;
126
                ENABLE_MACLITE  : NATURAL;
127
                MACLITE_GIGE    : NATURAL
128
        );
129
        PORT (
130
                ff_tx_crc_fwd   : IN STD_LOGIC;
131
                ff_tx_data      : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
132
                ff_tx_eop       : IN STD_LOGIC;
133
                ff_tx_err       : IN STD_LOGIC;
134
                ff_tx_mod       : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
135
                ff_tx_sop       : IN STD_LOGIC;
136
                ff_tx_wren      : IN STD_LOGIC;
137
                ff_tx_clk       : IN STD_LOGIC;
138
                ff_rx_rdy       : IN STD_LOGIC;
139
                ff_rx_clk       : IN STD_LOGIC;
140
                address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
141
                read    : IN STD_LOGIC;
142
                writedata       : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
143
                write   : IN STD_LOGIC;
144
                clk     : IN STD_LOGIC;
145
                reset   : IN STD_LOGIC;
146
                rgmii_in        : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
147
                rx_control      : IN STD_LOGIC;
148
                tx_clk  : IN STD_LOGIC;
149
                rx_clk  : IN STD_LOGIC;
150
                set_10  : IN STD_LOGIC;
151
                set_1000        : IN STD_LOGIC;
152
                xon_gen : IN STD_LOGIC;
153
                xoff_gen        : IN STD_LOGIC;
154
                magic_sleep_n   : IN STD_LOGIC;
155
                mdio_in : IN STD_LOGIC;
156
                ff_tx_rdy       : OUT STD_LOGIC;
157
                ff_rx_data      : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
158
                ff_rx_dval      : OUT STD_LOGIC;
159
                ff_rx_eop       : OUT STD_LOGIC;
160
                ff_rx_mod       : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
161
                ff_rx_sop       : OUT STD_LOGIC;
162
                rx_err  : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
163
                rx_err_stat     : OUT STD_LOGIC_VECTOR (17 DOWNTO 0);
164
                rx_frm_type     : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
165
                ff_rx_dsav      : OUT STD_LOGIC;
166
                readdata        : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
167
                waitrequest     : OUT STD_LOGIC;
168
                rgmii_out       : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
169
                tx_control      : OUT STD_LOGIC;
170
                ena_10  : OUT STD_LOGIC;
171
                eth_mode        : OUT STD_LOGIC;
172
                ff_tx_septy     : OUT STD_LOGIC;
173
                tx_ff_uflow     : OUT STD_LOGIC;
174
                ff_rx_a_full    : OUT STD_LOGIC;
175
                ff_rx_a_empty   : OUT STD_LOGIC;
176
                ff_tx_a_full    : OUT STD_LOGIC;
177
                ff_tx_a_empty   : OUT STD_LOGIC;
178
                magic_wakeup    : OUT STD_LOGIC;
179
                mdio_out        : OUT STD_LOGIC;
180
                mdio_oen        : OUT STD_LOGIC;
181
                mdc     : OUT STD_LOGIC
182
        );
183
 
184
        END COMPONENT;
185
 
186
BEGIN
187
 
188
        altera_tse_mac_inst : altera_tse_mac
189
        GENERIC MAP (
190
                ENABLE_MAGIC_DETECT => 1,
191
                ENABLE_MDIO => 1,
192
                ENABLE_SHIFT16 => 0,
193
                ENABLE_SUP_ADDR => 0,
194
                CORE_VERSION => X"0800",
195
                CRC32GENDELAY => 6,
196
                MDIO_CLK_DIV => 40,
197
                ENA_HASH => 0,
198
                USE_SYNC_RESET => 0,
199
                STAT_CNT_ENA => 1,
200
                ENABLE_HD_LOGIC => 1,
201
                REDUCED_INTERFACE_ENA => 1,
202
                CRC32S1L2_EXTERN => 0,
203
                ENABLE_GMII_LOOPBACK => 1,
204
                CRC32DWIDTH => 8,
205
                CUST_VERSION => 0,
206
                RESET_LEVEL => X"01",
207
                CRC32CHECK16BIT => X"00",
208
                ENABLE_MAC_FLOW_CTRL => 1,
209
                ENABLE_MAC_TXADDR_SET => 1,
210
                ENABLE_MAC_RX_VLAN => 0,
211
                ENABLE_MAC_TX_VLAN => 0,
212
                EG_FIFO => 2048,
213
                EG_ADDR => 11,
214
                ING_FIFO => 2048,
215
                ENABLE_ENA => 32,
216
                ING_ADDR => 11,
217
                RAM_TYPE => "AUTO",
218
                INSERT_TA => 0,
219
                ENABLE_MACLITE => 0,
220
                MACLITE_GIGE => 0
221
        )
222
        PORT MAP (
223
                ff_tx_crc_fwd  =>  ff_tx_crc_fwd,
224
                ff_tx_data  =>  ff_tx_data,
225
                ff_tx_eop  =>  ff_tx_eop,
226
                ff_tx_err  =>  ff_tx_err,
227
                ff_tx_mod  =>  ff_tx_mod,
228
                ff_tx_rdy  =>  ff_tx_rdy,
229
                ff_tx_sop  =>  ff_tx_sop,
230
                ff_tx_wren  =>  ff_tx_wren,
231
                ff_tx_clk  =>  ff_tx_clk,
232
                ff_rx_data  =>  ff_rx_data,
233
                ff_rx_dval  =>  ff_rx_dval,
234
                ff_rx_eop  =>  ff_rx_eop,
235
                ff_rx_mod  =>  ff_rx_mod,
236
                ff_rx_rdy  =>  ff_rx_rdy,
237
                ff_rx_sop  =>  ff_rx_sop,
238
                rx_err  =>  rx_err,
239
                rx_err_stat  =>  rx_err_stat,
240
                rx_frm_type  =>  rx_frm_type,
241
                ff_rx_dsav  =>  ff_rx_dsav,
242
                ff_rx_clk  =>  ff_rx_clk,
243
                address  =>  address,
244
                readdata  =>  readdata,
245
                read  =>  read,
246
                writedata  =>  writedata,
247
                write  =>  write,
248
                waitrequest  =>  waitrequest,
249
                clk  =>  clk,
250
                reset  =>  reset,
251
                rgmii_in  =>  rgmii_in,
252
                rgmii_out  =>  rgmii_out,
253
                rx_control  =>  rx_control,
254
                tx_control  =>  tx_control,
255
                tx_clk  =>  tx_clk,
256
                rx_clk  =>  rx_clk,
257
                set_10  =>  set_10,
258
                set_1000  =>  set_1000,
259
                ena_10  =>  ena_10,
260
                eth_mode  =>  eth_mode,
261
                ff_tx_septy  =>  ff_tx_septy,
262
                tx_ff_uflow  =>  tx_ff_uflow,
263
                ff_rx_a_full  =>  ff_rx_a_full,
264
                ff_rx_a_empty  =>  ff_rx_a_empty,
265
                ff_tx_a_full  =>  ff_tx_a_full,
266
                ff_tx_a_empty  =>  ff_tx_a_empty,
267
                xon_gen  =>  xon_gen,
268
                xoff_gen  =>  xoff_gen,
269
                magic_wakeup  =>  magic_wakeup,
270
                magic_sleep_n  =>  magic_sleep_n,
271
                mdio_out  =>  mdio_out,
272
                mdio_oen  =>  mdio_oen,
273
                mdio_in  =>  mdio_in,
274
                mdc  =>  mdc
275
        );
276
 
277
 
278
END SYN;
279
 
280
 
281
-- =========================================================
282
-- Triple Speed Ethernet Wizard Data
283
-- ===============================
284
-- DO NOT EDIT FOLLOWING DATA
285
-- @Altera, IP Toolbench@
286
-- Warning: If you modify this section, Triple Speed Ethernet Wizard may not be able to reproduce your chosen configuration.
287
-- 
288
-- Retrieval info: <?xml version="1.0"?>
289
-- Retrieval info: <MEGACORE title="Triple Speed Ethernet MegaCore Function"  version="8.1"  build="163"  iptb_version="1.3.0 Build 163"  format_version="120" >
290
-- Retrieval info:  <NETLIST_SECTION class="altera.ipbu.flowbase.netlist.model.TSEMVCModel"  active_core="altera_tse_mac" >
291
-- Retrieval info:   <STATIC_SECTION>
292
-- Retrieval info:    <PRIVATES>
293
-- Retrieval info:     <NAMESPACE name = "parameterization">
294
-- Retrieval info:      <PRIVATE name = "atlanticSinkClockRate" value="0"  type="STRING"  enable="1" />
295
-- Retrieval info:      <PRIVATE name = "atlanticSinkClockSource" value="unassigned"  type="STRING"  enable="1" />
296
-- Retrieval info:      <PRIVATE name = "atlanticSourceClockRate" value="0"  type="STRING"  enable="1" />
297
-- Retrieval info:      <PRIVATE name = "atlanticSourceClockSource" value="unassigned"  type="STRING"  enable="1" />
298
-- Retrieval info:      <PRIVATE name = "avalonSlaveClockRate" value="0"  type="STRING"  enable="1" />
299
-- Retrieval info:      <PRIVATE name = "avalonSlaveClockSource" value="unassigned"  type="STRING"  enable="1" />
300
-- Retrieval info:      <PRIVATE name = "avalonStNeighbours" value="{}"  type="STRING"  enable="1" />
301
-- Retrieval info:      <PRIVATE name = "channel_count" value="1"  type="INTEGER"  enable="1" />
302
-- Retrieval info:      <PRIVATE name = "core_variation" value="MAC_ONLY"  type="STRING"  enable="1" />
303
-- Retrieval info:      <PRIVATE name = "core_version" value="1794"  type="STRING"  enable="1" />
304
-- Retrieval info:      <PRIVATE name = "crc32dwidth" value="8"  type="INTEGER"  enable="1" />
305
-- Retrieval info:      <PRIVATE name = "crc32gendelay" value="6"  type="INTEGER"  enable="1" />
306
-- Retrieval info:      <PRIVATE name = "crc32s1l2_extern" value="0"  type="BOOLEAN"  enable="1" />
307
-- Retrieval info:      <PRIVATE name = "cust_version" value="0"  type="INTEGER"  enable="1" />
308
-- Retrieval info:      <PRIVATE name = "dataBitsPerSymbol" value="8"  type="INTEGER"  enable="1" />
309
-- Retrieval info:      <PRIVATE name = "dev_version" value="2048"  type="STRING"  enable="1" />
310
-- Retrieval info:      <PRIVATE name = "deviceFamily" value="STRATIX"  type="STRING"  enable="1" />
311
-- Retrieval info:      <PRIVATE name = "eg_addr" value="11"  type="INTEGER"  enable="1" />
312
-- Retrieval info:      <PRIVATE name = "eg_fifo" value="2048"  type="INTEGER"  enable="1" />
313
-- Retrieval info:      <PRIVATE name = "ena_hash" value="0"  type="BOOLEAN"  enable="1" />
314
-- Retrieval info:      <PRIVATE name = "enable_alt_reconfig" value="0"  type="BOOLEAN"  enable="1" />
315
-- Retrieval info:      <PRIVATE name = "enable_clk_sharing" value="0"  type="BOOLEAN"  enable="1" />
316
-- Retrieval info:      <PRIVATE name = "enable_ena" value="32"  type="INTEGER"  enable="1" />
317
-- Retrieval info:      <PRIVATE name = "enable_fifoless" value="0"  type="BOOLEAN"  enable="1" />
318
-- Retrieval info:      <PRIVATE name = "enable_gmii_loopback" value="1"  type="BOOLEAN"  enable="1" />
319
-- Retrieval info:      <PRIVATE name = "enable_hd_logic" value="1"  type="BOOLEAN"  enable="1" />
320
-- Retrieval info:      <PRIVATE name = "enable_mac_flow_ctrl" value="1"  type="BOOLEAN"  enable="1" />
321
-- Retrieval info:      <PRIVATE name = "enable_mac_txaddr_set" value="1"  type="BOOLEAN"  enable="1" />
322
-- Retrieval info:      <PRIVATE name = "enable_mac_vlan" value="0"  type="BOOLEAN"  enable="1" />
323
-- Retrieval info:      <PRIVATE name = "enable_maclite" value="0"  type="BOOLEAN"  enable="1" />
324
-- Retrieval info:      <PRIVATE name = "enable_magic_detect" value="1"  type="BOOLEAN"  enable="1" />
325
-- Retrieval info:      <PRIVATE name = "enable_multi_channel" value="0"  type="BOOLEAN"  enable="1" />
326
-- Retrieval info:      <PRIVATE name = "enable_pkt_class" value="1"  type="BOOLEAN"  enable="1" />
327
-- Retrieval info:      <PRIVATE name = "enable_pma" value="0"  type="BOOLEAN"  enable="1" />
328
-- Retrieval info:      <PRIVATE name = "enable_reg_sharing" value="0"  type="BOOLEAN"  enable="1" />
329
-- Retrieval info:      <PRIVATE name = "enable_sgmii" value="0"  type="BOOLEAN"  enable="1" />
330
-- Retrieval info:      <PRIVATE name = "enable_shift16" value="0"  type="BOOLEAN"  enable="1" />
331
-- Retrieval info:      <PRIVATE name = "enable_sup_addr" value="0"  type="BOOLEAN"  enable="1" />
332
-- Retrieval info:      <PRIVATE name = "enable_use_internal_fifo" value="1"  type="BOOLEAN"  enable="1" />
333
-- Retrieval info:      <PRIVATE name = "export_calblkclk" value="0"  type="BOOLEAN"  enable="1" />
334
-- Retrieval info:      <PRIVATE name = "export_pwrdn" value="0"  type="BOOLEAN"  enable="1" />
335
-- Retrieval info:      <PRIVATE name = "gigeAdvanceMode" value="1"  type="BOOLEAN"  enable="1" />
336
-- Retrieval info:      <PRIVATE name = "ifGMII" value="RGMII"  type="STRING"  enable="1" />
337
-- Retrieval info:      <PRIVATE name = "ifPCSuseEmbeddedSerdes" value="0"  type="BOOLEAN"  enable="1" />
338
-- Retrieval info:      <PRIVATE name = "ing_addr" value="11"  type="INTEGER"  enable="1" />
339
-- Retrieval info:      <PRIVATE name = "ing_fifo" value="2048"  type="INTEGER"  enable="1" />
340
-- Retrieval info:      <PRIVATE name = "insert_ta" value="0"  type="BOOLEAN"  enable="1" />
341
-- Retrieval info:      <PRIVATE name = "maclite_gige" value="0"  type="BOOLEAN"  enable="1" />
342
-- Retrieval info:      <PRIVATE name = "max_channels" value="0"  type="INTEGER"  enable="1" />
343
-- Retrieval info:      <PRIVATE name = "mdio_clk_div" value="40"  type="INTEGER"  enable="1" />
344
-- Retrieval info:      <PRIVATE name = "phy_identifier" value="0"  type="STRING"  enable="1" />
345
-- Retrieval info:      <PRIVATE name = "ramType" value="AUTO"  type="STRING"  enable="1" />
346
-- Retrieval info:      <PRIVATE name = "sopcSystemTopLevelName" value="system"  type="STRING"  enable="1" />
347
-- Retrieval info:      <PRIVATE name = "stat_cnt_ena" value="1"  type="BOOLEAN"  enable="1" />
348
-- Retrieval info:      <PRIVATE name = "timingAdapterName" value="timingAdapter"  type="STRING"  enable="1" />
349
-- Retrieval info:      <PRIVATE name = "toolContext" value="STANDALONE"  type="STRING"  enable="1" />
350
-- Retrieval info:      <PRIVATE name = "transceiver_type" value="GXB"  type="STRING"  enable="1" />
351
-- Retrieval info:      <PRIVATE name = "uiEgFIFOSize" value="2048 x 32 Bits"  type="STRING"  enable="1" />
352
-- Retrieval info:      <PRIVATE name = "uiHostClockFrequency" value="0"  type="INTEGER"  enable="1" />
353
-- Retrieval info:      <PRIVATE name = "uiIngFIFOSize" value="2048 x 32 Bits"  type="STRING"  enable="1" />
354
-- Retrieval info:      <PRIVATE name = "uiMACFIFO" value="0"  type="BOOLEAN"  enable="1" />
355
-- Retrieval info:      <PRIVATE name = "uiMACOptions" value="0"  type="BOOLEAN"  enable="1" />
356
-- Retrieval info:      <PRIVATE name = "uiMDIOFreq" value="0.0 MHz"  type="STRING"  enable="1" />
357
-- Retrieval info:      <PRIVATE name = "uiMIIInterfaceOptions" value="0"  type="BOOLEAN"  enable="1" />
358
-- Retrieval info:      <PRIVATE name = "uiPCSInterface" value="0"  type="BOOLEAN"  enable="1" />
359
-- Retrieval info:      <PRIVATE name = "uiPCSInterfaceOptions" value="0"  type="BOOLEAN"  enable="1" />
360
-- Retrieval info:      <PRIVATE name = "useLvds" value="0"  type="BOOLEAN"  enable="1" />
361
-- Retrieval info:      <PRIVATE name = "useMAC" value="1"  type="BOOLEAN"  enable="1" />
362
-- Retrieval info:      <PRIVATE name = "useMDIO" value="1"  type="BOOLEAN"  enable="1" />
363
-- Retrieval info:      <PRIVATE name = "usePCS" value="0"  type="BOOLEAN"  enable="1" />
364
-- Retrieval info:      <PRIVATE name = "use_sync_reset" value="0"  type="BOOLEAN"  enable="1" />
365
-- Retrieval info:     </NAMESPACE>
366
-- Retrieval info:     <NAMESPACE name = "simgen_enable">
367
-- Retrieval info:      <PRIVATE name = "language" value="VHDL"  type="STRING"  enable="1" />
368
-- Retrieval info:      <PRIVATE name = "enabled" value="1"  type="STRING"  enable="1" />
369
-- Retrieval info:      <PRIVATE name = "gb_enabled" value="0"  type="STRING"  enable="1" />
370
-- Retrieval info:     </NAMESPACE>
371
-- Retrieval info:     <NAMESPACE name = "testbench">
372
-- Retrieval info:      <PRIVATE name = "variation_name" value="esoc_port_mac"  type="STRING"  enable="1" />
373
-- Retrieval info:      <PRIVATE name = "project_name" value="system"  type="STRING"  enable="1" />
374
-- Retrieval info:      <PRIVATE name = "output_name" value="esoc_port_mac"  type="STRING"  enable="1" />
375
-- Retrieval info:      <PRIVATE name = "tool_context" value="STANDALONE"  type="STRING"  enable="1" />
376
-- Retrieval info:     </NAMESPACE>
377
-- Retrieval info:     <NAMESPACE name = "constraint_file_generator">
378
-- Retrieval info:      <PRIVATE name = "variation_name" value="esoc_port_mac"  type="STRING"  enable="1" />
379
-- Retrieval info:      <PRIVATE name = "instance_name" value="esoc_port_mac"  type="STRING"  enable="1" />
380
-- Retrieval info:      <PRIVATE name = "output_name" value="esoc_port_mac"  type="STRING"  enable="1" />
381
-- Retrieval info:     </NAMESPACE>
382
-- Retrieval info:     <NAMESPACE name = "modelsim_script_generator">
383
-- Retrieval info:      <PRIVATE name = "variation_name" value="esoc_port_mac"  type="STRING"  enable="1" />
384
-- Retrieval info:      <PRIVATE name = "instance_name" value="esoc_port_mac"  type="STRING"  enable="1" />
385
-- Retrieval info:      <PRIVATE name = "plugin_worker" value="1"  type="STRING"  enable="1" />
386
-- Retrieval info:     </NAMESPACE>
387
-- Retrieval info:     <NAMESPACE name = "europa_executor">
388
-- Retrieval info:      <PRIVATE name = "plugin_worker" value="0"  type="STRING"  enable="1" />
389
-- Retrieval info:     </NAMESPACE>
390
-- Retrieval info:     <NAMESPACE name = "simgen">
391
-- Retrieval info:      <PRIVATE name = "use_alt_top" value="0"  type="STRING"  enable="1" />
392
-- Retrieval info:      <PRIVATE name = "filename" value="esoc_port_mac.vho"  type="STRING"  enable="1" />
393
-- Retrieval info:     </NAMESPACE>
394
-- Retrieval info:     <NAMESPACE name = "modelsim_wave_script_plugin">
395
-- Retrieval info:      <PRIVATE name = "plugin_worker" value="1"  type="STRING"  enable="1" />
396
-- Retrieval info:      <PRIVATE name = "output_name" value="esoc_port_mac"  type="STRING"  enable="1" />
397
-- Retrieval info:     </NAMESPACE>
398
-- Retrieval info:     <NAMESPACE name = "nativelink">
399
-- Retrieval info:      <PRIVATE name = "plugin_worker" value="1"  type="STRING"  enable="1" />
400
-- Retrieval info:      <PRIVATE name = "language" value="VHDL"  type="STRING"  enable="1" />
401
-- Retrieval info:      <PRIVATE name = "output_name" value="esoc_port_mac"  type="STRING"  enable="1" />
402
-- Retrieval info:      <PRIVATE name = "variation_name" value="esoc_port_mac"  type="STRING"  enable="1" />
403
-- Retrieval info:      <PRIVATE name = "top_level_name" value="esoc_port_mac"  type="STRING"  enable="1" />
404
-- Retrieval info:     </NAMESPACE>
405
-- Retrieval info:     <NAMESPACE name = "greybox">
406
-- Retrieval info:      <PRIVATE name = "filename" value="esoc_port_mac_syn.v"  type="STRING"  enable="1" />
407
-- Retrieval info:     </NAMESPACE>
408
-- Retrieval info:     <NAMESPACE name = "serializer"/>
409
-- Retrieval info:    </PRIVATES>
410
-- Retrieval info:    <FILES/>
411
-- Retrieval info:    <PORTS/>
412
-- Retrieval info:    <LIBRARIES/>
413
-- Retrieval info:   </STATIC_SECTION>
414
-- Retrieval info:  </NETLIST_SECTION>
415
-- Retrieval info: </MEGACORE>
416
-- =========================================================
417
-- RELATED_FILES: esoc_port_mac.vhd, altera_tse_mac.v;
418
-- IPFS_FILES: esoc_port_mac.vho;
419
-- =========================================================

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