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---- ----
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---- Ethernet Switch on Configurable Logic IP Core ----
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---- ----
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---- This file is part of the ESoCL project ----
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---- http://www.opencores.org/cores/esoc/ ----
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---- ----
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---- Description: see design description ESoCL_dd_71022001.pdf ----
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---- ----
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---- To Do: see roadmap description ESoCL_dd_71022001.pdf ----
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---- and/or release bulleting ESoCL_rb_71022001.pdf ----
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---- ----
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---- Author(s): L.Maarsen ----
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---- Bert Maarsen, lmaarsen@opencores.org ----
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---- ----
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--------------------------------------------------------------------------------
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---- ----
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---- Copyright (C) 2009 Authors and OPENCORES.ORG ----
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---- ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- and/or modify it under the terms of the GNU Lesser General ----
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---- Public License as published by the Free Software Foundation; ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- later version. ----
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---- ----
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---- This source is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- details. ----
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---- ----
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---- You should have received a copy of the GNU Lesser General ----
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---- Public License along with this source; if not, download it ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- ----
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--------------------------------------------------------------------------------
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-- Object : Entity work.esoc_search_engine_sa
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-- Last modified : Mon Apr 14 12:50:09 2014.
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library ieee, std, work;
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use ieee.std_logic_1164.all;
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use std.textio.all;
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use ieee.numeric_std.all;
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use work.package_hash10_24b.all;
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use work.package_esoc_configuration.all;
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entity esoc_search_engine_sa is
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port(
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clk_search : in std_logic;
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reset : in std_logic;
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search_aging_tick : in std_logic;
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search_entry_age_time : in std_logic_vector(11 downto 0);
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search_entry_age_time_ena : in std_logic;
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search_sa_drop_cnt : out std_logic;
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search_sa_store_empty : in std_logic;
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search_sa_store_q : in std_logic_vector(79 downto 0);
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search_sa_store_rd : out std_logic;
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search_sa_store_words : in STD_LOGIC_VECTOR(6 downto 0);
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search_table_address : out STD_LOGIC_VECTOR(12 downto 0);
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search_table_data : out STD_LOGIC_VECTOR(79 downto 0);
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search_table_q : in STD_LOGIC_VECTOR(79 downto 0);
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search_table_rden : out STD_LOGIC;
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search_table_wren : out STD_LOGIC);
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end entity esoc_search_engine_sa;
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--------------------------------------------------------------------------------
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-- Object : Architecture work.esoc_search_engine_sa.esoc_search_engine_sa
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-- Last modified : Mon Apr 14 12:50:09 2014.
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--------------------------------------------------------------------------------
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architecture esoc_search_engine_sa of esoc_search_engine_sa is
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type search_states is (idle, wait_sa, wait_hash, compare, add);
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signal search_state: search_states;
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type aging_states is (idle, wait_empty, wait_entry, evaluate);
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signal aging_state: aging_states;
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signal search_table_address_i: std_logic_vector(search_table_address'high downto 0);
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signal search_hash_delay_cnt: integer range esoc_search_engine_hash_delay downto 0;
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signal search_table_coll_cnt: integer range esoc_search_engine_col_depth downto 0;
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signal search_table_free_entry_os: integer range esoc_search_engine_col_depth downto 0;
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signal search_table_free_entry: std_logic;
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signal search_key_i: std_logic_vector(search_table_data'high downto 0);
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signal aging_count_down: integer range 2**search_entry_age_time'length-1 downto 0;
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signal aging_address: integer range 2**search_table_address'length-1 downto 0;
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begin
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--=============================================================================================================
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-- Process : proces search requests for source MAC address
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-- Description :
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--=============================================================================================================
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search_sa: process(clk_search, reset)
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begin
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if reset = '1' then
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search_table_free_entry <= '0';
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search_table_free_entry_os <= 0;
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search_table_coll_cnt <= 0;
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search_hash_delay_cnt <= 0;
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search_sa_drop_cnt <= '0';
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search_table_rden <= '0';
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search_table_wren <= '0';
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search_sa_store_rd <= '0';
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search_key_i <= (others => '0');
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search_table_address_i <= (others => '0');
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search_state <= idle;
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aging_state <= idle;
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aging_address <= 0;
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aging_count_down <= 0;
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elsif clk_search'event and clk_search = '1' then
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-- clear one-clock active signals
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search_sa_drop_cnt <= '0';
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search_table_rden <= '0';
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search_table_wren <= '0';
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search_sa_store_rd <= '0';
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--
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-- process new search requests
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--
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case search_state is
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when idle => -- get Source Port + SA and calculate hash pointer (additional delay may be required after synthesis, due to large XOR tree)
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if search_sa_store_empty = '0' then
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search_key_i <= search_sa_store_q;
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search_table_address_i <= CALC_HASH10_24b(search_sa_store_q(esoc_search_bus_mac+23 downto esoc_search_bus_mac)) & "000";
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search_table_rden <= '1';
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search_table_free_entry <= '0';
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search_table_free_entry_os <= 0;
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search_table_coll_cnt <= 0;
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-- use delay mechanism to give the hash function - large xor tree - time to provide stable result
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-- depends on target speed, use target timing analysis result to optimze this delay! At least one clock
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-- delay due to RAM latency
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search_hash_delay_cnt <= esoc_search_engine_hash_delay-1;
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search_state <= wait_hash;
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search_sa_store_rd <= '1';
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end if;
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when wait_hash => -- hash result stable?
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if search_hash_delay_cnt = 0 then
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search_table_address_i <= std_logic_vector(to_unsigned(to_integer(unsigned(search_table_address_i))+1,search_table_address_i'length));
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search_state <= compare;
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else
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search_hash_delay_cnt <= search_hash_delay_cnt-1;
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end if;
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search_table_rden <= '1';
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when compare => -- there is a hit on SA and VID and the entry is valid
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if search_table_q(esoc_search_entry_vlan+11 downto esoc_search_entry_vlan) = search_key_i(esoc_search_entry_vlan+11 downto esoc_search_entry_vlan) and
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search_table_q(esoc_search_entry_mac+47 downto esoc_search_entry_mac) = search_key_i(esoc_search_entry_mac+47 downto esoc_search_entry_mac) and
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search_table_q(esoc_search_entry_valid) = '1' then
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search_table_address_i <= std_logic_vector(to_unsigned(to_integer(unsigned(search_table_address_i))-1,search_table_address_i'length));
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search_key_i(esoc_search_entry_valid) <= '1';
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search_key_i(esoc_search_entry_update) <= '1';
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search_table_wren <= '1';
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search_state <= idle;
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-- there is no hit on SA and VID
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else
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-- end of collission buffer not reached, prepare for next entry
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if search_table_coll_cnt < esoc_search_engine_col_depth then
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-- is the current entry empty, remember position to use it when end of collission buffer is reached without a hit
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if search_table_free_entry = '0' and search_table_q(esoc_search_entry_valid) = '0' then
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search_table_free_entry <= '1';
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elsif search_table_free_entry = '0' then
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search_table_free_entry_os <= search_table_free_entry_os + 1;
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end if;
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search_table_coll_cnt <= search_table_coll_cnt + 1;
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search_table_address_i <= std_logic_vector(to_unsigned(to_integer(unsigned(search_table_address_i))+1,search_table_address_i'length));
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search_table_rden <= '1';
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-- end of collission buffer without a hit, check previous empty entries were found or that last entry is empty else report full collission buffer
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else
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-- previous entry of collission buffer was empty, use it to store new SA + VID
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if search_table_free_entry = '1' then
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search_table_address_i <= std_logic_vector(to_unsigned(to_integer(unsigned(search_table_address_i))-esoc_search_engine_col_depth+search_table_free_entry_os-1,search_table_address_i'length));
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search_table_wren <= '1';
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-- no previous empty entries, if last entry of collission buffer is empty, use it to store new SA + VID
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elsif search_table_q(esoc_search_entry_valid) = '0' then
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search_table_address_i <= std_logic_vector(to_unsigned(to_integer(unsigned(search_table_address_i))-1,search_table_address_i'length));
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search_table_wren <= '1';
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-- no entry of collission buffer is empty, no space to store new SA + VID
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else
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search_sa_drop_cnt <= '1';
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end if;
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search_key_i(esoc_search_entry_valid) <= '1';
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search_key_i(esoc_search_entry_update) <= '1';
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search_state <= idle;
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end if;
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end if;
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when others => search_state <= idle;
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end case;
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--
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-- process aging cycles
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--
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if search_aging_tick = '1' then
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-- create aging timer based upon aging time setting register
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if aging_count_down = 0 then
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aging_count_down <= to_integer(unsigned(search_entry_age_time))+1;
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else
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aging_count_down <= aging_count_down - 1;
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end if;
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end if;
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case aging_state is
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when idle => -- start aging cycle when aging mechanism is enabled and timer expires
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if aging_count_down = 0 and search_entry_age_time_ena = '1' then
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aging_address <= 0;
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aging_state <= wait_empty;
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end if;
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when wait_empty => -- wait for access to table with learned address (SA Search request first!)
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-- provide access when table is free for aging process
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if search_sa_store_empty = '1' and search_state = idle then
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search_table_address_i <= std_logic_vector(to_unsigned(aging_address,search_table_address_i'length));
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search_table_rden <= '1';
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aging_state <= wait_entry;
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end if;
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when wait_entry => -- if table is still free prepare for entry evaluation else return to wait for access
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if search_sa_store_empty = '0' then
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aging_state <= wait_empty;
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else
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aging_state <= evaluate;
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end if;
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when evaluate => -- if table is still free update entry and increment address pointer else return to wait for access
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if search_sa_store_empty = '0' then
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aging_state <= wait_empty;
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else
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-- update the entry or even invalidate the entry
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if search_table_q(esoc_search_entry_valid) = '1' then
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search_key_i <= search_table_q;
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search_key_i(esoc_search_entry_valid) <= search_table_q(esoc_search_entry_update);
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search_key_i(esoc_search_entry_update) <= '0';
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search_table_wren <= '1';
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end if;
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-- update address pointer to process next entry
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if aging_address = 2**search_table_address_i'length - 1 then
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aging_state <= idle;
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else
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aging_address <= aging_address + 1;
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aging_state <= wait_empty;
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end if;
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end if;
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when others => aging_state <= idle;
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end case;
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end if;
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end process;
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search_table_address <= search_table_address_i;
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search_table_data <= search_key_i;
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end architecture esoc_search_engine_sa ; -- of esoc_search_engine_sa
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