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mohor |
// Signalscan Version 6.7p1
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define noactivityindicator
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define analog waveform lines
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define add variable default overlay off
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define waveform window analogheight 1
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define terminal automatic
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define buttons control \
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1 opensimmulationfile \
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2 executedofile \
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3 designbrowser \
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4 waveform \
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5 source \
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6 breakpoints \
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7 definesourcessearchpath \
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8 exit \
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9 createbreakpoint \
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10 creategroup \
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11 createmarker \
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12 closesimmulationfile \
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13 renamesimmulationfile \
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14 replacesimulationfiledata \
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15 listopensimmulationfiles \
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16 savedofile
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define buttons waveform \
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1 undo \
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2 cut \
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3 copy \
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4 paste \
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5 delete \
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6 zoomin \
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7 zoomout \
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8 zoomoutfull \
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9 expand \
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10 createmarker \
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11 designbrowser:1 \
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12 variableradixbinary \
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13 variableradixoctal \
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14 variableradixdecimal \
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15 variableradixhexadecimal \
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16 variableradixascii
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define buttons designbrowser \
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1 undo \
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2 cut \
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3 copy \
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4 paste \
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5 delete \
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6 cdupscope \
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7 getallvariables \
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8 getdeepallvariables \
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9 addvariables \
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10 addvarsandclosewindow \
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11 closewindow \
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12 scopefiltermodule \
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13 scopefiltertask \
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14 scopefilterfunction \
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15 scopefilterblock \
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16 scopefilterprimitive
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define buttons event \
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1 undo \
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2 cut \
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3 copy \
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4 paste \
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5 delete \
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6 move \
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7 closewindow \
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8 duplicate \
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9 defineasrisingedge \
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10 defineasfallingedge \
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11 defineasanyedge \
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12 variableradixbinary \
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13 variableradixoctal \
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14 variableradixdecimal \
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15 variableradixhexadecimal \
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16 variableradixascii
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define buttons source \
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1 undo \
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2 cut \
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3 copy \
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4 paste \
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5 delete \
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6 createbreakpoint \
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7 creategroup \
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8 createmarker \
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9 createevent \
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10 createregisterpage \
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11 closewindow \
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12 opensimmulationfile \
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13 closesimmulationfile \
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14 renamesimmulationfile \
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15 replacesimulationfiledata \
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16 listopensimmulationfiles
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define buttons register \
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1 undo \
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2 cut \
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3 copy \
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4 paste \
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5 delete \
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6 createregisterpage \
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7 closewindow \
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8 continuefor \
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9 continueuntil \
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10 continueforever \
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11 stop \
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12 previous \
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13 next \
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14 variableradixbinary \
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15 variableradixhexadecimal \
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16 variableradixascii
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define show related transactions
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define exit prompt
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define event search direction forward
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define variable nofullhierarchy
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define variable nofilenames
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define variable nofullpathfilenames
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include bookmark with filenames
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include scope history without filenames
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define waveform window listpane 4.96
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define waveform window namepane 15.18
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define multivalueindication
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define pattern curpos dot
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define pattern cursor1 dot
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define pattern cursor2 dot
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define pattern marker dot
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define print designer "Miha Dolenc"
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define print border
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define print color blackonwhite
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define print command "/usr/ucb/lpr -P%P"
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define print printer lp
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define print range visible
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define print variable visible
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define rise fall time low threshold percentage 10
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define rise fall time high threshold percentage 90
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define rise fall time low value 0
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define rise fall time high value 3.3
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define sendmail command "/usr/lib/sendmail"
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define sequence time width 30.00
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define snap
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define source noprompt
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define time units default
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define userdefinedbussymbol
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define user guide directory "/usr/local/designacc/signalscan-6.7p1/doc/html"
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define waveform window grid off
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define waveform window waveheight 14
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define waveform window wavespace 6
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define web browser command netscape
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define zoom outfull on initial add off
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add group \
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A \
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add group \
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"WISHBONE common" \
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tb_ethernet.eth_top.wb_clk_i \
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tb_ethernet.eth_top.wb_rst_i \
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tb_ethernet.eth_top.wb_dat_i[31:0]'h \
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tb_ethernet.eth_top.wb_dat_o[31:0]'h \
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tb_ethernet.eth_top.wb_err_o \
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add group \
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"WISHBONE slave signals" \
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tb_ethernet.eth_top.wb_adr_i[11:2]'h \
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tb_ethernet.eth_top.wb_sel_i[3:0]'h \
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tb_ethernet.eth_top.wb_we_i \
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tb_ethernet.eth_top.wb_cyc_i \
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tb_ethernet.eth_top.wb_stb_i \
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tb_ethernet.eth_top.wb_ack_o \
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add group \
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"WISHBONE master signals" \
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tb_ethernet.eth_top.m_wb_adr_o[31:0]'h \
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tb_ethernet.eth_top.m_wb_sel_o[3:0]'h \
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tb_ethernet.eth_top.m_wb_we_o \
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tb_ethernet.eth_top.m_wb_dat_i[31:0]'h \
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tb_ethernet.eth_top.m_wb_dat_o[31:0]'h \
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tb_ethernet.eth_top.m_wb_cyc_o \
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tb_ethernet.eth_top.m_wb_stb_o \
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tb_ethernet.eth_top.m_wb_ack_i \
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tb_ethernet.eth_top.m_wb_err_i \
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add group \
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"MAC common" \
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tb_ethernet.eth_top.mcoll_pad_i \
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tb_ethernet.eth_top.mcrs_pad_i \
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add group \
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"MAC TX" \
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tb_ethernet.eth_top.mtx_clk_pad_i \
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tb_ethernet.eth_top.mtxd_pad_o[3:0]'h \
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tb_ethernet.eth_top.mtxen_pad_o \
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tb_ethernet.eth_top.mtxerr_pad_o \
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add group \
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"MAC RX" \
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tb_ethernet.eth_top.mrx_clk_pad_i \
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tb_ethernet.eth_top.mrxd_pad_i[3:0]'h \
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tb_ethernet.eth_top.mrxdv_pad_i \
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tb_ethernet.eth_top.mrxerr_pad_i \
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add group \
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"MAC MIIM interface" \
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tb_ethernet.eth_top.mdc_pad_o \
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tb_ethernet.eth_top.md_padoe_o \
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tb_ethernet.eth_top.md_pad_o \
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tb_ethernet.eth_top.md_pad_i \
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tb_ethernet.eth_top.miim1.Busy \
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tb_ethernet.eth_top.miim1.LinkFail \
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tb_ethernet.eth_top.miim1.Nvalid \
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tb_ethernet.eth_top.miim1.CtrlData[15:0]'h \
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tb_ethernet.eth_top.miim1.UpdateMIIRX_DATAReg \
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tb_ethernet.eth_top.miim1.Prsd[15:0]'h \
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tb_ethernet.eth_top.miim1.Divider[7:0]'h \
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add group \
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"Test signals" \
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tb_ethernet.test_name[799:0]'a \
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tb_ethernet.eth_top.ethreg1.MIISTATUSOut[31:0]'h \
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tb_ethernet.eth_top.miim1.InProgress \
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tb_ethernet.eth_top.miim1.InProgress_q1 \
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tb_ethernet.eth_top.miim1.InProgress_q2 \
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tb_ethernet.eth_top.miim1.InProgress_q3 \
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tb_ethernet.eth_top.miim1.shftrg.ShiftReg[7:0]'h \
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tb_ethernet.eth_phy.status_bit6_0[6:0]'h \
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tb_ethernet.eth_phy.control_bit8_0[8:0]'h \
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tb_ethernet.eth_phy.control_bit9 \
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tb_ethernet.eth_phy.control_bit14_10[14:10]'h \
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tb_ethernet.eth_phy.control_bit15 \
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tb_ethernet.eth_phy.eth_speed \
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tb_ethernet.eth_phy.m_rst_n_i \
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tb_ethernet.eth_phy.mcoll_o \
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tb_ethernet.eth_phy.mcrs_o \
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tb_ethernet.eth_phy.md_get_phy_address \
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tb_ethernet.eth_phy.md_get_reg_address \
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tb_ethernet.eth_phy.md_get_reg_data_in \
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tb_ethernet.eth_phy.md_put_reg_data_in \
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tb_ethernet.eth_phy.md_put_reg_data_out \
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tb_ethernet.eth_phy.reg_data_in[15:0]'h \
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tb_ethernet.eth_phy.reg_data_out[15:0]'h \
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tb_ethernet.eth_phy.register_bus_in[15:0]'h \
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tb_ethernet.eth_phy.register_bus_out[15:0]'h \
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tb_ethernet.eth_phy.reg_address[4:0]'h \
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tb_ethernet.eth_phy.md_io_output \
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tb_ethernet.eth_phy.md_io_enable \
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tb_ethernet.eth_phy.md_io \
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tb_ethernet.Mdc_O \
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tb_ethernet.Mdi_I \
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tb_ethernet.Mdio_IO \
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tb_ethernet.Mdo_O \
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tb_ethernet.Mdo_OE \
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tb_ethernet.eth_phy.md_io_enable \
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tb_ethernet.eth_phy.md_io_output \
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tb_ethernet.eth_phy.md_io_rd_wr \
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tb_ethernet.eth_phy.md_io_reg \
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tb_ethernet.eth_phy.m_rst_n_i \
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tb_ethernet.eth_phy.md_transfer_cnt'd \
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| 257 |
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tb_ethernet.eth_phy.md_transfer_cnt_reset \
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| 258 |
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tb_ethernet.eth_phy.mdc_i \
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| 259 |
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tb_ethernet.eth_phy.mrx_clk_o \
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| 260 |
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tb_ethernet.eth_phy.mrxd_o[3:0]'h \
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| 261 |
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tb_ethernet.eth_phy.mrxdv_o \
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| 262 |
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tb_ethernet.eth_phy.mrxerr_o \
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| 263 |
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tb_ethernet.eth_phy.mtx_clk_o \
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| 264 |
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tb_ethernet.eth_phy.mtxd_i[3:0]'h \
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| 265 |
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tb_ethernet.eth_phy.mtxen_i \
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| 266 |
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tb_ethernet.eth_phy.mtxerr_i \
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| 267 |
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tb_ethernet.eth_phy.phy_address[4:0]'h \
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| 268 |
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tb_ethernet.eth_phy.phy_id1[15:0]'h \
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| 269 |
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tb_ethernet.eth_phy.phy_id2[15:0]'h \
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| 270 |
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tb_ethernet.eth_phy.phy_log[31:0]'h \
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| 271 |
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tb_ethernet.eth_phy.reg_address[4:0]'h \
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| 272 |
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tb_ethernet.eth_phy.register_bus_in[15:0]'h \
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| 273 |
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tb_ethernet.eth_phy.register_bus_out[15:0]'h \
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| 274 |
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tb_ethernet.eth_phy.registers_addr_data_test_operation \
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| 275 |
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tb_ethernet.eth_phy.rx_link_down_halfperiod \
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| 276 |
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( \
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| 277 |
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minmax 0 93 \
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| 278 |
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) \
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| 279 |
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tb_ethernet.eth_phy.self_clear_d0 \
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| 280 |
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tb_ethernet.eth_phy.self_clear_d1 \
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| 281 |
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tb_ethernet.eth_phy.self_clear_d2 \
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| 282 |
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tb_ethernet.eth_phy.self_clear_d3 \
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| 283 |
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tb_ethernet.eth_phy.status_bit6_0[6:0]'h \
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| 284 |
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tb_ethernet.eth_phy.status_bit7 \
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| 285 |
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tb_ethernet.eth_phy.status_bit8 \
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| 286 |
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tb_ethernet.eth_phy.status_bit15_9[15:9]'h \
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| 287 |
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| 288 |
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| 289 |
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deselect all
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| 290 |
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open window designbrowser 1 geometry 56 117 855 550
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| 291 |
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open window waveform 1 geometry 10 59 1592 1094
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| 292 |
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zoom at 4981823.979(0)ns 0.00025639 0.00000000
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