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Line No.	Rev	Author	Line
1	319	tadejm	`========================== ETHERNET IP Core Testbench results ===========================`
2
3			`***************************************************************************************`
4			`***************************************************************************************`
5			`Heading: ACCESS TO MAC REGISTERS TEST`
6			`***************************************************************************************`
7			`***************************************************************************************`
8
9			`*************************************************************************************`
10			`At time: 68509000`
11			`Test: TEST 0: BYTE SELECTS ON 3 32-BIT READ-WRITE REGISTERS ( VARIOUS BUS DELAYS )`
12			`reported SUCCESSFULL!`
13			`*************************************************************************************`
14
15			`*************************************************************************************`
16			`At time: 302749000`
17			`Test: TEST 1: 'WALKING ONE' WITH SINGLE CYCLES ACROSS MAC REGISTERS ( VARIOUS BUS DELAYS )`
18			`reported SUCCESSFULL!`
19			`*************************************************************************************`
20
21			`*************************************************************************************`
22			`At time: 5383309000`
23			`Test: TEST 2: 'WALKING ONE' WITH SINGLE CYCLES ACROSS MAC BUFFER DESC. ( VARIOUS BUS DELAYS )`
24			`reported SUCCESSFULL!`
25			`*************************************************************************************`
26
27			`*************************************************************************************`
28			`At time: 5399539000`
29			`Test: TEST 3: MAX REG. VALUES AND REG. VALUES AFTER WRITING INVERSE RESET VALUES AND HARD RESET OF THE MAC`
30			`reported SUCCESSFULL!`
31			`*************************************************************************************`
32
33			`*************************************************************************************`
34			`At time: 5645629000`
35			`Test: TEST 4: BUFFER DESC. RAM PRESERVING VALUES AFTER HARD RESET OF THE MAC AND RESETING THE LOGIC`
36			`reported SUCCESSFULL!`
37			`*************************************************************************************`
38
39			`***************************************************************************************`
40			`***************************************************************************************`
41			`Heading: MIIM MODULE TEST`
42			`***************************************************************************************`
43			`***************************************************************************************`
44
45			`*************************************************************************************`
46			`At time: 7595117000`
47			`Test: TEST 0: CLOCK DIVIDER OF MII MANAGEMENT MODULE WITH ALL POSSIBLE FREQUENCES`
48			`reported SUCCESSFULL!`
49			`*************************************************************************************`
50
51			`*************************************************************************************`
52			`At time: 7622149000`
53			`Test: TEST 1: VARIOUS READINGS FROM 'REAL' PHY REGISTERS`
54			`reported SUCCESSFULL!`
55			`*************************************************************************************`
56
57			`*************************************************************************************`
58			`At time: 7655119000`
59			`Test: TEST 2: VARIOUS WRITINGS TO 'REAL' PHY REGISTERS ( CONTROL AND NON WRITABLE REGISTERS )`
60			`reported SUCCESSFULL!`
61			`*************************************************************************************`
62
63			`*************************************************************************************`
64			`At time: 7673959000`
65			`Test: TEST 3: RESET PHY THROUGH MII MANAGEMENT MODULE`
66			`reported SUCCESSFULL!`
67			`*************************************************************************************`
68
69			`*************************************************************************************`
70			`At time: 7749859000`
71			`Test: TEST 4: 'WALKING ONE' ACROSS PHY ADDRESS ( WITH AND WITHOUT PREAMBLE )`
72			`reported SUCCESSFULL!`
73			`*************************************************************************************`
74
75			`*************************************************************************************`
76			`At time: 7825759000`
77			`Test: TEST 5: 'WALKING ONE' ACROSS PHY'S REGISTER ADDRESS ( WITH AND WITHOUT PREAMBLE )`
78			`reported SUCCESSFULL!`
79			`*************************************************************************************`
80
81			`*************************************************************************************`
82			`At time: 8067259000`
83			`Test: TEST 6: 'WALKING ONE' ACROSS PHY'S DATA ( WITH AND WITHOUT PREAMBLE )`
84			`reported SUCCESSFULL!`
85			`*************************************************************************************`
86
87			`*************************************************************************************`
88			`At time: 8071969000`
89			`Test: TEST 7: READING FROM PHY WITH WRONG PHY ADDRESS ( HOST READING HIGH 'Z' DATA )`
90			`reported SUCCESSFULL!`
91			`*************************************************************************************`
92
93			`*************************************************************************************`
94			`At time: 8081389000`
95			`Test: TEST 8: WRITING TO PHY WITH WRONG PHY ADDRESS AND READING FROM CORRECT ONE`
96			`reported SUCCESSFULL!`
97			`*************************************************************************************`
98
99			`*************************************************************************************`
100			`At time: 8976619000`
101			`Test: TEST 9: SLIDING STOP SCAN COMMAND IMMEDIATELY AFTER READ REQUEST ( WITH AND WITHOUT PREAMBLE )`
102			`reported SUCCESSFULL!`
103			`*************************************************************************************`
104
105			`*************************************************************************************`
106			`At time: 9882439000`
107			`Test: TEST 10: SLIDING STOP SCAN COMMAND IMMEDIATELY AFTER WRITE REQUEST ( WITH AND WITHOUT PREAMBLE )`
108			`reported SUCCESSFULL!`
109			`*************************************************************************************`
110
111			`*************************************************************************************`
112			`At time: 10098649000`
113			`Test: TEST 11: BUSY AND NVALID STATUS DURATIONS DURING WRITE ( WITH AND WITHOUT PREAMBLE )`
114			`reported SUCCESSFULL!`
115			`*************************************************************************************`
116
117			`*************************************************************************************`
118			`At time: 10315609000`
119			`Test: TEST 12: BUSY AND NVALID STATUS DURATIONS DURING READ ( WITH AND WITHOUT PREAMBLE )`
120			`reported SUCCESSFULL!`
121			`*************************************************************************************`
122
123			`*************************************************************************************`
124			`At time: 10532569000`
125			`Test: TEST 13: BUSY AND NVALID STATUS DURATIONS DURING SCAN ( WITH AND WITHOUT PREAMBLE )`
126			`reported SUCCESSFULL!`
127			`*************************************************************************************`
128
129			`*************************************************************************************`
130			`At time: 10676539000`
131			`Test: TEST 14: SCAN STATUS FROM PHY WITH DETECTING LINK-FAIL BIT ( WITH AND WITHOUT PREAMBLE )`
132			`reported SUCCESSFULL!`
133			`*************************************************************************************`
134
135			`*************************************************************************************`
136			`At time: 12186559000`
137			`Test: TEST 15: SCAN STATUS FROM PHY WITH SLIDING LINK-FAIL BIT ( WITH AND WITHOUT PREAMBLE )`
138			`reported SUCCESSFULL!`
139			`*************************************************************************************`
140
141			`*************************************************************************************`
142			`At time: 13113619000`
143			`Test: TEST 16: SLIDING STOP SCAN COMMAND IMMEDIATELY AFTER SCAN REQUEST ( WITH AND WITHOUT PREAMBLE )`
144			`reported SUCCESSFULL!`
145			`*************************************************************************************`
146
147			`*************************************************************************************`
148			`At time: 14603599000`
149			`Test: TEST 17: SLIDING STOP SCAN COMMAND AFTER 2. SCAN ( WITH AND WITHOUT PREAMBLE )`
150			`reported SUCCESSFULL!`
151			`*************************************************************************************`
152
153
154			`NOTE: PHY generates ideal Carrier sense and Collision signals for following tests`
155
156			`***************************************************************************************`
157			`***************************************************************************************`
158			`Heading: MAC FULL DUPLEX TRANSMIT TEST`
159			`***************************************************************************************`
160			`***************************************************************************************`
161
162			`*************************************************************************************`
163			`At time: 15302239000`
164			`Test: TEST 0: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 10Mbps )`
165			`reported SUCCESSFULL!`
166			`*************************************************************************************`
167
168			`*************************************************************************************`
169			`At time: 15936679000`
170			`Test: TEST 1: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 100Mbps )`
171			`reported SUCCESSFULL!`
172			`*************************************************************************************`
173
174			`*************************************************************************************`
175			`At time: 49727119000`
176			`Test: TEST 2: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 10Mbps )`
177			`reported SUCCESSFULL!`
178			`*************************************************************************************`
179
180			`*************************************************************************************`
181			`At time: 53442319000`
182			`Test: TEST 3: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 100Mbps )`
183			`reported SUCCESSFULL!`
184			`*************************************************************************************`
185
186			`*************************************************************************************`
187			`At time: 95351355000`
188			`Test: TEST 4: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 10Mbps )`
189			`reported SUCCESSFULL!`
190			`*************************************************************************************`
191
192			`*************************************************************************************`
193			`At time: 99968955000`
194			`Test: TEST 5: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 100Mbps )`
195			`reported SUCCESSFULL!`
196			`*************************************************************************************`
197
198			`*************************************************************************************`
199			`At time: 104360595000`
200			`Test: TEST 6: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )`
201			`reported SUCCESSFULL!`
202			`*************************************************************************************`
203
204			`*************************************************************************************`
205			`At time: 104966115000`
206			`Test: TEST 7: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )`
207			`reported SUCCESSFULL!`
208			`*************************************************************************************`
209
210			`*************************************************************************************`
211			`At time: 108053235000`
212			`Test: TEST 8: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )`
213			`reported SUCCESSFULL!`
214			`*************************************************************************************`
215
216			`*************************************************************************************`
217			`At time: 108528075000`
218			`Test: TEST 9: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )`
219			`reported SUCCESSFULL!`
220			`*************************************************************************************`
221
222			`*************************************************************************************`
223			`At time: 112357635000`
224			`Test: TEST 10: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 10Mbps )`
225			`reported SUCCESSFULL!`
226			`*************************************************************************************`
227
228			`*************************************************************************************`
229			`At time: 112755195000`
230			`Test: TEST 11: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 100Mbps )`
231			`reported SUCCESSFULL!`
232			`*************************************************************************************`
233
234			`*************************************************************************************`
235			`At time: 113082915000`
236			`Test: TEST 12: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 10Mbps )`
237			`reported SUCCESSFULL!`
238			`*************************************************************************************`
239
240			`*************************************************************************************`
241			`At time: 113125035000`
242			`Test: TEST 13: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 100Mbps )`
243			`reported SUCCESSFULL!`
244			`*************************************************************************************`
245
246			`*************************************************************************************`
247			`At time: 116433315000`
248			`Test: TEST 14: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 10Mbps )`
249			`reported SUCCESSFULL!`
250			`*************************************************************************************`
251
252			`*************************************************************************************`
253			`At time: 116773995000`
254			`Test: TEST 15: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 100Mbps )`
255			`reported SUCCESSFULL!`
256			`*************************************************************************************`
257
258			`*************************************************************************************`
259			`At time: 225419715000`
260			`Test: TEST 16: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 10Mbps )`
261			`reported SUCCESSFULL!`
262			`*************************************************************************************`
263
264			`*************************************************************************************`
265			`At time: 236329395000`
266			`Test: TEST 17: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 100Mbps )`
267			`reported SUCCESSFULL!`
268			`*************************************************************************************`
269
270			`*************************************************************************************`
271			`At time: 238386915000`
272			`Test: TEST 18: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 10Mbps )`
273			`reported SUCCESSFULL!`
274			`*************************************************************************************`
275
276			`*************************************************************************************`
277			`At time: 238653435000`
278			`Test: TEST 19: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 100Mbps )`
279			`reported SUCCESSFULL!`
280			`*************************************************************************************`
281
282			`*************************************************************************************`
283			`At time: 242447355000`
284			`Test: TEST 20: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 10Mbps )`
285			`reported SUCCESSFULL!`
286			`*************************************************************************************`
287
288			`*************************************************************************************`
289			`At time: 242923275000`
290			`Test: TEST 21: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 100Mbps )`
291			`reported SUCCESSFULL!`
292			`*************************************************************************************`
293
294			`***************************************************************************************`
295			`***************************************************************************************`
296			`Heading: MAC FULL DUPLEX RECEIVE TEST`
297			`***************************************************************************************`
298			`***************************************************************************************`
299
300			`*************************************************************************************`
301			`At time: 252557359000`
302			`Test: TEST 0: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 10Mbps )`
303			`reported SUCCESSFULL!`
304			`*************************************************************************************`
305
306			`*************************************************************************************`
307			`At time: 254085799000`
308			`Test: TEST 1: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 100Mbps )`
309			`reported SUCCESSFULL!`
310			`*************************************************************************************`
311
312			`*************************************************************************************`
313			`At time: 294264649000`
314			`Test: TEST 2: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 10Mbps )`
315			`reported SUCCESSFULL!`
316			`*************************************************************************************`
317
318			`*************************************************************************************`
319			`At time: 299591329000`
320			`Test: TEST 3: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 100Mbps )`
321			`reported SUCCESSFULL!`
322			`*************************************************************************************`
323
324			`*************************************************************************************`
325			`At time: 333243169000`
326			`Test: TEST 4: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 10Mbps )`
327			`reported SUCCESSFULL!`
328			`*************************************************************************************`
329
330			`*************************************************************************************`
331			`At time: 336818689000`
332			`Test: TEST 5: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 100Mbps )`
333			`reported SUCCESSFULL!`
334			`*************************************************************************************`
335
336			`*************************************************************************************`
337			`At time: 378320475000`
338			`Test: TEST 6: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 10Mbps )`
339			`reported SUCCESSFULL!`
340			`*************************************************************************************`
341
342			`*************************************************************************************`
343			`At time: 382758795000`
344			`Test: TEST 7: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 100Mbps )`
345			`reported SUCCESSFULL!`
346			`*************************************************************************************`
347
348			`*************************************************************************************`
349			`At time: 386187495000`
350			`Test: TEST 8: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 10Mbps )`
351			`reported SUCCESSFULL!`
352			`*************************************************************************************`
353
354			`*************************************************************************************`
355			`At time: 386657745000`
356			`Test: TEST 9: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 100Mbps )`
357			`reported SUCCESSFULL!`
358			`*************************************************************************************`
359
360			`*************************************************************************************`
361			`At time: 387208159000`
362			`Test: TEST 10: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 10Mbps )`
363			`reported SUCCESSFULL!`
364			`*************************************************************************************`
365
366			`*************************************************************************************`
367			`At time: 387288679000`
368			`Test: TEST 11: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 100Mbps )`
369			`reported SUCCESSFULL!`
370			`*************************************************************************************`
371
372			`*************************************************************************************`
373			`At time: 387359689000`
374			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
375			`FAILED because`
376			`RX buffer descriptor status is not correct`
377			`*************************************************************************************`
378
379			`*************************************************************************************`
380			`At time: 387423768000`
381			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
382			`FAILED because`
383			`WB INT signal should not be set`
384			`*************************************************************************************`
385
386			`*************************************************************************************`
387			`At time: 387424129000`
388			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
389			`FAILED because`
390			`Any of interrupts (except Receive Buffer) was set`
391			`*************************************************************************************`
392
393			`*************************************************************************************`
394			`At time: 387487968000`
395			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
396			`FAILED because`
397			`WB INT signal should not be set`
398			`*************************************************************************************`
399
400			`*************************************************************************************`
401			`At time: 387488329000`
402			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
403			`FAILED because`
404			`Any of interrupts (except Receive Buffer) was set`
405			`*************************************************************************************`
406
407			`*************************************************************************************`
408			`At time: 387492409000`
409			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
410			`FAILED because`
411			`RX buffer descriptor status is not correct`
412			`*************************************************************************************`
413
414			`*************************************************************************************`
415			`At time: 387492529000`
416			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
417			`FAILED because`
418			`Interrupt Receive Buffer Error was not set`
419			`*************************************************************************************`
420
421			`*************************************************************************************`
422			`At time: 387492529000`
423			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
424			`FAILED because`
425			`Other interrupts (except Receive Buffer Error) were set`
426			`*************************************************************************************`
427
428			`*************************************************************************************`
429			`At time: 387562849000`
430			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
431			`FAILED because`
432			`RX buffer descriptor status is not correct`
433			`*************************************************************************************`
434
435			`*************************************************************************************`
436			`At time: 387562849000`
437			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
438			`FAILED because`
439			`Wrong length of the packet out from PHY`
440			`*************************************************************************************`
441
442			`*************************************************************************************`
443			`At time: 387562867000`
444			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
445			`FAILED because`
446			`Wrong data of the received packet`
447			`*************************************************************************************`
448
449			`*************************************************************************************`
450			`At time: 387562969000`
451			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
452			`FAILED because`
453			`Interrupt Receive Buffer was not set`
454			`*************************************************************************************`
455
456			`*************************************************************************************`
457			`At time: 387562969000`
458			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
459			`FAILED because`
460			`Other interrupts (except Receive Buffer) were set`
461			`*************************************************************************************`
462
463			`*************************************************************************************`
464			`At time: 387633408000`
465			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
466			`FAILED because`
467			`WB INT signal should not be set`
468			`*************************************************************************************`
469
470			`*************************************************************************************`
471			`At time: 387633769000`
472			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
473			`FAILED because`
474			`Any of interrupts (except Receive Buffer) was set`
475			`*************************************************************************************`
476
477			`*************************************************************************************`
478			`At time: 387637849000`
479			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
480			`FAILED because`
481			`RX buffer descriptor status is not correct`
482			`*************************************************************************************`
483
484			`*************************************************************************************`
485			`At time: 387637969000`
486			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
487			`FAILED because`
488			`Interrupt Receive Buffer Error was not set`
489			`*************************************************************************************`
490
491			`*************************************************************************************`
492			`At time: 387637969000`
493			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
494			`FAILED because`
495			`Other interrupts (except Receive Buffer Error) were set`
496			`*************************************************************************************`
497
498			`*************************************************************************************`
499			`At time: 387708409000`
500			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
501			`FAILED because`
502			`RX buffer descriptor status is not correct`
503			`*************************************************************************************`
504
505			`*************************************************************************************`
506			`At time: 387708409000`
507			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
508			`FAILED because`
509			`Wrong length of the packet out from PHY`
510			`*************************************************************************************`
511
512			`*************************************************************************************`
513			`At time: 387708427000`
514			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
515			`FAILED because`
516			`Wrong data of the received packet`
517			`*************************************************************************************`
518
519			`*************************************************************************************`
520			`At time: 387708529000`
521			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
522			`FAILED because`
523			`Interrupt Receive Buffer was not set`
524			`*************************************************************************************`
525
526			`*************************************************************************************`
527			`At time: 387708529000`
528			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
529			`FAILED because`
530			`Other interrupts (except Receive Buffer) were set`
531			`*************************************************************************************`
532
533			`*************************************************************************************`
534			`At time: 387788208000`
535			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
536			`FAILED because`
537			`WB INT signal should not be set`
538			`*************************************************************************************`
539
540			`*************************************************************************************`
541			`At time: 387788569000`
542			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
543			`FAILED because`
544			`Any of interrupts (except Receive Buffer) was set`
545			`*************************************************************************************`
546
547			`*************************************************************************************`
548			`At time: 387792649000`
549			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
550			`FAILED because`
551			`RX buffer descriptor status is not correct`
552			`*************************************************************************************`
553
554			`*************************************************************************************`
555			`At time: 387792769000`
556			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
557			`FAILED because`
558			`Interrupt Receive Buffer Error was not set`
559			`*************************************************************************************`
560
561			`*************************************************************************************`
562			`At time: 387792769000`
563			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
564			`FAILED because`
565			`Other interrupts (except Receive Buffer Error) were set`
566			`*************************************************************************************`
567
568			`*************************************************************************************`
569			`At time: 387872809000`
570			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
571			`FAILED because`
572			`RX buffer descriptor status is not correct`
573			`*************************************************************************************`
574
575			`*************************************************************************************`
576			`At time: 387872809000`
577			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
578			`FAILED because`
579			`Wrong length of the packet out from PHY`
580			`*************************************************************************************`
581
582			`*************************************************************************************`
583			`At time: 387872830000`
584			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
585			`FAILED because`
586			`Wrong data of the received packet`
587			`*************************************************************************************`
588
589			`*************************************************************************************`
590			`At time: 387872929000`
591			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
592			`FAILED because`
593			`Interrupt Receive Buffer was not set`
594			`*************************************************************************************`
595
596			`*************************************************************************************`
597			`At time: 387872929000`
598			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
599			`FAILED because`
600			`Other interrupts (except Receive Buffer) were set`
601			`*************************************************************************************`
602
603			`*************************************************************************************`
604			`At time: 387952849000`
605			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
606			`FAILED because`
607			`RX buffer descriptor status is not correct`
608			`*************************************************************************************`
609
610			`*************************************************************************************`
611			`At time: 387952849000`
612			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
613			`FAILED because`
614			`Wrong length of the packet out from PHY`
615			`*************************************************************************************`
616
617			`*************************************************************************************`
618			`At time: 387952870000`
619			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
620			`FAILED because`
621			`Wrong data of the received packet`
622			`*************************************************************************************`
623
624			`*************************************************************************************`
625			`At time: 387952969000`
626			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
627			`FAILED because`
628			`Interrupt Receive Buffer was not set`
629			`*************************************************************************************`
630
631			`*************************************************************************************`
632			`At time: 387952969000`
633			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
634			`FAILED because`
635			`Other interrupts (except Receive Buffer) were set`
636			`*************************************************************************************`
637
638			`*************************************************************************************`
639			`At time: 388115689000`
640			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
641			`FAILED because`
642			`RX buffer descriptor status is not correct`
643			`*************************************************************************************`
644
645			`*************************************************************************************`
646			`At time: 388234969000`
647			`Test: TEST 13: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 100Mbps )`
648			`reported SUCCESSFULL!`
649			`*************************************************************************************`
650
651			`***************************************************************************************`
652			`***************************************************************************************`
653			`Heading: MAC FULL DUPLEX FLOW CONTROL TEST`
654			`***************************************************************************************`
655			`***************************************************************************************`
656
657			`*************************************************************************************`
658			`At time: 397626071000`
659			`Test: TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 10Mbps )`
660			`reported SUCCESSFULL!`
661			`*************************************************************************************`
662
663			`*************************************************************************************`
664			`At time: 398657171000`
665			`Test: TEST 1: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 100Mbps )`
666			`reported SUCCESSFULL!`
667			`*************************************************************************************`
668
669			`*************************************************************************************`
670			`At time: 399868939000`
671			`Test: TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 10Mbps )`
672			`reported SUCCESSFULL!`
673			`*************************************************************************************`
674
675			`*************************************************************************************`
676			`At time: 400018579000`
677			`Test: TEST 3: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 100Mbps )`
678			`reported SUCCESSFULL!`
679			`*************************************************************************************`
680
681			`*************************************************************************************`
682			`At time: 438761899000`
683			`Test: TEST 4: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 10Mbps )`
684			`reported SUCCESSFULL!`
685			`*************************************************************************************`
686
687			`*************************************************************************************`
688			`At time: 443750959000`
689			`Test: TEST 5: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 100Mbps )`
690			`reported SUCCESSFULL!`
691			`*************************************************************************************`
692
693			`***************************************************************************************`
694			`***************************************************************************************`
695			`Heading: MAC HALF DUPLEX FLOW TEST`
696			`***************************************************************************************`
697			`***************************************************************************************`
698
699			`*************************************************************************************`
700			`At time: 443899119000`
701			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
702			`FAILED because`
703			`TX buffer descriptor status is not correct`
704			`*************************************************************************************`
705
706			`*************************************************************************************`
707			`At time: 444057159000`
708			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
709			`FAILED because`
710			`TX buffer descriptor status is not correct`
711			`*************************************************************************************`
712
713			`*************************************************************************************`
714			`At time: 444222399000`
715			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
716			`FAILED because`
717			`TX buffer descriptor status is not correct`
718			`*************************************************************************************`
719
720			`*************************************************************************************`
721			`At time: 444387999000`
722			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
723			`FAILED because`
724			`TX buffer descriptor status is not correct`
725			`*************************************************************************************`
726
727			`*************************************************************************************`
728			`At time: 444564339000`
729			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
730			`FAILED because`
731			`TX buffer descriptor status is not correct`
732			`*************************************************************************************`
733
734			`*************************************************************************************`
735			`At time: 444730779000`
736			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
737			`FAILED because`
738			`TX buffer descriptor status is not correct`
739			`*************************************************************************************`
740
741			`*************************************************************************************`
742			`At time: 444897579000`
743			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
744			`FAILED because`
745			`TX buffer descriptor status is not correct`
746			`*************************************************************************************`
747
748			`*************************************************************************************`
749			`At time: 445064679000`
750			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
751			`FAILED because`
752			`TX buffer descriptor status is not correct`
753			`*************************************************************************************`
754
755			`*************************************************************************************`
756			`At time: 445100407000`
757			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
758			`FAILED because`
759			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
760			`*************************************************************************************`
761
762			`*************************************************************************************`
763			`At time: 445293579000`
764			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
765			`FAILED because`
766			`Wrong data of the transmitted packet`
767			`*************************************************************************************`
768
769			`*************************************************************************************`
770			`At time: 445319207000`
771			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
772			`FAILED because`
773			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
774			`*************************************************************************************`
775
776			`*************************************************************************************`
777			`At time: 445461579000`
778			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
779			`FAILED because`
780			`Wrong data of the transmitted packet`
781			`*************************************************************************************`
782
783			`*************************************************************************************`
784			`At time: 445680339000`
785			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
786			`FAILED because`
787			`Wrong data of the transmitted packet`
788			`*************************************************************************************`
789
790			`*************************************************************************************`
791			`At time: 445899039000`
792			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
793			`FAILED because`
794			`Wrong data of the transmitted packet`
795			`*************************************************************************************`
796
797			`*************************************************************************************`
798			`At time: 445941549000`
799			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
800			`FAILED because`
801			`TX buffer descriptor status is not correct`
802			`*************************************************************************************`
803
804			`*************************************************************************************`
805			`At time: 445958709000`
806			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
807			`FAILED because`
808			`TX buffer descriptor status is not correct`
809			`*************************************************************************************`
810
811			`*************************************************************************************`
812			`At time: 445976589000`
813			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
814			`FAILED because`
815			`TX buffer descriptor status is not correct`
816			`*************************************************************************************`
817
818			`*************************************************************************************`
819			`At time: 445994469000`
820			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
821			`FAILED because`
822			`TX buffer descriptor status is not correct`
823			`*************************************************************************************`
824
825			`*************************************************************************************`
826			`At time: 446019369000`
827			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
828			`FAILED because`
829			`TX buffer descriptor status is not correct`
830			`*************************************************************************************`
831
832			`*************************************************************************************`
833			`At time: 446037369000`
834			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
835			`FAILED because`
836			`TX buffer descriptor status is not correct`
837			`*************************************************************************************`
838
839			`*************************************************************************************`
840			`At time: 446055369000`
841			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
842			`FAILED because`
843			`TX buffer descriptor status is not correct`
844			`*************************************************************************************`
845
846			`*************************************************************************************`
847			`At time: 446073369000`
848			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
849			`FAILED because`
850			`TX buffer descriptor status is not correct`
851			`*************************************************************************************`
852
853			`*************************************************************************************`
854			`At time: 446098269000`
855			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
856			`FAILED because`
857			`TX buffer descriptor status is not correct`
858			`*************************************************************************************`
859
860			`*************************************************************************************`
861			`At time: 446116269000`
862			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
863			`FAILED because`
864			`TX buffer descriptor status is not correct`
865			`*************************************************************************************`
866
867			`*************************************************************************************`
868			`At time: 446134389000`
869			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
870			`FAILED because`
871			`TX buffer descriptor status is not correct`
872			`*************************************************************************************`
873
874			`*************************************************************************************`
875			`At time: 446152629000`
876			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
877			`FAILED because`
878			`TX buffer descriptor status is not correct`
879			`*************************************************************************************`
880
881			`*************************************************************************************`
882			`At time: 446177769000`
883			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
884			`FAILED because`
885			`TX buffer descriptor status is not correct`
886			`*************************************************************************************`
887
888			`*************************************************************************************`
889			`At time: 446196129000`
890			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
891			`FAILED because`
892			`TX buffer descriptor status is not correct`
893			`*************************************************************************************`
894
895			`*************************************************************************************`
896			`At time: 446214489000`
897			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
898			`FAILED because`
899			`TX buffer descriptor status is not correct`
900			`*************************************************************************************`
901
902			`*************************************************************************************`
903			`At time: 446232849000`
904			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
905			`FAILED because`
906			`TX buffer descriptor status is not correct`
907			`*************************************************************************************`
908
909			`*************************************************************************************`
910			`At time: 446257989000`
911			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
912			`FAILED because`
913			`TX buffer descriptor status is not correct`
914			`*************************************************************************************`
915
916			`*************************************************************************************`
917			`At time: 446276349000`
918			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
919			`FAILED because`
920			`TX buffer descriptor status is not correct`
921			`*************************************************************************************`
922
923			`*************************************************************************************`
924			`At time: 446294709000`
925			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
926			`FAILED because`
927			`TX buffer descriptor status is not correct`
928			`*************************************************************************************`
929
930			`*************************************************************************************`
931			`At time: 446313189000`
932			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
933			`FAILED because`
934			`TX buffer descriptor status is not correct`
935			`*************************************************************************************`
936
937			`*************************************************************************************`
938			`At time: 446338689000`
939			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
940			`FAILED because`
941			`TX buffer descriptor status is not correct`
942			`*************************************************************************************`
943
944			`*************************************************************************************`
945			`At time: 446357289000`
946			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
947			`FAILED because`
948			`TX buffer descriptor status is not correct`
949			`*************************************************************************************`
950
951			`*************************************************************************************`
952			`At time: 446376009000`
953			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
954			`FAILED because`
955			`TX buffer descriptor status is not correct`
956			`*************************************************************************************`
957
958			`*************************************************************************************`
959			`At time: 446394549000`
960			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
961			`FAILED because`
962			`TX buffer descriptor status is not correct`
963			`*************************************************************************************`
964
965			`*************************************************************************************`
966			`At time: 446420169000`
967			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
968			`FAILED because`
969			`TX buffer descriptor status is not correct`
970			`*************************************************************************************`
971
972			`*************************************************************************************`
973			`At time: 446439009000`
974			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
975			`FAILED because`
976			`TX buffer descriptor status is not correct`
977			`*************************************************************************************`
978
979			`*************************************************************************************`
980			`At time: 446457849000`
981			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
982			`FAILED because`
983			`TX buffer descriptor status is not correct`
984			`*************************************************************************************`
985
986			`*************************************************************************************`
987			`At time: 446476689000`
988			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
989			`FAILED because`
990			`TX buffer descriptor status is not correct`
991			`*************************************************************************************`
992
993			`*************************************************************************************`
994			`At time: 446502309000`
995			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
996			`FAILED because`
997			`TX buffer descriptor status is not correct`
998			`*************************************************************************************`
999
1000			`*************************************************************************************`
1001			`At time: 446521149000`
1002			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1003			`FAILED because`
1004			`TX buffer descriptor status is not correct`
1005			`*************************************************************************************`
1006
1007			`*************************************************************************************`
1008			`At time: 446539989000`
1009			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1010			`FAILED because`
1011			`TX buffer descriptor status is not correct`
1012			`*************************************************************************************`
1013
1014			`*************************************************************************************`
1015			`At time: 446558949000`
1016			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1017			`FAILED because`
1018			`TX buffer descriptor status is not correct`
1019			`*************************************************************************************`
1020
1021			`*************************************************************************************`
1022			`At time: 446584929000`
1023			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1024			`FAILED because`
1025			`TX buffer descriptor status is not correct`
1026			`*************************************************************************************`
1027
1028			`*************************************************************************************`
1029			`At time: 446604009000`
1030			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1031			`FAILED because`
1032			`TX buffer descriptor status is not correct`
1033			`*************************************************************************************`
1034
1035			`*************************************************************************************`
1036			`At time: 446623209000`
1037			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1038			`FAILED because`
1039			`TX buffer descriptor status is not correct`
1040			`*************************************************************************************`
1041
1042			`*************************************************************************************`
1043			`At time: 446642229000`
1044			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1045			`FAILED because`
1046			`TX buffer descriptor status is not correct`
1047			`*************************************************************************************`
1048
1049			`*************************************************************************************`
1050			`At time: 446668329000`
1051			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1052			`FAILED because`
1053			`TX buffer descriptor status is not correct`
1054			`*************************************************************************************`
1055
1056			`*************************************************************************************`
1057			`At time: 446687649000`
1058			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1059			`FAILED because`
1060			`TX buffer descriptor status is not correct`
1061			`*************************************************************************************`
1062
1063			`*************************************************************************************`
1064			`At time: 446706969000`
1065			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1066			`FAILED because`
1067			`TX buffer descriptor status is not correct`
1068			`*************************************************************************************`
1069
1070			`*************************************************************************************`
1071			`At time: 446726289000`
1072			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1073			`FAILED because`
1074			`TX buffer descriptor status is not correct`
1075			`*************************************************************************************`
1076
1077			`*************************************************************************************`
1078			`At time: 446752389000`
1079			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1080			`FAILED because`
1081			`TX buffer descriptor status is not correct`
1082			`*************************************************************************************`
1083
1084			`*************************************************************************************`
1085			`At time: 446771709000`
1086			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1087			`FAILED because`
1088			`TX buffer descriptor status is not correct`
1089			`*************************************************************************************`
1090
1091			`*************************************************************************************`
1092			`At time: 446791029000`
1093			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1094			`FAILED because`
1095			`TX buffer descriptor status is not correct`
1096			`*************************************************************************************`
1097
1098			`*************************************************************************************`
1099			`At time: 446810469000`
1100			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1101			`FAILED because`
1102			`TX buffer descriptor status is not correct`
1103			`*************************************************************************************`
1104
1105			`*************************************************************************************`
1106			`At time: 446836929000`
1107			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1108			`FAILED because`
1109			`TX buffer descriptor status is not correct`
1110			`*************************************************************************************`
1111
1112			`*************************************************************************************`
1113			`At time: 446856489000`
1114			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1115			`FAILED because`
1116			`TX buffer descriptor status is not correct`
1117			`*************************************************************************************`
1118
1119			`*************************************************************************************`
1120			`At time: 446876169000`
1121			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1122			`FAILED because`
1123			`TX buffer descriptor status is not correct`
1124			`*************************************************************************************`
1125
1126			`*************************************************************************************`
1127			`At time: 446880487000`
1128			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1129			`FAILED because`
1130			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
1131			`*************************************************************************************`
1132
1133			`*************************************************************************************`
1134			`At time: 446895669000`
1135			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1136			`FAILED because`
1137			`Wrong data of the transmitted packet`
1138			`*************************************************************************************`
1139
1140			`*************************************************************************************`
1141			`At time: 446906887000`
1142			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1143			`FAILED because`
1144			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
1145			`*************************************************************************************`
1146
1147			`*************************************************************************************`
1148			`At time: 446922249000`
1149			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1150			`FAILED because`
1151			`Wrong data of the transmitted packet`
1152			`*************************************************************************************`
1153
1154			`*************************************************************************************`
1155			`At time: 446947089000`
1156			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1157			`FAILED because`
1158			`Wrong data of the transmitted packet`
1159			`*************************************************************************************`
1160
1161			`*************************************************************************************`
1162			`At time: 446966889000`
1163			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1164			`FAILED because`
1165			`Wrong data of the transmitted packet`
1166			`*************************************************************************************`
1167
1168
1169			`NOTE: PHY generates 'real delayed' Carrier sense and Collision signals for following tests`
1170
1171			`***************************************************************************************`
1172			`***************************************************************************************`
1173			`Heading: MAC FULL DUPLEX TRANSMIT TEST`
1174			`***************************************************************************************`
1175			`***************************************************************************************`
1176
1177			`*************************************************************************************`
1178			`At time: 447667519000`
1179			`Test: TEST 0: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 10Mbps )`
1180			`reported SUCCESSFULL!`
1181			`*************************************************************************************`
1182
1183			`*************************************************************************************`
1184			`At time: 448301959000`
1185			`Test: TEST 1: NO TRANSMIT WHEN ALL BUFFERS ARE RX ( 100Mbps )`
1186			`reported SUCCESSFULL!`
1187			`*************************************************************************************`
1188
1189			`*************************************************************************************`
1190			`At time: 482092399000`
1191			`Test: TEST 2: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 10Mbps )`
1192			`reported SUCCESSFULL!`
1193			`*************************************************************************************`
1194
1195			`*************************************************************************************`
1196			`At time: 485807599000`
1197			`Test: TEST 3: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT ONE TX BD ( 100Mbps )`
1198			`reported SUCCESSFULL!`
1199			`*************************************************************************************`
1200
1201			`*************************************************************************************`
1202			`At time: 527716635000`
1203			`Test: TEST 4: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 10Mbps )`
1204			`reported SUCCESSFULL!`
1205			`*************************************************************************************`
1206
1207			`*************************************************************************************`
1208			`At time: 532334235000`
1209			`Test: TEST 5: TRANSMIT PACKETS FROM MINFL TO MAXFL SIZES AT MAX TX BDs ( 100Mbps )`
1210			`reported SUCCESSFULL!`
1211			`*************************************************************************************`
1212
1213			`*************************************************************************************`
1214			`At time: 536725875000`
1215			`Test: TEST 6: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )`
1216			`reported SUCCESSFULL!`
1217			`*************************************************************************************`
1218
1219			`*************************************************************************************`
1220			`At time: 537331395000`
1221			`Test: TEST 7: TRANSMIT PACKETS FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )`
1222			`reported SUCCESSFULL!`
1223			`*************************************************************************************`
1224
1225			`*************************************************************************************`
1226			`At time: 540418515000`
1227			`Test: TEST 8: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 10Mbps )`
1228			`reported SUCCESSFULL!`
1229			`*************************************************************************************`
1230
1231			`*************************************************************************************`
1232			`At time: 540893355000`
1233			`Test: TEST 9: TRANSMIT PACKETS (NO PADs) FROM 0 TO (MINFL - 1) SIZES AT 8 TX BD ( 100Mbps )`
1234			`reported SUCCESSFULL!`
1235			`*************************************************************************************`
1236
1237			`*************************************************************************************`
1238			`At time: 544722915000`
1239			`Test: TEST 10: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 10Mbps )`
1240			`reported SUCCESSFULL!`
1241			`*************************************************************************************`
1242
1243			`*************************************************************************************`
1244			`At time: 545120475000`
1245			`Test: TEST 11: TRANSMIT PACKETS ACROSS MAXFL VALUE AT 13 TX BDs ( 100Mbps )`
1246			`reported SUCCESSFULL!`
1247			`*************************************************************************************`
1248
1249			`*************************************************************************************`
1250			`At time: 545448195000`
1251			`Test: TEST 12: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 10Mbps )`
1252			`reported SUCCESSFULL!`
1253			`*************************************************************************************`
1254
1255			`*************************************************************************************`
1256			`At time: 545490315000`
1257			`Test: TEST 13: TRANSMIT PACKETS ACROSS CHANGED MAXFL VALUE AT 13 TX BDs ( 100Mbps )`
1258			`reported SUCCESSFULL!`
1259			`*************************************************************************************`
1260
1261			`*************************************************************************************`
1262			`At time: 548798595000`
1263			`Test: TEST 14: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 10Mbps )`
1264			`reported SUCCESSFULL!`
1265			`*************************************************************************************`
1266
1267			`*************************************************************************************`
1268			`At time: 549139275000`
1269			`Test: TEST 15: TRANSMIT PACKETS ACROSS CHANGED MINFL VALUE AT 7 TX BDs ( 100Mbps )`
1270			`reported SUCCESSFULL!`
1271			`*************************************************************************************`
1272
1273			`*************************************************************************************`
1274			`At time: 657784995000`
1275			`Test: TEST 16: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 10Mbps )`
1276			`reported SUCCESSFULL!`
1277			`*************************************************************************************`
1278
1279			`*************************************************************************************`
1280			`At time: 668694675000`
1281			`Test: TEST 17: TRANSMIT PACKETS ACROSS MAXFL WITH HUGEN AT 19 TX BDs ( 100Mbps )`
1282			`reported SUCCESSFULL!`
1283			`*************************************************************************************`
1284
1285			`*************************************************************************************`
1286			`At time: 670752195000`
1287			`Test: TEST 18: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 10Mbps )`
1288			`reported SUCCESSFULL!`
1289			`*************************************************************************************`
1290
1291			`*************************************************************************************`
1292			`At time: 671018715000`
1293			`Test: TEST 19: IPG DURING BACK-TO-BACK TRANSMIT AT 88 TX BDs ( 100Mbps )`
1294			`reported SUCCESSFULL!`
1295			`*************************************************************************************`
1296
1297			`*************************************************************************************`
1298			`At time: 674812635000`
1299			`Test: TEST 20: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 10Mbps )`
1300			`reported SUCCESSFULL!`
1301			`*************************************************************************************`
1302
1303			`*************************************************************************************`
1304			`At time: 675288555000`
1305			`Test: TEST 21: TRANSMIT PACKETS AFTER TX UNDER-RUN ON EACH PACKET's BYTE AT 2 TX BDs ( 100Mbps )`
1306			`reported SUCCESSFULL!`
1307			`*************************************************************************************`
1308
1309			`***************************************************************************************`
1310			`***************************************************************************************`
1311			`Heading: MAC FULL DUPLEX RECEIVE TEST`
1312			`***************************************************************************************`
1313			`***************************************************************************************`
1314
1315			`*************************************************************************************`
1316			`At time: 684922639000`
1317			`Test: TEST 0: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 10Mbps )`
1318			`reported SUCCESSFULL!`
1319			`*************************************************************************************`
1320
1321			`*************************************************************************************`
1322			`At time: 686451079000`
1323			`Test: TEST 1: NO RECEIVE WHEN ALL BUFFERS ARE TX ( 100Mbps )`
1324			`reported SUCCESSFULL!`
1325			`*************************************************************************************`
1326
1327			`*************************************************************************************`
1328			`At time: 726629929000`
1329			`Test: TEST 2: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 10Mbps )`
1330			`reported SUCCESSFULL!`
1331			`*************************************************************************************`
1332
1333			`*************************************************************************************`
1334			`At time: 731956609000`
1335			`Test: TEST 3: RECEIVE PACKET SYNCHRONIZATION WITH RECEIVE DISABLE/ENABLE ( 100Mbps )`
1336			`reported SUCCESSFULL!`
1337			`*************************************************************************************`
1338
1339			`*************************************************************************************`
1340			`At time: 765608449000`
1341			`Test: TEST 4: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 10Mbps )`
1342			`reported SUCCESSFULL!`
1343			`*************************************************************************************`
1344
1345			`*************************************************************************************`
1346			`At time: 769183969000`
1347			`Test: TEST 5: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT ONE RX BD ( 100Mbps )`
1348			`reported SUCCESSFULL!`
1349			`*************************************************************************************`
1350
1351			`*************************************************************************************`
1352			`At time: 810685755000`
1353			`Test: TEST 6: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 10Mbps )`
1354			`reported SUCCESSFULL!`
1355			`*************************************************************************************`
1356
1357			`*************************************************************************************`
1358			`At time: 815124075000`
1359			`Test: TEST 7: RECEIVE PACKETS FROM MINFL TO MAXFL SIZES AT MAX RX BDs ( 100Mbps )`
1360			`reported SUCCESSFULL!`
1361			`*************************************************************************************`
1362
1363			`*************************************************************************************`
1364			`At time: 818552775000`
1365			`Test: TEST 8: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 10Mbps )`
1366			`reported SUCCESSFULL!`
1367			`*************************************************************************************`
1368
1369			`*************************************************************************************`
1370			`At time: 819023025000`
1371			`Test: TEST 9: RECEIVE PACKETS FROM 0 TO (MINFL + 12) SIZES AT 8 RX BD ( 100Mbps )`
1372			`reported SUCCESSFULL!`
1373			`*************************************************************************************`
1374
1375			`*************************************************************************************`
1376			`At time: 819573439000`
1377			`Test: TEST 10: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 10Mbps )`
1378			`reported SUCCESSFULL!`
1379			`*************************************************************************************`
1380
1381			`*************************************************************************************`
1382			`At time: 819653959000`
1383			`Test: TEST 11: RECEIVE PACKETS AT ONE RX BD AND CHECK ADDRESSES ( 100Mbps )`
1384			`reported SUCCESSFULL!`
1385			`*************************************************************************************`
1386
1387			`*************************************************************************************`
1388			`At time: 819724969000`
1389			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1390			`FAILED because`
1391			`RX buffer descriptor status is not correct`
1392			`*************************************************************************************`
1393
1394			`*************************************************************************************`
1395			`At time: 819789048000`
1396			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1397			`FAILED because`
1398			`WB INT signal should not be set`
1399			`*************************************************************************************`
1400
1401			`*************************************************************************************`
1402			`At time: 819789409000`
1403			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1404			`FAILED because`
1405			`Any of interrupts (except Receive Buffer) was set`
1406			`*************************************************************************************`
1407
1408			`*************************************************************************************`
1409			`At time: 819853248000`
1410			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1411			`FAILED because`
1412			`WB INT signal should not be set`
1413			`*************************************************************************************`
1414
1415			`*************************************************************************************`
1416			`At time: 819853609000`
1417			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1418			`FAILED because`
1419			`Any of interrupts (except Receive Buffer) was set`
1420			`*************************************************************************************`
1421
1422			`*************************************************************************************`
1423			`At time: 819857689000`
1424			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1425			`FAILED because`
1426			`RX buffer descriptor status is not correct`
1427			`*************************************************************************************`
1428
1429			`*************************************************************************************`
1430			`At time: 819857809000`
1431			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1432			`FAILED because`
1433			`Interrupt Receive Buffer Error was not set`
1434			`*************************************************************************************`
1435
1436			`*************************************************************************************`
1437			`At time: 819857809000`
1438			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1439			`FAILED because`
1440			`Other interrupts (except Receive Buffer Error) were set`
1441			`*************************************************************************************`
1442
1443			`*************************************************************************************`
1444			`At time: 819928129000`
1445			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1446			`FAILED because`
1447			`RX buffer descriptor status is not correct`
1448			`*************************************************************************************`
1449
1450			`*************************************************************************************`
1451			`At time: 819928129000`
1452			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1453			`FAILED because`
1454			`Wrong length of the packet out from PHY`
1455			`*************************************************************************************`
1456
1457			`*************************************************************************************`
1458			`At time: 819928147000`
1459			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1460			`FAILED because`
1461			`Wrong data of the received packet`
1462			`*************************************************************************************`
1463
1464			`*************************************************************************************`
1465			`At time: 819928249000`
1466			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1467			`FAILED because`
1468			`Interrupt Receive Buffer was not set`
1469			`*************************************************************************************`
1470
1471			`*************************************************************************************`
1472			`At time: 819928249000`
1473			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1474			`FAILED because`
1475			`Other interrupts (except Receive Buffer) were set`
1476			`*************************************************************************************`
1477
1478			`*************************************************************************************`
1479			`At time: 819998688000`
1480			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1481			`FAILED because`
1482			`WB INT signal should not be set`
1483			`*************************************************************************************`
1484
1485			`*************************************************************************************`
1486			`At time: 819999049000`
1487			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1488			`FAILED because`
1489			`Any of interrupts (except Receive Buffer) was set`
1490			`*************************************************************************************`
1491
1492			`*************************************************************************************`
1493			`At time: 820003129000`
1494			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1495			`FAILED because`
1496			`RX buffer descriptor status is not correct`
1497			`*************************************************************************************`
1498
1499			`*************************************************************************************`
1500			`At time: 820003249000`
1501			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1502			`FAILED because`
1503			`Interrupt Receive Buffer Error was not set`
1504			`*************************************************************************************`
1505
1506			`*************************************************************************************`
1507			`At time: 820003249000`
1508			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1509			`FAILED because`
1510			`Other interrupts (except Receive Buffer Error) were set`
1511			`*************************************************************************************`
1512
1513			`*************************************************************************************`
1514			`At time: 820073689000`
1515			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1516			`FAILED because`
1517			`RX buffer descriptor status is not correct`
1518			`*************************************************************************************`
1519
1520			`*************************************************************************************`
1521			`At time: 820073689000`
1522			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1523			`FAILED because`
1524			`Wrong length of the packet out from PHY`
1525			`*************************************************************************************`
1526
1527			`*************************************************************************************`
1528			`At time: 820073707000`
1529			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1530			`FAILED because`
1531			`Wrong data of the received packet`
1532			`*************************************************************************************`
1533
1534			`*************************************************************************************`
1535			`At time: 820073809000`
1536			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1537			`FAILED because`
1538			`Interrupt Receive Buffer was not set`
1539			`*************************************************************************************`
1540
1541			`*************************************************************************************`
1542			`At time: 820073809000`
1543			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1544			`FAILED because`
1545			`Other interrupts (except Receive Buffer) were set`
1546			`*************************************************************************************`
1547
1548			`*************************************************************************************`
1549			`At time: 820153488000`
1550			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1551			`FAILED because`
1552			`WB INT signal should not be set`
1553			`*************************************************************************************`
1554
1555			`*************************************************************************************`
1556			`At time: 820153849000`
1557			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1558			`FAILED because`
1559			`Any of interrupts (except Receive Buffer) was set`
1560			`*************************************************************************************`
1561
1562			`*************************************************************************************`
1563			`At time: 820157929000`
1564			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1565			`FAILED because`
1566			`RX buffer descriptor status is not correct`
1567			`*************************************************************************************`
1568
1569			`*************************************************************************************`
1570			`At time: 820158049000`
1571			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1572			`FAILED because`
1573			`Interrupt Receive Buffer Error was not set`
1574			`*************************************************************************************`
1575
1576			`*************************************************************************************`
1577			`At time: 820158049000`
1578			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1579			`FAILED because`
1580			`Other interrupts (except Receive Buffer Error) were set`
1581			`*************************************************************************************`
1582
1583			`*************************************************************************************`
1584			`At time: 820238089000`
1585			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1586			`FAILED because`
1587			`RX buffer descriptor status is not correct`
1588			`*************************************************************************************`
1589
1590			`*************************************************************************************`
1591			`At time: 820238089000`
1592			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1593			`FAILED because`
1594			`Wrong length of the packet out from PHY`
1595			`*************************************************************************************`
1596
1597			`*************************************************************************************`
1598			`At time: 820238110000`
1599			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1600			`FAILED because`
1601			`Wrong data of the received packet`
1602			`*************************************************************************************`
1603
1604			`*************************************************************************************`
1605			`At time: 820238209000`
1606			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1607			`FAILED because`
1608			`Interrupt Receive Buffer was not set`
1609			`*************************************************************************************`
1610
1611			`*************************************************************************************`
1612			`At time: 820238209000`
1613			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1614			`FAILED because`
1615			`Other interrupts (except Receive Buffer) were set`
1616			`*************************************************************************************`
1617
1618			`*************************************************************************************`
1619			`At time: 820318129000`
1620			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1621			`FAILED because`
1622			`RX buffer descriptor status is not correct`
1623			`*************************************************************************************`
1624
1625			`*************************************************************************************`
1626			`At time: 820318129000`
1627			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1628			`FAILED because`
1629			`Wrong length of the packet out from PHY`
1630			`*************************************************************************************`
1631
1632			`*************************************************************************************`
1633			`At time: 820318150000`
1634			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1635			`FAILED because`
1636			`Wrong data of the received packet`
1637			`*************************************************************************************`
1638
1639			`*************************************************************************************`
1640			`At time: 820318249000`
1641			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1642			`FAILED because`
1643			`Interrupt Receive Buffer was not set`
1644			`*************************************************************************************`
1645
1646			`*************************************************************************************`
1647			`At time: 820318249000`
1648			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1649			`FAILED because`
1650			`Other interrupts (except Receive Buffer) were set`
1651			`*************************************************************************************`
1652
1653			`*************************************************************************************`
1654			`At time: 820480969000`
1655			`Test: TEST 12: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 10Mbps )`
1656			`FAILED because`
1657			`RX buffer descriptor status is not correct`
1658			`*************************************************************************************`
1659
1660			`*************************************************************************************`
1661			`At time: 820600249000`
1662			`Test: TEST 13: RECEIVE PACKETS AT 8 RX BD WITH RX FIFO AND RX BD OVERRUN ( 100Mbps )`
1663			`reported SUCCESSFULL!`
1664			`*************************************************************************************`
1665
1666			`***************************************************************************************`
1667			`***************************************************************************************`
1668			`Heading: MAC FULL DUPLEX FLOW CONTROL TEST`
1669			`***************************************************************************************`
1670			`***************************************************************************************`
1671
1672			`*************************************************************************************`
1673			`At time: 829991351000`
1674			`Test: TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 10Mbps )`
1675			`reported SUCCESSFULL!`
1676			`*************************************************************************************`
1677
1678			`*************************************************************************************`
1679			`At time: 831022451000`
1680			`Test: TEST 1: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 100Mbps )`
1681			`reported SUCCESSFULL!`
1682			`*************************************************************************************`
1683
1684			`*************************************************************************************`
1685			`At time: 832234219000`
1686			`Test: TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 10Mbps )`
1687			`reported SUCCESSFULL!`
1688			`*************************************************************************************`
1689
1690			`*************************************************************************************`
1691			`At time: 832383859000`
1692			`Test: TEST 3: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED ON AND OFF AT ONE RX BD ( 100Mbps )`
1693			`reported SUCCESSFULL!`
1694			`*************************************************************************************`
1695
1696			`*************************************************************************************`
1697			`At time: 871127179000`
1698			`Test: TEST 4: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 10Mbps )`
1699			`reported SUCCESSFULL!`
1700			`*************************************************************************************`
1701
1702			`*************************************************************************************`
1703			`At time: 876116239000`
1704			`Test: TEST 5: RANDOM RECEIVE AND TRANSMIT FRAMES AT ONE TX AND ONE RX BD ( 100Mbps )`
1705			`reported SUCCESSFULL!`
1706			`*************************************************************************************`
1707
1708			`***************************************************************************************`
1709			`***************************************************************************************`
1710			`Heading: MAC HALF DUPLEX FLOW TEST`
1711			`***************************************************************************************`
1712			`***************************************************************************************`
1713
1714			`*************************************************************************************`
1715			`At time: 876264399000`
1716			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1717			`FAILED because`
1718			`TX buffer descriptor status is not correct`
1719			`*************************************************************************************`
1720
1721			`*************************************************************************************`
1722			`At time: 876422439000`
1723			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1724			`FAILED because`
1725			`TX buffer descriptor status is not correct`
1726			`*************************************************************************************`
1727
1728			`*************************************************************************************`
1729			`At time: 876587679000`
1730			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1731			`FAILED because`
1732			`TX buffer descriptor status is not correct`
1733			`*************************************************************************************`
1734
1735			`*************************************************************************************`
1736			`At time: 876753279000`
1737			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1738			`FAILED because`
1739			`TX buffer descriptor status is not correct`
1740			`*************************************************************************************`
1741
1742			`*************************************************************************************`
1743			`At time: 876929619000`
1744			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1745			`FAILED because`
1746			`TX buffer descriptor status is not correct`
1747			`*************************************************************************************`
1748
1749			`*************************************************************************************`
1750			`At time: 877096059000`
1751			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1752			`FAILED because`
1753			`TX buffer descriptor status is not correct`
1754			`*************************************************************************************`
1755
1756			`*************************************************************************************`
1757			`At time: 877262859000`
1758			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1759			`FAILED because`
1760			`TX buffer descriptor status is not correct`
1761			`*************************************************************************************`
1762
1763			`*************************************************************************************`
1764			`At time: 877429959000`
1765			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1766			`FAILED because`
1767			`TX buffer descriptor status is not correct`
1768			`*************************************************************************************`
1769
1770			`*************************************************************************************`
1771			`At time: 877607619000`
1772			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1773			`FAILED because`
1774			`TX buffer descriptor status is not correct`
1775			`*************************************************************************************`
1776
1777			`*************************************************************************************`
1778			`At time: 877635687000`
1779			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1780			`FAILED because`
1781			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
1782			`*************************************************************************************`
1783
1784			`*************************************************************************************`
1785			`At time: 877826379000`
1786			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1787			`FAILED because`
1788			`Wrong data of the transmitted packet`
1789			`*************************************************************************************`
1790
1791			`*************************************************************************************`
1792			`At time: 877854487000`
1793			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1794			`FAILED because`
1795			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
1796			`*************************************************************************************`
1797
1798			`*************************************************************************************`
1799			`At time: 877994859000`
1800			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1801			`FAILED because`
1802			`Wrong data of the transmitted packet`
1803			`*************************************************************************************`
1804
1805			`*************************************************************************************`
1806			`At time: 878163519000`
1807			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1808			`FAILED because`
1809			`Wrong data of the transmitted packet`
1810			`*************************************************************************************`
1811
1812			`*************************************************************************************`
1813			`At time: 878264599000`
1814			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1815			`FAILED because`
1816			`Receive packet should be accepted`
1817			`*************************************************************************************`
1818
1819			`*************************************************************************************`
1820			`At time: 878342599000`
1821			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1822			`FAILED because`
1823			`Wrong length of the packet out from PHY`
1824			`*************************************************************************************`
1825
1826			`*************************************************************************************`
1827			`At time: 878342616000`
1828			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1829			`FAILED because`
1830			`Wrong data of the received packet`
1831			`*************************************************************************************`
1832
1833			`*************************************************************************************`
1834			`At time: 878342616000`
1835			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1836			`FAILED because`
1837			`RX buffer descriptor status is not correct`
1838			`*************************************************************************************`
1839
1840			`*************************************************************************************`
1841			`At time: 878342859000`
1842			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1843			`FAILED because`
1844			`Wrong data of the transmitted packet`
1845			`*************************************************************************************`
1846
1847			`*************************************************************************************`
1848			`At time: 878342959000`
1849			`Test: TEST 0: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 10Mbps )`
1850			`FAILED because`
1851			`Interrupt Receive Error was not set`
1852			`*************************************************************************************`
1853
1854			`*************************************************************************************`
1855			`At time: 878385939000`
1856			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1857			`FAILED because`
1858			`TX buffer descriptor status is not correct`
1859			`*************************************************************************************`
1860
1861			`*************************************************************************************`
1862			`At time: 878403099000`
1863			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1864			`FAILED because`
1865			`TX buffer descriptor status is not correct`
1866			`*************************************************************************************`
1867
1868			`*************************************************************************************`
1869			`At time: 878420979000`
1870			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1871			`FAILED because`
1872			`TX buffer descriptor status is not correct`
1873			`*************************************************************************************`
1874
1875			`*************************************************************************************`
1876			`At time: 878438859000`
1877			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1878			`FAILED because`
1879			`TX buffer descriptor status is not correct`
1880			`*************************************************************************************`
1881
1882			`*************************************************************************************`
1883			`At time: 878463639000`
1884			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1885			`FAILED because`
1886			`TX buffer descriptor status is not correct`
1887			`*************************************************************************************`
1888
1889			`*************************************************************************************`
1890			`At time: 878481519000`
1891			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1892			`FAILED because`
1893			`TX buffer descriptor status is not correct`
1894			`*************************************************************************************`
1895
1896			`*************************************************************************************`
1897			`At time: 878499399000`
1898			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1899			`FAILED because`
1900			`TX buffer descriptor status is not correct`
1901			`*************************************************************************************`
1902
1903			`*************************************************************************************`
1904			`At time: 878517399000`
1905			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1906			`FAILED because`
1907			`TX buffer descriptor status is not correct`
1908			`*************************************************************************************`
1909
1910			`*************************************************************************************`
1911			`At time: 878542299000`
1912			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1913			`FAILED because`
1914			`TX buffer descriptor status is not correct`
1915			`*************************************************************************************`
1916
1917			`*************************************************************************************`
1918			`At time: 878560299000`
1919			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1920			`FAILED because`
1921			`TX buffer descriptor status is not correct`
1922			`*************************************************************************************`
1923
1924			`*************************************************************************************`
1925			`At time: 878578419000`
1926			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1927			`FAILED because`
1928			`TX buffer descriptor status is not correct`
1929			`*************************************************************************************`
1930
1931			`*************************************************************************************`
1932			`At time: 878596539000`
1933			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1934			`FAILED because`
1935			`TX buffer descriptor status is not correct`
1936			`*************************************************************************************`
1937
1938			`*************************************************************************************`
1939			`At time: 878621559000`
1940			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1941			`FAILED because`
1942			`TX buffer descriptor status is not correct`
1943			`*************************************************************************************`
1944
1945			`*************************************************************************************`
1946			`At time: 878639799000`
1947			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1948			`FAILED because`
1949			`TX buffer descriptor status is not correct`
1950			`*************************************************************************************`
1951
1952			`*************************************************************************************`
1953			`At time: 878658039000`
1954			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1955			`FAILED because`
1956			`TX buffer descriptor status is not correct`
1957			`*************************************************************************************`
1958
1959			`*************************************************************************************`
1960			`At time: 878676399000`
1961			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1962			`FAILED because`
1963			`TX buffer descriptor status is not correct`
1964			`*************************************************************************************`
1965
1966			`*************************************************************************************`
1967			`At time: 878701539000`
1968			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1969			`FAILED because`
1970			`TX buffer descriptor status is not correct`
1971			`*************************************************************************************`
1972
1973			`*************************************************************************************`
1974			`At time: 878719899000`
1975			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1976			`FAILED because`
1977			`TX buffer descriptor status is not correct`
1978			`*************************************************************************************`
1979
1980			`*************************************************************************************`
1981			`At time: 878738259000`
1982			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1983			`FAILED because`
1984			`TX buffer descriptor status is not correct`
1985			`*************************************************************************************`
1986
1987			`*************************************************************************************`
1988			`At time: 878756739000`
1989			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1990			`FAILED because`
1991			`TX buffer descriptor status is not correct`
1992			`*************************************************************************************`
1993
1994			`*************************************************************************************`
1995			`At time: 878782119000`
1996			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
1997			`FAILED because`
1998			`TX buffer descriptor status is not correct`
1999			`*************************************************************************************`
2000
2001			`*************************************************************************************`
2002			`At time: 878800599000`
2003			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2004			`FAILED because`
2005			`TX buffer descriptor status is not correct`
2006			`*************************************************************************************`
2007
2008			`*************************************************************************************`
2009			`At time: 878819199000`
2010			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2011			`FAILED because`
2012			`TX buffer descriptor status is not correct`
2013			`*************************************************************************************`
2014
2015			`*************************************************************************************`
2016			`At time: 878837919000`
2017			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2018			`FAILED because`
2019			`TX buffer descriptor status is not correct`
2020			`*************************************************************************************`
2021
2022			`*************************************************************************************`
2023			`At time: 878863419000`
2024			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2025			`FAILED because`
2026			`TX buffer descriptor status is not correct`
2027			`*************************************************************************************`
2028
2029			`*************************************************************************************`
2030			`At time: 878882139000`
2031			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2032			`FAILED because`
2033			`TX buffer descriptor status is not correct`
2034			`*************************************************************************************`
2035
2036			`*************************************************************************************`
2037			`At time: 878900859000`
2038			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2039			`FAILED because`
2040			`TX buffer descriptor status is not correct`
2041			`*************************************************************************************`
2042
2043			`*************************************************************************************`
2044			`At time: 878919699000`
2045			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2046			`FAILED because`
2047			`TX buffer descriptor status is not correct`
2048			`*************************************************************************************`
2049
2050			`*************************************************************************************`
2051			`At time: 878945439000`
2052			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2053			`FAILED because`
2054			`TX buffer descriptor status is not correct`
2055			`*************************************************************************************`
2056
2057			`*************************************************************************************`
2058			`At time: 878964279000`
2059			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2060			`FAILED because`
2061			`TX buffer descriptor status is not correct`
2062			`*************************************************************************************`
2063
2064			`*************************************************************************************`
2065			`At time: 878983119000`
2066			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2067			`FAILED because`
2068			`TX buffer descriptor status is not correct`
2069			`*************************************************************************************`
2070
2071			`*************************************************************************************`
2072			`At time: 879002079000`
2073			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2074			`FAILED because`
2075			`TX buffer descriptor status is not correct`
2076			`*************************************************************************************`
2077
2078			`*************************************************************************************`
2079			`At time: 879027939000`
2080			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2081			`FAILED because`
2082			`TX buffer descriptor status is not correct`
2083			`*************************************************************************************`
2084
2085			`*************************************************************************************`
2086			`At time: 879046899000`
2087			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2088			`FAILED because`
2089			`TX buffer descriptor status is not correct`
2090			`*************************************************************************************`
2091
2092			`*************************************************************************************`
2093			`At time: 879065979000`
2094			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2095			`FAILED because`
2096			`TX buffer descriptor status is not correct`
2097			`*************************************************************************************`
2098
2099			`*************************************************************************************`
2100			`At time: 879085059000`
2101			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2102			`FAILED because`
2103			`TX buffer descriptor status is not correct`
2104			`*************************************************************************************`
2105
2106			`*************************************************************************************`
2107			`At time: 879111039000`
2108			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2109			`FAILED because`
2110			`TX buffer descriptor status is not correct`
2111			`*************************************************************************************`
2112
2113			`*************************************************************************************`
2114			`At time: 879130239000`
2115			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2116			`FAILED because`
2117			`TX buffer descriptor status is not correct`
2118			`*************************************************************************************`
2119
2120			`*************************************************************************************`
2121			`At time: 879149439000`
2122			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2123			`FAILED because`
2124			`TX buffer descriptor status is not correct`
2125			`*************************************************************************************`
2126
2127			`*************************************************************************************`
2128			`At time: 879168759000`
2129			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2130			`FAILED because`
2131			`TX buffer descriptor status is not correct`
2132			`*************************************************************************************`
2133
2134			`*************************************************************************************`
2135			`At time: 879194859000`
2136			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2137			`FAILED because`
2138			`TX buffer descriptor status is not correct`
2139			`*************************************************************************************`
2140
2141			`*************************************************************************************`
2142			`At time: 879214179000`
2143			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2144			`FAILED because`
2145			`TX buffer descriptor status is not correct`
2146			`*************************************************************************************`
2147
2148			`*************************************************************************************`
2149			`At time: 879233499000`
2150			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2151			`FAILED because`
2152			`TX buffer descriptor status is not correct`
2153			`*************************************************************************************`
2154
2155			`*************************************************************************************`
2156			`At time: 879252939000`
2157			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2158			`FAILED because`
2159			`TX buffer descriptor status is not correct`
2160			`*************************************************************************************`
2161
2162			`*************************************************************************************`
2163			`At time: 879279279000`
2164			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2165			`FAILED because`
2166			`TX buffer descriptor status is not correct`
2167			`*************************************************************************************`
2168
2169			`*************************************************************************************`
2170			`At time: 879298719000`
2171			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2172			`FAILED because`
2173			`TX buffer descriptor status is not correct`
2174			`*************************************************************************************`
2175
2176			`*************************************************************************************`
2177			`At time: 879318279000`
2178			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2179			`FAILED because`
2180			`TX buffer descriptor status is not correct`
2181			`*************************************************************************************`
2182
2183			`*************************************************************************************`
2184			`At time: 879322807000`
2185			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2186			`FAILED because`
2187			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
2188			`*************************************************************************************`
2189
2190			`*************************************************************************************`
2191			`At time: 879342999000`
2192			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2193			`FAILED because`
2194			`Wrong data of the transmitted packet`
2195			`*************************************************************************************`
2196
2197			`*************************************************************************************`
2198			`At time: 879369459000`
2199			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2200			`FAILED because`
2201			`TX buffer descriptor status is not correct`
2202			`*************************************************************************************`
2203
2204			`*************************************************************************************`
2205			`At time: 879374007000`
2206			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2207			`FAILED because`
2208			`Transmit should NOT start more than 1 CLK after CarrierSense and causing Collision`
2209			`*************************************************************************************`
2210
2211			`*************************************************************************************`
2212			`At time: 879389139000`
2213			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2214			`FAILED because`
2215			`Wrong data of the transmitted packet`
2216			`*************************************************************************************`
2217
2218			`*************************************************************************************`
2219			`At time: 879408819000`
2220			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2221			`FAILED because`
2222			`Wrong data of the transmitted packet`
2223			`*************************************************************************************`
2224
2225			`*************************************************************************************`
2226			`At time: 879420079000`
2227			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2228			`FAILED because`
2229			`Receive packet should be accepted`
2230			`*************************************************************************************`
2231
2232			`*************************************************************************************`
2233			`At time: 879428239000`
2234			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2235			`FAILED because`
2236			`Wrong length of the packet out from PHY`
2237			`*************************************************************************************`
2238
2239			`*************************************************************************************`
2240			`At time: 879428256000`
2241			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2242			`FAILED because`
2243			`Wrong data of the received packet`
2244			`*************************************************************************************`
2245
2246			`*************************************************************************************`
2247			`At time: 879428256000`
2248			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2249			`FAILED because`
2250			`RX buffer descriptor status is not correct`
2251			`*************************************************************************************`
2252
2253			`*************************************************************************************`
2254			`At time: 879428499000`
2255			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2256			`FAILED because`
2257			`Wrong data of the transmitted packet`
2258			`*************************************************************************************`
2259
2260			`*************************************************************************************`
2261			`At time: 879428599000`
2262			`Test: TEST 1: DEFER, COLL. AND LATE COLL. WHILE TRANSMITTING AND RECEIVING FRM. AT 4 TX/RX BD ( 100Mbps )`
2263			`FAILED because`
2264			`Interrupt Receive Error was not set`
2265			`*************************************************************************************`
2266
2267			`************************** Ethernet MAC test summary ********************************`
2268			`Tests performed: 111`
2269			`Failed tests : 6`
2270			`Successfull tests: 105`
2271			`************************** Ethernet MAC test summary ********************************`

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