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URL https://opencores.org/ocsvn/ezidebug/ezidebug/trunk

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[/] [ezidebug/] [trunk/] [EziDebug_src/] [textquery.h] - Blame information for rev 2

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Line No. Rev Author Line
1 2 EziDebug
#ifndef TEXTQUERY_H
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#define TEXTQUERY_H
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#include <QtAlgorithms>
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#include <QString>
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#include <QStringList>
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#include <QFile>
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#include <QFileInfo>
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#include <QVector>
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#include <QPair>
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#include <QTextStream>
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#include <QDebug>
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#include <memory.h>
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#define OUT(n)  "OUT" #n ".txt"
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#define OUTT(n)  OUT##n
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#define OUTFILE(n) outfile##n
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// QString module_name = "ifft_top";
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#if 0
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inout_table1[] =
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{
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    "clk_8x", 1, 0, 0,
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    "rst", 1, 0, 0,
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    "frame_mk_done", 1, 0, 0,
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    "cp_len", 1, 8, 0,
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    "ulmc_sym_num ", 1, 5, 0,
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    "datao_frame_buf", 1, 23, 0,
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    "dspreg_ifftexp_ref",1, 5, 0,
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    "mc_ul_start", 1, 0, 0,
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    "mc_ul_len", 1, 19, 0,
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    "ifft_airif_data", 0, 23, 0,
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    "ifft_airif_dval", 0, 0, 0,
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    "ren_frame_buf", 0, 0, 0,
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    "raddr_frame_buf", 0, 15, 0,
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    "rover_frame_buf", 0, 0, 0,
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    "master_source_ena_ifft", 0, 0, 0,
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    "master_sink_sop_ifft", 0, 0, 0,
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    "datai_ifft_real_14b", 0, 13, 0,
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    "datai_ifft_imag_14b", 0, 13, 0,
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    "wflag_duc_buf", 0, 0, 0,
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    "ifft_done_d1", 0, 0, 0,
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    "rflag_frame_buf",0, 0, 0,
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    "airif_clr", 0, 0, 0,
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    "wen_shift_buf", 0, 0, 0,
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    "ren_airif_buf", 0, 0, 0,
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    "usedw_airif_buf", 0, 10, 0,
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    "fmk_done_val", 0, 0, 0,
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    "ifft_start", 0, 0, 0,
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    "",0,0,0,
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}
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#endif
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#if 0
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regchain_table1[] =
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{
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    "ifft_time_ctrl_inst.ren_frame_buf", 0, 0,
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    "ifft_time_ctrl_inst.raddr_frame_buf", 15, 0,
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    "ifft_time_ctrl_inst.rover_frame_buf", 0, 0,
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    "ifft_time_ctrl_inst.master_sink_dav_ifft", 0, 0,
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    "ifft_time_ctrl_inst.master_source_dav_ifft", 0, 0,
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    "ifft_time_ctrl_inst.master_sink_sop_ifft", 0, 0,
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    "ifft_time_ctrl_inst.datai_ifft_real", 11, 0,
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    "ifft_time_ctrl_inst.datai_ifft_imag", 11, 0,
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    "ifft_time_ctrl_inst.wen_shift_buf", 0, 0,
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    "ifft_time_ctrl_inst.waddr_shift_buf", 10, 0,
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    "ifft_time_ctrl_inst.datai_shift_real", 11, 0,
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    "ifft_time_ctrl_inst.datai_shift_imag", 11, 0,
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    "ifft_time_ctrl_inst.ren_shift_buf", 0, 0,
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    "ifft_time_ctrl_inst.raddr_shift_buf", 9, 0,
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    "ifft_time_ctrl_inst.wen_duc_buf ", 0, 0,
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    "ifft_time_ctrl_inst.rflag_frame_buf", 0, 0,
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    "ifft_time_ctrl_inst.rcnt_frame_buf", 9, 0,
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    "ifft_time_ctrl_inst.exp_ifft_shift", 5, 0,
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    "ifft_time_ctrl_inst.rcnt_shift_buf", 10, 0,
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    "ifft_time_ctrl_inst.ifft_done", 0, 0,
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    "ifft_time_ctrl_inst.ifft_start",0,0,
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    "ifft_time_ctrl_inst.ren_frame_buf_d1",0,0,
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    "ifft_time_ctrl_inst.ren_frame_buf_d2",0,0,
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    "ifft_time_ctrl_inst.ren_frame_buf_d3",0,0,
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    "ifft_time_ctrl_inst.wen_shift_buf_d1",0,0,
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    "ifft_time_ctrl_inst.wen_shift_buf_d2",0,0,
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    "ifft_time_ctrl_inst.ifft_done_d1",0,0,
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    "ifft_time_ctrl_inst.ifft_done_d2",0,0,
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    "ifft_time_ctrl_inst.wflag_duc_buf_d1",0,0,
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    "ifft_time_ctrl_inst.ren_shift_buf_d1",0,0,
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    "ifft_time_ctrl_inst.ren_shift_buf_d2",0,0,
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    "ifft_time_ctrl_inst.master_source_ena_ifft_d1",0,0,
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    "ifft_time_ctrl_inst.datao_real_ifft_d1", 11, 0,
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    "ifft_time_ctrl_inst.datao_imag_ifft_d1", 11, 0,
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    "ifft_time_ctrl_inst.frame_mk_done_d1",0,0,
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    "ifft_time_ctrl_inst.ifft_airif_dval_d1",0,0,
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    "ifft_time_ctrl_inst.ifft_airif_dval_d2",0,0,
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    "ifft_time_ctrl_inst.ifft_airif_dval_d3",0,0,
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    "ifft_inst.master_sink_ena",0,0,
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    "ifft_inst.master_source_sop",0,0,
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    "ifft_inst.master_source_eop",0,0,
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    "ifft_inst.master_source_ena",0,0,
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    "ifft_inst.butt_ram_raddr",9,0,
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    "ifft_inst.butt_ram_ren", 0, 0,
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    "ifft_inst.butt_ram_wdatai", 16, 0,
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    "ifft_inst.butt_ram_wdataq", 16, 0,
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    "dut.ifft_inst.butt_ram_wval", 0, 0,
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    "ifft_inst.wpi", 14, 0,
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    "ifft_inst.wpq", 14, 0,
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    "ifft_inst.wpi_d1", 14, 0,
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    "ifft_inst.wpq_d1", 14, 0,
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    "ifft_inst.xi", 13, 0,
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    "ifft_inst.xq", 13, 0,
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    "ifft_inst.xi_d1", 13, 0,
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    "ifft_inst.xq_d1", 13, 0,
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    "ifft_inst.x1i", 13, 0,
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    "ifft_inst.x1q", 13, 0,
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    "ifft_inst.x2w1pi", 14, 0,
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    "ifft_inst.x2w1pq", 14, 0,
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    "ifft_inst.x3w2pi", 14, 0,
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    "ifft_inst.x3w2pq", 14, 0,
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    "ifft_inst.x4w3pi", 14, 0,
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    "ifft_inst.x4w3pq", 14, 0,
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    "ifft_inst.y1i", 16, 0,
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    "ifft_inst.y1q", 16, 0,
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    "ifft_inst.y2i",16,0,
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    "ifft_inst.y2q",16,0,
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    "ifft_inst.y3i",16,0,
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    "ifft_inst.y3q",16,0,
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    "ifft_inst.y4i",16,0,
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    "ifft_inst.y4q",16,0,
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    "ifft_inst.wp_index",7,0,
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    "ifft_inst.state",2,0,
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    "ifft_inst.fft_addr_cnt",10,0,
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    "ifft_inst.fft_addr_cnt_d1",1,0,
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    "ifft_inst.degree_cnt",2,0,
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    "ifft_inst.op_exp",2,0,
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    "ifft_inst.degree_exp",2,0,
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    "",0,0,
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}
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#endif
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//using namespace std;
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class TextQuery
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{
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public:
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    enum FPGA_Type {Xilinx, Altera};
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    enum EDGE_TYPE {posedge , nededge , other} ;
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    struct module_top
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    {
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        char * port_name;
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        short inout;
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        short width_first;
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        short width_second;
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    };
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    struct sample
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    {
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        char *sample_name ;
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        short width_first ;
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        short width_second ;
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    };
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    struct regchain
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    {
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        char *reg_name;
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        short width_first;
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        short width_second;
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    };
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    struct system_port
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    {
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        char *port_name;
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        char *reg_name ;
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        short width_first;
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        short width_second;
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    };
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    TextQuery(QString topmodule ,QStringList idatafilename , QString directory ,const QList<module_top*>& inouttbl , const QList<sample *>&sampletbl , const QVector<QList<regchain *> >&chaintbl , \
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              const QList<system_port*>& systemporttbl,FPGA_Type type = Altera)
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    {
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        //memset(this, 0, sizeof(TextQuery));
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        inout_table = inouttbl ;
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        sample_table = sampletbl ;
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        regchain_table = chaintbl ;
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        Fpga = type ;
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        module_name = topmodule ;
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        m_idataFileNameList = idatafilename ;
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        m_ioutputDirectory = directory ;
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        systeminout_table = systemporttbl ;
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    }
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    void retrieve_text();
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    void constructDataFile(const QString &filename ,const QStringList &datalist);
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    void doit()
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    {
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        retrieve_text();
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    }
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    void setNoNeedSig(QString clockport, QString resetport ,EDGE_TYPE resetedge,QString resetval) ;
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private:
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    QList<module_top *> inout_table ;
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    QList<sample *> sample_table ;
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    QList<system_port*> systeminout_table ;
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    QVector<QList<regchain *> > regchain_table;
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    QString module_name ;
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    FPGA_Type Fpga;
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    QStringList m_idataFileNameList ;
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    QString m_ioutputDirectory ;
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    QString m_iclockSigName ;
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    QString m_iresetSigName ;
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    EDGE_TYPE m_eresetEdge ;
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    QString m_iresetSigVal ;
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};
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#endif // TEXTQUERY_H

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