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[/] [forwardcom/] [trunk/] [lcd.sv] - Blame information for rev 80

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//////////////////////////////////////////////////////////////////////////////////
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// Engineer: Agner Fog
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//
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// Create Date:    2020-06-22
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// Last modified:  2020-06-29
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// Module Name:    decoder
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// Project Name:   ForwardCom soft core
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// Target Devices: Artix 7
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// Tool Versions:  Vivado v. 2020.1
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// License:        CERN-OHL-W v. 2 or later
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// Description:    Driver for LCD displays
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// Two LCD displays with each 4 lines x 20 characters
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//////////////////////////////////////////////////////////////////////////////////
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`include "defines.vh"
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module lcd
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  #(parameter numrows = 8,               // number of lines of combined displays (2 - 8)
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    parameter numcolumns = 20,           // number of characters per line
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    parameter rows_per_display = 4)      // number of rows per display unit
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 (input       clock,                     // system clock 100 MHz
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  input       reset,                     // reset and clear
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  input [4:0] x,                         // column number (0 = left)
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  input [2:0] y,                         // row number (0 = top)
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  input [7:0] text[0:numcolumns-1],      // text for one line
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  input [4:0] text_length,               // length of text
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  input       start,                     // start writing
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  input       eol,                       // pad with spaces until end of line
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  output reg  lcd_rs,                    // LCD RS pin
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        output reg  [1:0] lcd_e,               // enable pins for two LCD displays
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        output reg  [3:0] lcd_data,            // LCD data, 4 bit bus
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        output reg  ready                      // finished writing. ready for next line
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);
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localparam count_bits = 14;              // number of bits in clock divider counter
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localparam count_max = (2**count_bits)-1;// maximum count
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logic [7:0] rowaddress;                  // command for setting row address
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reg [count_bits-1:0] counter = 0;        // clock divider
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reg [7:0] delay;                         // delay counter
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reg [3:0] state = 0;                     // state machine for initialization
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                                         // 0  -  9: initialization sequence
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                                         // 10 - 11: set x,y position
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                                         // 12 - 13: write characters
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                                         // 15:      finished
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reg [7:0] text_buffer [0:numcolumns-1];  // copy of input text
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reg [4:0] column;                        // text column
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reg [2:0] row;                           // text row
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reg [4:0] text_count;                    // count down characters in text
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reg       eol_save;                      // copy of eol
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/* initialization sequence:
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The display can receive data in 4-bit or 8-bit mode. We are using 4-bit mode,
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sending 4 bits at a time, with only the upper four bits connected.
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First, we send 8'H3x three times to get into 8-bit mode. Then 8'H2x to get
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into 4-bit mode. The remaining numbers are 8-bit pairs:
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8'H28: multi-line mode (the first needs a long delay)
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8'H01: reset (needs long delay)
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8'H0C: display on, no cursor, no blink
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//8'H06 forward direction
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*/
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reg [3:0] initialization_sequence [10] = {3, 3, 3, 2, 2, 8, 0, 1, 0, 12 };
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always_comb begin
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    // command to set row address
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    if (rows_per_display == 4) begin
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        case (row[1:0]) // 4 lines per display
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        0: rowaddress = 8'H80 + column;
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        1: rowaddress = 8'HC0 + column;
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        2: rowaddress = 8'H80 + numcolumns + column;
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        3: rowaddress = 8'HC0 + numcolumns + column;
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        endcase
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    end else begin
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        case (row[0])   // 2 lines per display
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        0: rowaddress = 8'H80 + column;
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        1: rowaddress = 8'HC0 + column;
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        endcase
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    end
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end
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always_ff @(posedge clock) begin
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    lcd_e <= 0;
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    if (reset) begin
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        // reset
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        counter <= 0;
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        delay <= 8'H80;
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        state <= 0;
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    end else if (start && state == 15) begin
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        // write command received
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        text_buffer <= text;
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        column <= x;
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        row <= y;
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        text_count <= text_length;
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        eol_save <= eol;
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        counter <= 0;
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        state <= 10;
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    end else begin
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        counter <= counter + 1; // 2**count_bits / 100MHz = 160 µs
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        if (state < 10) begin
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            // initialization sequence
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            lcd_rs <= 0;
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            if (delay > 0) begin
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                if (counter == count_max) delay <= delay - 1;
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            end else begin
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                lcd_data <= initialization_sequence[state];
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                lcd_e[0] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse for display unit 0
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                lcd_e[1] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse for display unit 1
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                if (counter == count_max) begin
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                    if (state == 9) state <= 15; // finished
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                    else state <= state + 1;     // next state
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                    delay <= 8'H10;
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                end
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            end
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        end else if (state < 12) begin
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            // set (x,y) position
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            lcd_rs <= 0;
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            if (delay > 0) begin
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                if (counter == count_max) delay <= delay - 1;
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            end else begin
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                lcd_data <= ~state[0] ? rowaddress[7:4] : rowaddress[3:0];
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                if (row < rows_per_display)
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                     lcd_e[0] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse
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                else lcd_e[1] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse
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                if (counter == count_max) begin
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                    state <= state + 1;
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                    delay <= 8'H10;
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                end
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            end
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        end else if (state < 15) begin
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            // write characters
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            lcd_rs <= 1;
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            if (delay > 0) begin
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                if (counter == count_max) delay <= delay - 1;
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            end else begin
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                if (text_count > 0) begin
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                    // write character
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                    lcd_data <= ~state[0] ? text_buffer[0][7:4] : text_buffer[0][3:0];
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                    if (row < rows_per_display)
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                         lcd_e[0] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse
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                    else lcd_e[1] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse
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                end else if (eol_save) begin
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                    lcd_data <= ~state[0] ? 2 : 0;                                // write space
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                    if (row < rows_per_display)
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                         lcd_e[0] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse
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                    else lcd_e[1] <= counter[count_bits-1:count_bits-2] == 2'b01; // generate pulse
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                end
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                if (counter == count_max) begin
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                    if (state[0]) begin
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                        column <= column + 1;                                     // count up column index
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                        if (text_count != 0) text_count <= text_count - 1;        // count down number of characters
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                        for (int i = 0; i < numcolumns-1; i++) begin
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                            text_buffer[i] <= text_buffer[i+1];                   // shift down to get next character
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                        end
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                    end
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                    if (state[0] && (column == numcolumns-1 || (text_count == 0 && !eol_save))) begin
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                        state <= 15;                                              // finished
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                    end else begin
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                        state[0] <= ~state[0];
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                    end
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                    // delay <= 8'H01;
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                end
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            end
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        end else begin
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            // state = 15. finished
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            lcd_e <= 0;
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        end
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    end
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    if (state == 15) ready <= 1;
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    else ready <= 0;
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end
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endmodule

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