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[/] [fpga-cf/] [trunk/] [hdl/] [counting_led/] [counting_led.v] - Blame information for rev 2

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// Moving LED module
 
module counting_led
(
        input                           clk,
        input                           rst,
        output  [7:0]    leds
);
 
reg [7:0] count;
 
always @(posedge clk)
begin
        if (rst) count <= 0;
        else count <= count + 1;
end
 
assign leds = count;
 
endmodule

Line No.	Rev	Author	Line
1	2	peteralieb	`// Moving LED module`
2
3			`module counting_led`
4			`(`
5			`input clk,`
6			`input rst,`
7			`output [7:0] leds`
8			`);`
9
10			`reg [7:0] count;`
11
12			`always @(posedge clk)`
13			`begin`
14			`if (rst) count <= 0;`
15			`else count <= count + 1;`
16			`end`
17
18			`assign leds = count;`
19
20			`endmodule`

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[/] [fpga-cf/] [trunk/] [hdl/] [counting_led/] [counting_led.v] - Blame information for rev 2