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joaocarlos |
/* --------------------------------------------------------------------------------
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This file is part of FPGA Median Filter.
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FPGA Median Filter is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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FPGA Median Filter is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FPGA Median Filter. If not, see <http://www.gnu.org/licenses/>.
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-------------------------------------------------------------------------------- */
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/* +----------------------------------------------------------------------------
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Universidade Federal da Bahia
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------------------------------------------------------------------------------
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PROJECT: FPGA Median Filter
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------------------------------------------------------------------------------
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FILE NAME : node.v
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AUTHOR : João Carlos Bittencourt
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AUTHOR'S E-MAIL : joaocarlos@ieee.org
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-----------------------------------------------------------------------------
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RELEASE HISTORY
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VERSION DATE AUTHOR DESCRIPTION
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1.0 2013-08-13 joao.nunes initial version
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-----------------------------------------------------------------------------
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KEYWORDS: comparator, low, hight, median
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-----------------------------------------------------------------------------
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PURPOSE: Compare two input values and return the low and high values.
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----------------------------------------------------------------------------- */
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2 |
joaocarlos |
module node
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#(
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parameter DATA_WIDTH = 8,
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parameter LOW_MUX = 1, // disable low output
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parameter HI_MUX = 1 // disable hight output
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)(
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input [DATA_WIDTH-1:0] data_a,
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input [DATA_WIDTH-1:0] data_b,
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output reg [DATA_WIDTH-1:0] data_hi,
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output reg [DATA_WIDTH-1:0] data_lo
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);
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reg sel0;
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always @(*)
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begin : comparator
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if(data_a < data_b) begin
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sel0 = 1'b0; // data_a : lo / data_b : hi
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end else begin
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sel0 = 1'b1; // data_b : lo / data_a : hi
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end
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end
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always @(*)
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begin : mux_lo_hi
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case (sel0)
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1'b0 :
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begin
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if(LOW_MUX == 1)
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data_lo = data_a;
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if(HI_MUX == 1)
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data_hi = data_b;
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end
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1'b1 :
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begin
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if(LOW_MUX == 1)
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data_lo = data_b;
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if(HI_MUX == 1)
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data_hi = data_a;
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end
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default :
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begin
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data_lo = {DATA_WIDTH{1'b0}};
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data_hi = {DATA_WIDTH{1'b0}};
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end
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endcase
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end
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endmodule
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