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[/] [ft816float/] [trunk/] [posit_test_bench/] [positToFp_tb.sv] - Blame information for rev 70

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Line No. Rev Author Line
1 36 robfinch
`timescale 1ns / 1ps
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module positToFp_tb;
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function [31:0] log2;
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input reg [31:0] value;
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        begin
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        value = value-1;
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        for (log2=0; value>0; log2=log2+1)
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                value = value>>1;
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        end
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endfunction
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parameter N=32;
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parameter E=8;
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parameter Bs=log2(N);
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parameter es = 3;
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reg [N-1:0] in;
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reg clk;
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wire [N-1:0] out;
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// Instantiate the Unit Under Test (UUT)
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positToFp #(.FPWID(N), .PSTWID(N), .es(es)) u1 (
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        .i(in),
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        .o(out)
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);
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        initial begin
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                // Initialize Inputs
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                clk = 1;
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                // Wait 100 ns for global reset to finish
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                #101 in = 65535;
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                #655360
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                $fclose(outfile);
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                $finish;
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        end
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always #5 clk=~clk;
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always @(posedge clk) begin
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        if (in < 32'hffffffff)
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                in <= in + 65535;
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end
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integer outfile;
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initial outfile = $fopen("d:/cores5/Gambit/v5/rtl/cpu/fpu/test_bench/positToFp_tvo32.txt", "wb");
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  always @(negedge clk) begin
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     $fwrite(outfile, "%h\t%h\n",in,out);
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  end
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endmodule
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