OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [BCDSubtract.sv] - Blame information for rev 83

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 80 robfinch
`timescale 1ns / 1ps
2
// ============================================================================
3
//        __
4
//   \\__/ o\    (C) 2022  Robert Finch, Waterloo
5
//    \  __ /    All rights reserved.
6
//     \/_//     robfinch@finitron.ca
7
//       ||
8
//
9
//      BCDSubtract.sv
10
//
11
//
12
// BSD 3-Clause License
13
// Redistribution and use in source and binary forms, with or without
14
// modification, are permitted provided that the following conditions are met:
15
//
16
// 1. Redistributions of source code must retain the above copyright notice, this
17
//    list of conditions and the following disclaimer.
18
//
19
// 2. Redistributions in binary form must reproduce the above copyright notice,
20
//    this list of conditions and the following disclaimer in the documentation
21
//    and/or other materials provided with the distribution.
22
//
23
// 3. Neither the name of the copyright holder nor the names of its
24
//    contributors may be used to endorse or promote products derived from
25
//    this software without specific prior written permission.
26
//
27
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
31
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
35
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37
//
38
// ============================================================================
39
 
40
module BCDSubtract(clk, a, b, o, sgn);
41 78 robfinch
parameter N=25;
42
input clk;
43
input [N*4-1:0] a;
44
input [N*4-1:0] b;
45
output reg [N*4-1:0] o;
46 80 robfinch
output reg sgn;
47 78 robfinch
 
48 83 robfinch
wire [(N)*4-1:0] bc;
49
wire [(N)*4-1:0] o1, o2, o3;
50 78 robfinch
wire c;
51
 
52 83 robfinch
BCDNinesComplementN #(N) u1 (.i({4'h0,b}), .o(bc));
53
BCDAddNClk #(.N(N)) u2 (.clk(clk), .a({8'h00,a}), .b(bc), .o(o1), .ci(1'b0), .co(c));
54 78 robfinch
BCDNinesComplementN #(N) u3 (.i(o1), .o(o2));
55 83 robfinch
BCDAddNClk #(.N(N)) u4 (.clk(clk), .a(o1), .b('d0), .o(o3), .ci(c), .co());
56 78 robfinch
 
57
always_ff @(posedge clk)
58
        if (c)
59
                o <= o3;
60
        else
61
                o <= o2;
62
always_ff @(posedge clk)
63 83 robfinch
        sgn <= |o ? ~c : 1'b0;
64 78 robfinch
 
65
endmodule
66
 
67
module BCDNinesComplement(i, o);
68
input [3:0] i;
69
output reg [3:0] o;
70
 
71
always_comb
72
        case(i)
73
        4'd0:   o = 4'd9;
74
        4'd1:   o = 4'd8;
75
        4'd2:   o = 4'd7;
76
        4'd3:   o = 4'd6;
77
        4'd4: o = 4'd5;
78
        4'd5:   o = 4'd4;
79
        4'd6:   o = 4'd3;
80
        4'd7:   o = 4'd2;
81
        4'd8:   o = 4'd1;
82
        4'd9:   o = 4'd0;
83
        4'd10:  o = 4'd9;
84
        4'd11:  o = 4'd8;
85
        4'd12:  o = 4'd7;
86
        4'd13:  o = 4'd6;
87
        4'd14:  o = 4'd5;
88
        4'd15:  o = 4'd4;
89
        endcase
90
 
91
endmodule
92
 
93
module BCDNinesComplementN(i, o);
94
parameter N=25;
95
input [N*4-1:0] i;
96
output [N*4-1:0] o;
97
 
98
genvar g;
99
generate begin : gNC
100
        for (g = 0; g < N; g = g + 1)
101
                BCDNinesComplement utc1 (i[g*4+3:g*4],o[g*4+3:g*4]);
102
end
103
endgenerate
104
 
105
endmodule
106
 
107
module BCDTensComplement(i, o);
108
input [3:0] i;
109
output reg [3:0] o;
110
 
111
always_comb
112
        case(i)
113
        4'd0:   o = 4'd0;
114
        4'd1:   o = 4'd9;
115
        4'd2:   o = 4'd8;
116
        4'd3:   o = 4'd7;
117
        4'd4: o = 4'd6;
118
        4'd5:   o = 4'd5;
119
        4'd6:   o = 4'd4;
120
        4'd7:   o = 4'd3;
121
        4'd8:   o = 4'd2;
122
        4'd9:   o = 4'd1;
123
        4'd10:  o = 4'd0;
124
        4'd11:  o = 4'd9;
125
        4'd12:  o = 4'd8;
126
        4'd13:  o = 4'd7;
127
        4'd14:  o = 4'd6;
128
        4'd15:  o = 4'd5;
129
        endcase
130
 
131
endmodule
132
 
133
module BCDTensComplementN(i, o);
134
parameter N=25;
135
input [N*4-1:0] i;
136
output [N*4-1:0] o;
137
 
138
genvar g;
139
generate begin : gTC
140
        for (g = 0; g < N; g = g + 1)
141
                BCDTensComplement utc1 (i[g*4+3:g*4],o[g*4+3:g*4]);
142
end
143
endgenerate
144
 
145
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.