OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DPD1000Encode.sv] - Blame information for rev 60

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 56 robfinch
// ============================================================================
2
//        __
3
//   \\__/ o\    (C) 2020  Robert Finch, Waterloo
4
//    \  __ /    All rights reserved.
5
//     \/_//     robfinch@finitron.ca
6
//       ||
7
//
8
//      DPD1000Encode.sv
9
//
10
// BSD 3-Clause License
11
// Redistribution and use in source and binary forms, with or without
12
// modification, are permitted provided that the following conditions are met:
13
//
14
// 1. Redistributions of source code must retain the above copyright notice, this
15
//    list of conditions and the following disclaimer.
16
//
17
// 2. Redistributions in binary form must reproduce the above copyright notice,
18
//    this list of conditions and the following disclaimer in the documentation
19
//    and/or other materials provided with the distribution.
20
//
21
// 3. Neither the name of the copyright holder nor the names of its
22
//    contributors may be used to endorse or promote products derived from
23
//    this software without specific prior written permission.
24
//
25
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35
//
36
// ============================================================================
37 55 robfinch
 
38
module DPD1000Encode(i, o);
39
input [11:0] i;
40
output [9:0] o;
41
 
42
assign o = i[3:0] + i[7:4] * 10 + i[11:8] * 100;
43
 
44
endmodule
45
 
46
module DPD1000EncodeN(i, o);
47
parameter N=11;
48
input [N*12-1:0] i;
49
output [N*10-1:0] o;
50
 
51
genvar g;
52
generate begin : gDPDEncodeN
53
        for (g = 0; g < N; g = g + 1)
54
                DPD1000Encode u1 (i[g*12+11:g*12],o[g*10+9:g*10]);
55
end
56
endgenerate
57
 
58
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.