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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DPDDecode.sv] - Blame information for rev 61

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1 57 robfinch
// ============================================================================
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//        __
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//   \\__/ o\    (C) 2020  Robert Finch, Waterloo
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch@finitron.ca
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//       ||
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//
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//      DPDDecode.sv
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//
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// An encoding described in:
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//      Densely Packed Decimal Encoding, by Mike Cowlishaw, in
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//      IEE Proceedings – Computers and Digital Techniques, ISSN 1350-2387,
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//      Vol. 149, No. 3, pp102–104, IEE, May 2002
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//
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// See: http://speleotrove.com/decimal/DPDecimal.html
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//
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// BSD 3-Clause License
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice, this
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//    list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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//    this list of conditions and the following disclaimer in the documentation
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//    and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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//    contributors may be used to endorse or promote products derived from
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//    this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// ============================================================================
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module DPDDecode(i, o);
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input [9:0] i;
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output [11:0] o;
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wire a,b,c,d,e,f,g,h,ii,j,k,m;
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wire y,x,w,v,u,t,s,r,q,p;
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assign {p,q,r,s,t,u,v,w,x,y} = i;
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assign a = (v & w) & (~s | t | ~x);
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assign b = p & (~v | ~w | (s & ~t & x));
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assign c = q & (~v | ~w | (s & ~t & x));
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assign d = r;
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assign e = v & ((~w & x) | (~t & x) | (s & x));
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assign f = (s & (~v | ~x)) | (p & ~s & t & v & w & x);
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assign g = (t & (~v | ~x)) | (q & ~s & t & w);
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assign h = u;
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assign ii = v & ((~w & ~x) | (w & x & (s | t)));
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assign j = (~v & w) | (s & v & ~w & x) | (p & w & (~x | (~s & ~t)));
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assign k = (~v & x) | (t & ~w & x) | (q & v & w & (~x | (~s & ~t)));
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assign m = y;
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assign o = {a,b,c,d,e,f,g,h,ii,j,k,m};
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endmodule
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module DPDDecodeN(i, o);
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parameter N=11;
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input [N*10-1:0] i;
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output [N*12-1:0] o;
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genvar g;
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generate begin : gDPD
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        for (g = 0; g < N; g = g + 1)
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                DPDDecode u1 (i[g*10+9:g*10], o[g*12+11:g*12]);
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end
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endgenerate
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endmodule

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