OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DPDEncode.sv] - Blame information for rev 77

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 57 robfinch
// ============================================================================
2
//        __
3
//   \\__/ o\    (C) 2020  Robert Finch, Waterloo
4
//    \  __ /    All rights reserved.
5
//     \/_//     robfinch@finitron.ca
6
//       ||
7
//
8
//      DPDEncode.sv
9
//
10
// An encoding described in:
11
//      Densely Packed Decimal Encoding, by Mike Cowlishaw, in
12
//      IEE Proceedings – Computers and Digital Techniques, ISSN 1350-2387,
13
//      Vol. 149, No. 3, pp102–104, IEE, May 2002
14
//
15
// See: http://speleotrove.com/decimal/DPDecimal.html
16
//
17
// BSD 3-Clause License
18
// Redistribution and use in source and binary forms, with or without
19
// modification, are permitted provided that the following conditions are met:
20
//
21
// 1. Redistributions of source code must retain the above copyright notice, this
22
//    list of conditions and the following disclaimer.
23
//
24
// 2. Redistributions in binary form must reproduce the above copyright notice,
25
//    this list of conditions and the following disclaimer in the documentation
26
//    and/or other materials provided with the distribution.
27
//
28
// 3. Neither the name of the copyright holder nor the names of its
29
//    contributors may be used to endorse or promote products derived from
30
//    this software without specific prior written permission.
31
//
32
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42
//
43
// ============================================================================
44
 
45
module DPDEncode(i, o);
46
input [11:0] i;
47
output [9:0] o;
48
 
49
wire a,b,c,d,e,f,g,h,ii,j,k,m;
50
wire p,q,r,s,t,u,v,w,x,y;
51
 
52
assign {a,b,c,d,e,f,g,h,ii,j,k,m} = i;
53
 
54
assign p = b | (a & j) | (a & f & ii);
55
assign q = c | (a & k) | (a & g & ii);
56
assign r = d;
57
assign s = (f & (~a | ~ii)) | (~a & e & j) | (e & ii);
58
assign t = g  | (~a & e &k) | (a & ii);
59
assign u = h;
60
assign v = a | e | ii;
61
assign w = a | (e & ii) | (~e & j);
62
assign x = e | (a & ii) | (~a & k);
63
assign y = m;
64
 
65
assign o = {p,q,r,s,t,u,v,w,x,y};
66
 
67
endmodule
68
 
69
module DPDEncodeN(i, o);
70
parameter N=11;
71
input [N*12-1:0] i;
72
output [N*10-1:0] o;
73
 
74
genvar g;
75
generate begin : gDPDEncodeN
76
        for (g = 0; g < N; g = g + 1)
77
                DPDEncode u1 (i[g*12+11:g*12],o[g*10+9:g*10]);
78
end
79
endgenerate
80
 
81
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.