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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [README.md] - Blame information for rev 48

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# Verilog2
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This directory is a newer version of the cores with the 'WID' parameter renamed to 'FPWID' to avoid conflicts with other modules.
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"EXTRA_BITS" was removed.
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There are two versions of the cores one in verilog the other in SystemVerilog. They can be distinguished by the filename extension. Include one or the other in a project as they are using the same module names. However, the verilog versions are not likely to be updated in the future.
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The SystemVerilog versions of the cores import the fp package rather than using fpConfig and fpSize. It is a little cleaner.
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