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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [fd2s.v] - Blame information for rev 70

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1 29 robfinch
// ============================================================================
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//        __
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//   \\__/ o\    (C) 2006-2017  Robert Finch, Waterloo
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch<remove>@finitron.ca
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//       ||
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//
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//      fd2s.v
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//    - convert floating point double to single
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//
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//
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// This source file is free software: you can redistribute it and/or modify 
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// it under the terms of the GNU Lesser General Public License as published 
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// by the Free Software Foundation, either version 3 of the License, or     
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// (at your option) any later version.                                      
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//                                                                          
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// This source file is distributed in the hope that it will be useful,      
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// but WITHOUT ANY WARRANTY; without even the implied warranty of           
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
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// GNU General Public License for more details.                             
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//                                                                          
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// You should have received a copy of the GNU General Public License        
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
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//                                                                          
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// ============================================================================
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`include "fpConfig.sv"
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module fd2s(a, o);
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input [63:0] a;
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output reg [31:0] o;
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wire signi;
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wire [10:0] expi;
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wire [51:0] mani;
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wire xinf;
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wire xz;
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wire vz;
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fpDecomp #(64) u1 (.i(a), .sgn(signi), .exp(expi), .man(mani), .xinf(xinf), .xz(xz), .vz(vz) );
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wire [11:0] exp = expi - 11'h896;   // 1023-127 (difference of the bias)
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always @*
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begin
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o[31] <= signi;         // sign out = sign in, easy
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o[22:0] <= a[51:29];
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if (xinf)
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    o[30:23] <= 8'hFF;
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else if (vz)
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    o[30:23] <= 8'h00;
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else if (xz)
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    o[30:23] <= 8'h00;
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else begin
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    if (exp[11]) begin  // exponent is too low - set number to zero
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        o[30:23] <= 8'h00;
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        o[22:0] <= 23'h000000;
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    end
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    else if (|exp[10:8]) begin  // exponent is too high - set number to infinity
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        o[30:23] <= 8'hFF;
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        o[22:0] <= 23'h000000;
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    end
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    else    // exponent in range
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        o[30:23] <= exp[7:0];
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end
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end
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endmodule

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