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         robfinch | 
         `timescale 1ns / 1ps
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         // ============================================================================
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         //        __
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         //   \\__/ o\    (C) 2023  Robert Finch, Waterloo
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         //    \  __ /    All rights reserved.
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         //     \/_//     robfinch@finitron.ca
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         //       ||
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         //
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         //      fpCvt16To128.sv
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         //    - decimal floating convert half to quad
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         //
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         //
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         // BSD 3-Clause License
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         // Redistribution and use in source and binary forms, with or without
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         // modification, are permitted provided that the following conditions are met:
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         //
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         // 1. Redistributions of source code must retain the above copyright notice, this
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         //    list of conditions and the following disclaimer.
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         //
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         // 2. Redistributions in binary form must reproduce the above copyright notice,
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         //    this list of conditions and the following disclaimer in the documentation
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         //    and/or other materials provided with the distribution.
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         //
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         // 3. Neither the name of the copyright holder nor the names of its
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         //    contributors may be used to endorse or promote products derived from
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         //    this software without specific prior written permission.
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         //
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         // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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         // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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         // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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         // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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         // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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         // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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         // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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         // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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         // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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         // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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         //
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         // ============================================================================
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         import fp16Pkg::*;
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         import fp128Pkg::*;
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         module fpCvt16To128(i, o);
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         input FP16 i;
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         output FP128 o;
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         wire [15:0] bias128 = 15'h3FFF;
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         wire [ 4:0] bias16 = 5'h0F;
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         always_comb
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                 o.sign = i.sign;
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         always_comb
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                 if (i.exp==5'h1F)       // Keep infinity / nan status
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                         o.exp = 15'h7FFF;
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                 else
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                         o.exp = bias128 - bias16 + i.exp;
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         always_comb
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                 o.sig = {i.sig,102'd0};
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         endmodule
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