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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [fpNextAfter.sv] - Blame information for rev 37

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1 29 robfinch
// ============================================================================
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//        __
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//   \\__/ o\    (C) 2019  Robert Finch, Waterloo
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch@finitron.ca
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//       ||
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//
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//      fpNextAfter.v
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//              - floating point nextafter()
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//              - return next representable value
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//
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program.  If not, see .
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//
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// ============================================================================
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`include "fpConfig.sv"
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module fpNextAfter(clk, ce, a, b, o);
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parameter FPWID=80;
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`include "fpSize.sv"
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input clk;
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input ce;
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input [MSB:0] a;
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input [MSB:0] b;
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output reg [MSB:0] o;
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wire [4:0] cmp_o;
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wire nana, nanb;
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wire xza, mza;
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fpCompare #(FPWID) u1 (.a(a), .b(b), .o(cmp_o), .nanx(nanxab) );
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fpDecomp #(FPWID) u2 (.i(a), .sgn(), .exp(), .man(), .fract(), .xz(xza), .mz(mza), .vz(), .inf(), .xinf(), .qnan(), .snan(), .nan(nana));
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fpDecomp #(FPWID) u3 (.i(b), .sgn(), .exp(), .man(), .fract(), .xz(), .mz(), .vz(), .inf(), .xinf(), .qnan(), .snan(), .nan(nanb));
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wire [MSB:0] ap1 = a + {2'd1,{`EXTRA_BITS{1'b0}}};
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wire [MSB:0] am1 = a - {2'd1,{`EXTRA_BITS{1'b0}}};
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wire [EMSB:0] infXp = {EMSB+1{1'b1}};
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always  @(posedge clk)
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if (ce)
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        casez({a[MSB],cmp_o})
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        6'b?1????:      o <= nana ? a : b;      // Unordered
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        6'b????1?:      o <= a;                                                 // a,b Equal
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        6'b0????1:
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                if (ap1[MSB-1:FMSB+1]==infXp)
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                        o <= {a[MSB:FMSB+1],{FMSB+1{1'b0}}};
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                else
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                        o <= ap1;
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        6'b0????0:
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                if (xza && mza)
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                        ;
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                else
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                        o <= am1;
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        6'b1????0:
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                if (ap1[MSB-1:FMSB+1]==infXp)
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                        o <= {a[MSB:FMSB+1],{FMSB+1{1'b0}}};
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                else
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                        o <= ap1;
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        6'b1????1:
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                if (xza && mza)
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                        ;
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                else
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                        o <= am1;
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        default:        o <= a;
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        endcase
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endmodule

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