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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [fpSize.sv] - Blame information for rev 84

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Line No. Rev Author Line
1 29 robfinch
`ifndef EXTRA_BITS
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`define EXTRA_BITS      0
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`endif
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// This file contains defintions for fields to ease dealing with different fp
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// FPWIDths. Some of the code still needs to be modified to support FPWIDths
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// other than standard 32,64 or 80 bit.
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localparam MSB = FPWID-1+`EXTRA_BITS;
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localparam EMSB = FPWID==128 ? 14 :
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          FPWID==96 ? 14 :
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          FPWID==80 ? 14 :
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          FPWID==64 ? 10 :
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                                  FPWID==52 ? 10 :
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                                  FPWID==48 ? 10 :
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                                  FPWID==44 ? 10 :
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                                  FPWID==42 ? 10 :
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                                  FPWID==40 ?  9 :
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                                  FPWID==32 ?  7 :
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                                  FPWID==24 ?  6 : 4;
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localparam FMSB = FPWID==128 ? (111 + `EXTRA_BITS) :
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          FPWID==96 ? (79 + `EXTRA_BITS) :
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          FPWID==80 ? (63 + `EXTRA_BITS) :
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          FPWID==64 ? (51 + `EXTRA_BITS) :
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                                  FPWID==52 ? (39 + `EXTRA_BITS) :
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                                  FPWID==48 ? (35 + `EXTRA_BITS) :
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                                  FPWID==44 ? (31 + `EXTRA_BITS) :
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                                  FPWID==42 ? (29 + `EXTRA_BITS) :
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                                  FPWID==40 ? (28 + `EXTRA_BITS) :
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                                  FPWID==32 ? (22 + `EXTRA_BITS) :
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                                  FPWID==24 ? (15 + `EXTRA_BITS) : (9 + `EXTRA_BITS);
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localparam FX = (FMSB+2)*2;     // the MSB of the expanded fraction
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localparam EX = FX + 1 + EMSB + 1 + 1 - 1;

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