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muhammedko |
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-- Company:
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-- Engineer: MUHAMMED KOCAOGLU
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--
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-- Create Date: 01/13/2022 11:37:53 PM
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-- Design Name:
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-- Module Name: tb_EdgeDetection - Behavioral
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-- Project Name:
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-- Target Devices:
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-- Tool Versions:
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-- Description:
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--
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-- Dependencies:
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--
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-- Revision:
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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----------------------------------------------------------------------------------
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE std.textio.ALL;
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USE IEEE.STD_LOGIC_TEXTIO.ALL;
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USE work.OperatorOverloading_pkg.ALL;
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USE work.EdgeDetection_pkg.ALL;
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ENTITY tb_EdgeDetection IS
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GENERIC (
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EdgeDetection_Type : STRING := "0"; -- "0"->Sobel filter -- "1"->Prewitt filter -- "2"->Scharr filter -- "3"->Roberts filter
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EdgeDetection_Kernel : INTEGER := DetermineKernel(EdgeDetection_Type)
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);
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END tb_EdgeDetection;
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ARCHITECTURE Behavioral OF tb_EdgeDetection IS
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PROCEDURE FILTERDATA (
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FILE RawImageHex_file : text;
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FILE FilteredImageHex_file : text;
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SIGNAL CLK : IN STD_LOGIC;
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SIGNAL EdgeDetection_Ready : IN STD_LOGIC;
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SIGNAL EdgeDetection_Disable : OUT STD_LOGIC;
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SIGNAL EdgeDetection_Enable : OUT STD_LOGIC;
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SIGNAL EdgeDetection_Din : OUT array2D(0 TO EdgeDetection_Kernel)(7 DOWNTO 0);
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SIGNAL EdgeDetection_Dout : IN STD_LOGIC_VECTOR(31 DOWNTO 0)
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) IS
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VARIABLE RawImageHex_current_line : line;
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VARIABLE RawImageHex_current_field : STD_LOGIC_VECTOR(3 * 8 - 1 DOWNTO 0) := (OTHERS => '0');
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VARIABLE FilteredImageHex_current_line : line;
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VARIABLE FilteredImageHex_current_field : STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0');
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BEGIN
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WAIT UNTIL falling_edge(CLK);
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WHILE NOT endfile(RawImageHex_file) LOOP
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readline(RawImageHex_file, RawImageHex_current_line);
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hread(RawImageHex_current_line, RawImageHex_current_field);
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EdgeDetection_Enable <= '1';
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FOR i IN 0 TO EdgeDetection_Kernel LOOP
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EdgeDetection_Din(i) <= RawImageHex_current_field((EdgeDetection_Kernel + 1 - i) * 8 - 1 DOWNTO (EdgeDetection_Kernel - i) * 8);
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END LOOP;
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IF EdgeDetection_Ready = '1' THEN
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hwrite(FilteredImageHex_current_line, EdgeDetection_Dout);
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writeline(FilteredImageHex_file, FilteredImageHex_current_line);
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END IF;
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WAIT UNTIL falling_edge(CLK);
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END LOOP;
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EdgeDetection_Disable <= '1';
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EdgeDetection_Enable <= '0';
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WHILE EdgeDetection_Ready = '1' LOOP
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hwrite(FilteredImageHex_current_line, EdgeDetection_Dout);
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writeline(FilteredImageHex_file, FilteredImageHex_current_line);
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WAIT UNTIL falling_edge(CLK);
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END LOOP;
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END PROCEDURE;
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COMPONENT EdgeDetection IS
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GENERIC (
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EdgeDetection_Type : STRING := "0";
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EdgeDetection_Kernel : INTEGER := DetermineKernel(EdgeDetection_Type)
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);
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PORT (
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CLK : IN STD_LOGIC;
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EdgeDetection_Enable : IN STD_LOGIC;
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EdgeDetection_Disable : IN STD_LOGIC;
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EdgeDetection_Din : IN array2D(0 TO EdgeDetection_Kernel)(7 DOWNTO 0);
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EdgeDetection_Dout : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
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EdgeDetection_Ready : OUT STD_LOGIC
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);
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END COMPONENT;
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SIGNAL CLK : STD_LOGIC := '1';
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SIGNAL EdgeDetection_Enable : STD_LOGIC := '0';
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SIGNAL EdgeDetection_Disable : STD_LOGIC := '0';
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SIGNAL EdgeDetection_Din : array2D(0 TO EdgeDetection_Kernel)(7 DOWNTO 0);
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SIGNAL EdgeDetection_Dout : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL EdgeDetection_Ready : STD_LOGIC;
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BEGIN
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CLK <= NOT CLK AFTER 5 ns;
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dut : PROCESS
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FILE RawImageHex_file : text OPEN read_mode IS "C:\Users\Muhammed\OneDrive\FPGA_Projects\VivadoProjects\EdgeDetection_v2\EdgeDetection_v2.srcs\sim_1\new\venice_raw_vect_hex.txt";
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FILE FilteredImageHex_file : text OPEN write_mode IS "C:\Users\Muhammed\OneDrive\FPGA_Projects\VivadoProjects\EdgeDetection_v2\EdgeDetection_v2.srcs\sim_1\new\venice_filtered_vect_hex.txt";
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BEGIN
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WAIT FOR 50 ns;
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WAIT UNTIL falling_edge(CLK);
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FILTERDATA(
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RawImageHex_file,
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FilteredImageHex_file,
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CLK,
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EdgeDetection_Ready,
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EdgeDetection_Disable,
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EdgeDetection_Enable,
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EdgeDetection_Din,
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EdgeDetection_Dout
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);
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file_close(RawImageHex_file);
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file_close(FilteredImageHex_file);
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WAIT FOR 100 ns;
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std.env.stop;
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END PROCESS;
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EdgeDetection_Inst : EdgeDetection
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GENERIC MAP(
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EdgeDetection_Type => EdgeDetection_Type,
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EdgeDetection_Kernel => EdgeDetection_Kernel
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)
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PORT MAP(
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CLK => CLK,
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EdgeDetection_Enable => EdgeDetection_Enable,
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EdgeDetection_Disable => EdgeDetection_Disable,
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EdgeDetection_Din => EdgeDetection_Din,
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EdgeDetection_Dout => EdgeDetection_Dout,
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EdgeDetection_Ready => EdgeDetection_Ready
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);
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END Behavioral;
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