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[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.communication/] [hibi/] [2.0/] [vhd/] [Hibi_segment.vhd] - Blame information for rev 148

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1 145 lanttu 
-------------------------------------------------------------------------------
2 
-- Funbase IP library Copyright (C) 2011 TUT Department of Computer Systems
3 
--
4 
-- This source file may be used and distributed without
5 
-- restriction provided that this copyright statement is not
6 
-- removed from the file and that any derivative work contains
7 
-- the original copyright notice and the associated disclaimer.
8 
--
9 
-- This source file is free software; you can redistribute it
10 
-- and/or modify it under the terms of the GNU Lesser General
11 
-- Public License as published by the Free Software Foundation;
12 
-- either version 2.1 of the License, or (at your option) any
13 
-- later version.
14 
--
15 
-- This source is distributed in the hope that it will be
16 
-- useful, but WITHOUT ANY WARRANTY; without even the implied
17 
-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
18 
-- PURPOSE.  See the GNU Lesser General Public License for more
19 
-- details.
20 
--
21 
-- You should have received a copy of the GNU Lesser General
22 
-- Public License along with this source; if not, download it
23 
-- from http://www.opencores.org/lgpl.shtml
24 
-------------------------------------------------------------------------------
25 
-------------------------------------------------------------------------------
26 
-- file        : eight_hibi_r4_and_radio.vhdl
27 
-- description : hibi bus for connecting eight nioses, this time
28 
--               using hibi_wrapper_r4 (only one fifo interface)
29 
-- author      : ari kulmala
30 
-- date        : 24.6.2004
31 
-- modified    :
32 
-- 16.09.2004  ak number of agents-generic
33 
-- 28.09.2004  ak msg_fifo_depths-table (2x.9.), max_send_c
34 
-- 05.01.2004  ak naming according to the new scheme
35 
-- 03.02.2006  tar doubled the number of possible r4 interfaces
36 
-- 29.09.2008  tko added interfaces for 5 new r1/r3 wrappers, uses some arrays
37 
-------------------------------------------------------------------------------
38 
library ieee;
39 
use ieee.std_logic_1164.all;
40 
use ieee.std_logic_arith.all;
41 
use ieee.std_logic_unsigned.all;
42 
--use work.hibiv2_pkg.all;                -- hibi v2 commands
43 
 
44 
entity hibi_segment_small is
45 
  generic (
46 
    data_width_g           : integer := 32;
47 
    counter_width_g        : integer := 16;
48 
    addr_width_g           : integer := 32;
49 
    comm_width_g           : integer := 3;
50 
    id_width_g             : integer := 5;
51 
    number_of_r4_agents_g  : integer := 16;   -- 1-16
52 
    number_of_r3_agents_g  : integer := 1;   -- 0-1
53 
    -- priorities
54 
    agent_priority_1_g : INTEGER := 1;
55 
    agent_priority_2_g : INTEGER := 2;
56 
    agent_priority_3_g : INTEGER := 3;
57 
    agent_priority_4_g : INTEGER := 4;
58 
    agent_priority_5_g : INTEGER := 5;
59 
    agent_priority_6_g : INTEGER := 6;
60 
    agent_priority_7_g : INTEGER := 7;
61 
    agent_priority_8_g : INTEGER := 8;
62 
    agent_priority_9_g : INTEGER := 9;
63 
    agent_priority_10_g : INTEGER := 10;
64 
    agent_priority_11_g : INTEGER := 11;
65 
    agent_priority_12_g : INTEGER := 12;
66 
    agent_priority_13_g : INTEGER := 13;
67 
    agent_priority_14_g : INTEGER := 14;
68 
    agent_priority_15_g : INTEGER := 15;
69 
    agent_priority_16_g : INTEGER := 16;
70 
    agent_priority_17_g : INTEGER := 17; -- not in use
71 
    -- base ids (not used)
72 
    agent_base_id_1_g : INTEGER := 0;
73 
    agent_base_id_2_g : INTEGER := 0;
74 
    agent_base_id_3_g : INTEGER := 0;
75 
    agent_base_id_4_g : INTEGER := 0;
76 
    agent_base_id_5_g : INTEGER := 0;
77 
    agent_base_id_6_g : INTEGER := 0;
78 
    agent_base_id_7_g : INTEGER := 0;
79 
    agent_base_id_8_g : INTEGER := 0;
80 
    agent_base_id_9_g : INTEGER := 0;
81 
    agent_base_id_10_g : INTEGER := 0;
82 
    agent_base_id_11_g : INTEGER := 0;
83 
    agent_base_id_12_g : INTEGER := 0;
84 
    agent_base_id_13_g : INTEGER := 0;
85 
    agent_base_id_14_g : INTEGER := 0;
86 
    agent_base_id_15_g : INTEGER := 0;
87 
    agent_base_id_16_g : INTEGER := 0;
88 
    agent_base_id_17_g : INTEGER := 0;
89 
    -- max sends
90 
    agent_max_send_1_g : INTEGER := 200;
91 
    agent_max_send_2_g : INTEGER := 200;
92 
    agent_max_send_3_g : INTEGER := 200;
93 
    agent_max_send_4_g : INTEGER := 200;
94 
    agent_max_send_5_g : INTEGER := 200;
95 
    agent_max_send_6_g : INTEGER := 200;
96 
    agent_max_send_7_g : INTEGER := 200;
97 
    agent_max_send_8_g : INTEGER := 200;
98 
    agent_max_send_9_g : INTEGER := 200;
99 
    agent_max_send_10_g : INTEGER := 200;
100 
    agent_max_send_11_g : INTEGER := 200;
101 
    agent_max_send_12_g : INTEGER := 200;
102 
    agent_max_send_13_g : INTEGER := 200;
103 
    agent_max_send_14_g : INTEGER := 200;
104 
    agent_max_send_15_g : INTEGER := 200;
105 
    agent_max_send_16_g : INTEGER := 200;
106 
    agent_max_send_17_g : INTEGER := 200
107 
  );
108 
 
109 
  port (
110 
    clk   : in std_logic;
111 
    rst_n : in std_logic;
112 
    -- Debug signals for bus monitoring purposes
113 
    debug_bus_full_out : OUT STD_LOGIC;
114 
    debug_bus_comm_out : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
115 
    debug_bus_av_out   : OUT STD_LOGIC;
116 
 
117 
    -- nios_1 ports --
118 
    agent_comm_in_1   : in  std_logic_vector (comm_width_g-1 downto 0);
119 
    agent_data_in_1   : in  std_logic_vector(data_width_g-1 downto 0);
120 
    agent_av_in_1     : in  std_logic;
121 
    agent_we_in_1     : in  std_logic;
122 
    agent_re_in_1     : in  std_logic;
123 
    agent_comm_out_1  : out std_logic_vector (comm_width_g-1 downto 0);
124 
    agent_data_out_1  : out std_logic_vector(data_width_g-1 downto 0);
125 
    agent_av_out_1    : out std_logic;
126 
    agent_full_out_1  : out std_logic;
127 
    agent_one_p_out_1 : out std_logic;
128 
    agent_empty_out_1 : out std_logic;
129 
    agent_one_d_out_1 : out std_logic;
130 
 
131 
    -- nios_2 ports --
132 
 
133 
    agent_comm_in_2   : in  std_logic_vector (comm_width_g-1 downto 0);  --13.03.03 command_type;
134 
    agent_data_in_2   : in  std_logic_vector(data_width_g-1 downto 0);
135 
    agent_av_in_2     : in  std_logic;
136 
    agent_we_in_2     : in  std_logic;
137 
    agent_re_in_2     : in  std_logic;
138 
    agent_comm_out_2  : out std_logic_vector (comm_width_g-1 downto 0);  --13.03.03 command_type;
139 
    agent_data_out_2  : out std_logic_vector(data_width_g-1 downto 0);
140 
    agent_av_out_2    : out std_logic;
141 
    agent_full_out_2  : out std_logic;
142 
    agent_one_p_out_2 : out std_logic;
143 
    agent_empty_out_2 : out std_logic;
144 
    agent_one_d_out_2 : out std_logic;
145 
 
146 
    -- nios_3 ports --
147 
    agent_comm_in_3   : in  std_logic_vector (comm_width_g-1 downto 0);
148 
    agent_data_in_3   : in  std_logic_vector(data_width_g-1 downto 0);
149 
    agent_av_in_3     : in  std_logic;
150 
    agent_we_in_3     : in  std_logic;
151 
    agent_re_in_3     : in  std_logic;
152 
    agent_comm_out_3  : out std_logic_vector (comm_width_g-1 downto 0);
153 
    agent_data_out_3  : out std_logic_vector(data_width_g-1 downto 0);
154 
    agent_av_out_3    : out std_logic;
155 
    agent_full_out_3  : out std_logic;
156 
    agent_one_p_out_3 : out std_logic;
157 
    agent_empty_out_3 : out std_logic;
158 
    agent_one_d_out_3 : out std_logic;
159 
 
160 
    -- nios_4 ports --
161 
    agent_comm_in_4   : in  std_logic_vector (comm_width_g-1 downto 0);
162 
    agent_data_in_4   : in  std_logic_vector(data_width_g-1 downto 0);
163 
    agent_av_in_4     : in  std_logic;
164 
    agent_we_in_4     : in  std_logic;
165 
    agent_re_in_4     : in  std_logic;
166 
    agent_comm_out_4  : out std_logic_vector (comm_width_g-1 downto 0);
167 
    agent_data_out_4  : out std_logic_vector(data_width_g-1 downto 0);
168 
    agent_av_out_4    : out std_logic;
169 
    agent_full_out_4  : out std_logic;
170 
    agent_one_p_out_4 : out std_logic;
171 
    agent_empty_out_4 : out std_logic;
172 
    agent_one_d_out_4 : out std_logic;
173 
 
174 
    -- nios_5 ports --
175 
    agent_comm_in_5   : in  std_logic_vector (comm_width_g-1 downto 0);
176 
    agent_data_in_5   : in  std_logic_vector(data_width_g-1 downto 0);
177 
    agent_av_in_5     : in  std_logic;
178 
    agent_we_in_5     : in  std_logic;
179 
    agent_re_in_5     : in  std_logic;
180 
    agent_comm_out_5  : out std_logic_vector (comm_width_g-1 downto 0);
181 
    agent_data_out_5  : out std_logic_vector(data_width_g-1 downto 0);
182 
    agent_av_out_5    : out std_logic;
183 
    agent_full_out_5  : out std_logic;
184 
    agent_one_p_out_5 : out std_logic;
185 
    agent_empty_out_5 : out std_logic;
186 
    agent_one_d_out_5 : out std_logic;
187 
 
188 
    -- nios_6 ports --
189 
    agent_comm_in_6   : in  std_logic_vector (comm_width_g-1 downto 0);
190 
    agent_data_in_6   : in  std_logic_vector(data_width_g-1 downto 0);
191 
    agent_av_in_6     : in  std_logic;
192 
    agent_we_in_6     : in  std_logic;
193 
    agent_re_in_6     : in  std_logic;
194 
    agent_comm_out_6  : out std_logic_vector (comm_width_g-1 downto 0);
195 
    agent_data_out_6  : out std_logic_vector(data_width_g-1 downto 0);
196 
    agent_av_out_6    : out std_logic;
197 
    agent_full_out_6  : out std_logic;
198 
    agent_one_p_out_6 : out std_logic;
199 
    agent_empty_out_6 : out std_logic;
200 
    agent_one_d_out_6 : out std_logic;
201 
 
202 
    -- nios_7 ports --
203 
    agent_comm_in_7   : in  std_logic_vector (comm_width_g-1 downto 0);
204 
    agent_data_in_7   : in  std_logic_vector(data_width_g-1 downto 0);
205 
    agent_av_in_7     : in  std_logic;
206 
    agent_we_in_7     : in  std_logic;
207 
    agent_re_in_7     : in  std_logic;
208 
    agent_comm_out_7  : out std_logic_vector (comm_width_g-1 downto 0);
209 
    agent_data_out_7  : out std_logic_vector(data_width_g-1 downto 0);
210 
    agent_av_out_7    : out std_logic;
211 
    agent_full_out_7  : out std_logic;
212 
    agent_one_p_out_7 : out std_logic;
213 
    agent_empty_out_7 : out std_logic;
214 
    agent_one_d_out_7 : out std_logic;
215 
 
216 
    -- nios_8 ports --
217 
    agent_comm_in_8   : in  std_logic_vector (comm_width_g-1 downto 0);
218 
    agent_data_in_8   : in  std_logic_vector(data_width_g-1 downto 0);
219 
    agent_av_in_8     : in  std_logic;
220 
    agent_we_in_8     : in  std_logic;
221 
    agent_re_in_8     : in  std_logic;
222 
    agent_comm_out_8  : out std_logic_vector (comm_width_g-1 downto 0);
223 
    agent_data_out_8  : out std_logic_vector(data_width_g-1 downto 0);
224 
    agent_av_out_8    : out std_logic;
225 
    agent_full_out_8  : out std_logic;
226 
    agent_one_p_out_8 : out std_logic;
227 
    agent_empty_out_8 : out std_logic;
228 
    agent_one_d_out_8 : out std_logic;
229 
 
230 
    -- nios_9 ports --
231 
    agent_comm_in_9   : in  std_logic_vector (comm_width_g-1 downto 0);
232 
    agent_data_in_9   : in  std_logic_vector(data_width_g-1 downto 0);
233 
    agent_av_in_9     : in  std_logic;
234 
    agent_we_in_9     : in  std_logic;
235 
    agent_re_in_9     : in  std_logic;
236 
    agent_comm_out_9  : out std_logic_vector (comm_width_g-1 downto 0);
237 
    agent_data_out_9  : out std_logic_vector(data_width_g-1 downto 0);
238 
    agent_av_out_9    : out std_logic;
239 
    agent_full_out_9  : out std_logic;
240 
    agent_one_p_out_9 : out std_logic;
241 
    agent_empty_out_9 : out std_logic;
242 
    agent_one_d_out_9 : out std_logic;
243 
 
244 
    -- nios_10 ports --
245 
    agent_comm_in_10   : in  std_logic_vector (comm_width_g-1 downto 0);
246 
    agent_data_in_10   : in  std_logic_vector(data_width_g-1 downto 0);
247 
    agent_av_in_10     : in  std_logic;
248 
    agent_we_in_10     : in  std_logic;
249 
    agent_re_in_10     : in  std_logic;
250 
    agent_comm_out_10  : out std_logic_vector (comm_width_g-1 downto 0);
251 
    agent_data_out_10  : out std_logic_vector(data_width_g-1 downto 0);
252 
    agent_av_out_10    : out std_logic;
253 
    agent_full_out_10  : out std_logic;
254 
    agent_one_p_out_10 : out std_logic;
255 
    agent_empty_out_10 : out std_logic;
256 
    agent_one_d_out_10 : out std_logic;
257 
 
258 
    -- nios_11 ports --
259 
    agent_comm_in_11   : in  std_logic_vector (comm_width_g-1 downto 0);
260 
    agent_data_in_11   : in  std_logic_vector(data_width_g-1 downto 0);
261 
    agent_av_in_11     : in  std_logic;
262 
    agent_we_in_11     : in  std_logic;
263 
    agent_re_in_11     : in  std_logic;
264 
    agent_comm_out_11  : out std_logic_vector (comm_width_g-1 downto 0);
265 
    agent_data_out_11  : out std_logic_vector(data_width_g-1 downto 0);
266 
    agent_av_out_11    : out std_logic;
267 
    agent_full_out_11  : out std_logic;
268 
    agent_one_p_out_11 : out std_logic;
269 
    agent_empty_out_11 : out std_logic;
270 
    agent_one_d_out_11 : out std_logic;
271 
 
272 
    -- nios_12 ports --
273 
    agent_comm_in_12   : in  std_logic_vector (comm_width_g-1 downto 0);
274 
    agent_data_in_12   : in  std_logic_vector(data_width_g-1 downto 0);
275 
    agent_av_in_12     : in  std_logic;
276 
    agent_we_in_12     : in  std_logic;
277 
    agent_re_in_12     : in  std_logic;
278 
    agent_comm_out_12  : out std_logic_vector (comm_width_g-1 downto 0);
279 
    agent_data_out_12  : out std_logic_vector(data_width_g-1 downto 0);
280 
    agent_av_out_12    : out std_logic;
281 
    agent_full_out_12  : out std_logic;
282 
    agent_one_p_out_12 : out std_logic;
283 
    agent_empty_out_12 : out std_logic;
284 
    agent_one_d_out_12 : out std_logic;
285 
 
286 
    -- nios_13 ports --
287 
    agent_comm_in_13   : in  std_logic_vector (comm_width_g-1 downto 0);
288 
    agent_data_in_13   : in  std_logic_vector(data_width_g-1 downto 0);
289 
    agent_av_in_13     : in  std_logic;
290 
    agent_we_in_13     : in  std_logic;
291 
    agent_re_in_13     : in  std_logic;
292 
    agent_comm_out_13  : out std_logic_vector (comm_width_g-1 downto 0);
293 
    agent_data_out_13  : out std_logic_vector(data_width_g-1 downto 0);
294 
    agent_av_out_13    : out std_logic;
295 
    agent_full_out_13  : out std_logic;
296 
    agent_one_p_out_13 : out std_logic;
297 
    agent_empty_out_13 : out std_logic;
298 
    agent_one_d_out_13 : out std_logic;
299 
 
300 
    -- nios_14 ports --
301 
    agent_comm_in_14   : in  std_logic_vector (comm_width_g-1 downto 0);
302 
    agent_data_in_14   : in  std_logic_vector(data_width_g-1 downto 0);
303 
    agent_av_in_14     : in  std_logic;
304 
    agent_we_in_14     : in  std_logic;
305 
    agent_re_in_14     : in  std_logic;
306 
    agent_comm_out_14  : out std_logic_vector (comm_width_g-1 downto 0);
307 
    agent_data_out_14  : out std_logic_vector(data_width_g-1 downto 0);
308 
    agent_av_out_14    : out std_logic;
309 
    agent_full_out_14  : out std_logic;
310 
    agent_one_p_out_14 : out std_logic;
311 
    agent_empty_out_14 : out std_logic;
312 
    agent_one_d_out_14 : out std_logic;
313 
 
314 
    -- nios_15 ports --
315 
    agent_comm_in_15   : in  std_logic_vector (comm_width_g-1 downto 0);
316 
    agent_data_in_15   : in  std_logic_vector(data_width_g-1 downto 0);
317 
    agent_av_in_15     : in  std_logic;
318 
    agent_we_in_15     : in  std_logic;
319 
    agent_re_in_15     : in  std_logic;
320 
    agent_comm_out_15  : out std_logic_vector (comm_width_g-1 downto 0);
321 
    agent_data_out_15  : out std_logic_vector(data_width_g-1 downto 0);
322 
    agent_av_out_15    : out std_logic;
323 
    agent_full_out_15  : out std_logic;
324 
    agent_one_p_out_15 : out std_logic;
325 
    agent_empty_out_15 : out std_logic;
326 
    agent_one_d_out_15 : out std_logic;
327 
 
328 
    -- nios_16 ports --
329 
    agent_comm_in_16   : in  std_logic_vector (comm_width_g-1 downto 0);
330 
    agent_data_in_16   : in  std_logic_vector(data_width_g-1 downto 0);
331 
    agent_av_in_16     : in  std_logic;
332 
    agent_we_in_16     : in  std_logic;
333 
    agent_re_in_16     : in  std_logic;
334 
    agent_comm_out_16  : out std_logic_vector (comm_width_g-1 downto 0);
335 
    agent_data_out_16  : out std_logic_vector(data_width_g-1 downto 0);
336 
    agent_av_out_16    : out std_logic;
337 
    agent_full_out_16  : out std_logic;
338 
    agent_one_p_out_16 : out std_logic;
339 
    agent_empty_out_16 : out std_logic;
340 
    agent_one_d_out_16 : out std_logic;
341 
 
342 
    -- nios_17 ports --
343 
    agent_addr_in_17   : in  std_logic_vector (data_width_g-1 downto 0);
344 
    agent_addr_out_17  : out std_logic_vector (data_width_g-1 downto 0);
345 
    agent_comm_in_17   : in  std_logic_vector (comm_width_g-1 downto 0);
346 
    agent_data_in_17   : in  std_logic_vector(data_width_g-1 downto 0);
347 
    agent_we_in_17     : in  std_logic;
348 
    agent_re_in_17     : in  std_logic;
349 
    agent_comm_out_17  : out std_logic_vector (comm_width_g-1 downto 0);
350 
    agent_data_out_17  : out std_logic_vector(data_width_g-1 downto 0);
351 
    agent_full_out_17  : out std_logic;
352 
    agent_one_p_out_17 : out std_logic;
353 
    agent_empty_out_17 : out std_logic;
354 
    agent_one_d_out_17 : out std_logic;
355 
    agent_msg_addr_in_17   : in  std_logic_vector (data_width_g-1 downto 0);
356 
    agent_msg_addr_out_17  : out std_logic_vector (data_width_g-1 downto 0);
357 
    agent_msg_data_in_17   : in std_logic_vector (data_width_g-1 downto 0);
358 
    agent_msg_comm_in_17   : in std_logic_vector (comm_width_g-1 downto 0);
359 
    agent_msg_we_in_17     : in std_logic;
360 
    agent_msg_re_in_17     : in std_logic;
361 
    agent_msg_data_out_17  : out std_logic_vector (data_width_g-1 downto 0);
362 
    agent_msg_comm_out_17  : out std_logic_vector (comm_width_g-1 downto 0);
363 
    agent_msg_empty_out_17 : out std_logic;
364 
    agent_msg_one_d_out_17 : out std_logic;
365 
    agent_msg_full_out_17  : out std_logic;
366 
    agent_msg_one_p_out_17 : out std_logic
367 
 
368 
    );
369 
end hibi_segment_small;
370 
 
371 
architecture structural of hibi_segment_small is
372 
 
373 
  -- type     addr_array is array (1 to 8) of integer;
374 
  -- constant addresses : addr_array := (agent_address_1_g, agent_address_2_g, agent_address_3_g, agent_address_4_g, agent_address_5_g, agent_address_6_g, agent_address_7_g, agent_address_8_g);
375 
 
376 
 
377 
  -- constant rx_data_fifo_depths_c     : addr_array := (agent_rx_data_fifo_1_g, agent_rx_data_fifo_2_g, agent_rx_data_fifo_3_g, agent_rx_data_fifo_4_g, agent_rx_data_fifo_5_g, agent_rx_data_fifo_6_g, agent_rx_data_fifo_7_g, agent_rx_data_fifo_8_g);
378 
 
379 
  -- constant tx_data_fifo_depths_c     : addr_array := (agent_tx_data_fifo_1_g, agent_tx_data_fifo_2_g, agent_tx_data_fifo_3_g, agent_tx_data_fifo_4_g, agent_tx_data_fifo_5_g, agent_tx_data_fifo_6_g, agent_tx_data_fifo_7_g, agent_tx_data_fifo_8_g);
380 
  -- constant rx_msg_fifo_depths_c : addr_array := (agent_rx_msg_fifo_1_g, agent_rx_msg_fifo_2_g, agent_rx_msg_fifo_3_g, agent_rx_msg_fifo_4_g, agent_rx_msg_fifo_5_g, agent_rx_msg_fifo_6_g, agent_rx_msg_fifo_7_g, agent_rx_msg_fifo_8_g);
381 
  -- constant tx_msg_fifo_depths_c : addr_array := (agent_tx_msg_fifo_1_g, agent_tx_msg_fifo_2_g, agent_tx_msg_fifo_3_g, agent_tx_msg_fifo_4_g, agent_tx_msg_fifo_5_g, agent_tx_msg_fifo_6_g, agent_tx_msg_fifo_7_g, agent_tx_msg_fifo_8_g);
382 
  -- constant max_sends_c     : addr_array := ();
383 
 
384 
  constant max_send_c : integer := 512;
385 
 
386 
component hibi_wrapper_r4
387 
    generic (
388 
      id_g      : integer := 5;
389 
      base_id_g : integer := 5;
390 
 
391 
      id_width_g      : integer := 4;
392 
      addr_width_g    : integer := 32;  -- in bits!
393 
      data_width_g    : integer := 32;
394 
      comm_width_g    : integer := 3;
395 
      counter_width_g : integer := 8;
396 
 
397 
      rel_agent_freq_g : integer := 1;
398 
      rel_bus_freq_g   : integer := 1;
399 
 
400 
      -- 0 synch multiclk, 1 basic GALS,
401 
      -- 2 Gray FIFO (depth=2^n!), 3 mixed clock pausible
402 
      fifo_sel_g : integer := 0;
403 
 
404 
 
405 
      rx_fifo_depth_g     : integer := 5;
406 
      rx_msg_fifo_depth_g : integer := 5;
407 
      tx_fifo_depth_g     : integer := 5;
408 
      tx_msg_fifo_depth_g : integer := 5;
409 
 
410 
      arb_type_g : integer := 0;
411 
 
412 
      addr_g        : integer := 46;
413 
      prior_g       : integer := 2;
414 
      inv_addr_en_g : integer := 0;
415 
      max_send_g    : integer := 50;
416 
 
417 
      n_agents_g       : integer := 4;
418 
      n_cfg_pages_g    : integer := 1;
419 
      n_time_slots_g   : integer := 0;
420 
      n_extra_params_g : integer := 0;
421 
      multicast_en_g   : integer := 0;  -- 28.02.05
422 
      cfg_re_g         : integer := 0;  -- 28.02.05
423 
      cfg_we_g         : integer := 0;   -- 28.02.05
424 
      debug_width_g    : integer := 0  -- 13.04.2007 AK
425 
      );
426 
    port (
427 
      bus_clk        : in std_logic;
428 
      agent_clk      : in std_logic;
429 
      bus_sync_clk   : in std_logic;
430 
      agent_sync_clk : in std_logic;
431 
      rst_n          : in std_logic;
432 
      bus_comm_in    : in std_logic_vector (comm_width_g-1 downto 0);
433 
      bus_data_in    : in std_logic_vector (data_width_g-1 downto 0);
434 
      bus_full_in    : in std_logic;
435 
      bus_lock_in    : in std_logic;
436 
      bus_av_in      : in std_logic;
437 
 
438 
      agent_comm_in : in std_logic_vector (comm_width_g-1 downto 0);
439 
      agent_data_in : in std_logic_vector (data_width_g-1 downto 0);
440 
      agent_av_in   : in std_logic;
441 
      agent_we_in   : in std_logic;
442 
      agent_re_in   : in std_logic;
443 
 
444 
      bus_comm_out : out std_logic_vector (comm_width_g-1 downto 0);
445 
      bus_data_out : out std_logic_vector (data_width_g-1 downto 0);
446 
      bus_full_out : out std_logic;
447 
      bus_lock_out : out std_logic;
448 
      bus_av_out   : out std_logic;
449 
 
450 
      agent_comm_out  : out std_logic_vector (comm_width_g-1 downto 0);
451 
      agent_data_out  : out std_logic_vector (data_width_g-1 downto 0);
452 
      agent_av_out    : out std_logic;
453 
      agent_full_out  : out std_logic;
454 
      agent_one_p_out : out std_logic;
455 
      agent_empty_out : out std_logic;
456 
      agent_one_d_out : out std_logic
457 
      -- synthesis translate_off
458 
      -- pragma translate_off
459 
      ;
460 
      debug_out : out std_logic_vector(debug_width_g-1 downto 0);
461 
      debug_in : in std_logic_vector(debug_width_g-1 downto 0)
462 
      -- pragma translate_on
463 
      -- synthesis translate_on
464 
      );
465 
  end component;  -- hibi_wrapper_r4;
466 
 
467 
  component hibi_wrapper_r3 is
468 
    generic (
469 
      id_g      : integer := 5;
470 
      base_id_g : integer := 5;
471 
 
472 
      id_width_g      : integer := 4;
473 
      addr_width_g    : integer := 32;    -- in bits!
474 
      data_width_g    : integer := 32;
475 
      comm_width_g    : integer := 3;
476 
      counter_width_g : integer := 8;
477 
 
478 
      rx_fifo_depth_g     : integer := 5;
479 
      rx_msg_fifo_depth_g : integer := 5;
480 
      tx_fifo_depth_g     : integer := 5;
481 
      tx_msg_fifo_depth_g : integer := 5;
482 
      rel_agent_freq_g    : integer := 1;
483 
      rel_bus_freq_g      : integer := 1;
484 
      -- 0 synch multiclk, 1 basic GALS,
485 
      -- 2 Gray FIFO (depth=2^n!), 3 mixed clock pausible
486 
      fifo_sel_g          : integer := 0;
487 
 
488 
      addr_g        : integer := 46;
489 
      prior_g       : integer := 2;
490 
      inv_addr_en_g : integer := 0;
491 
      max_send_g    : integer := 50;
492 
 
493 
      arb_type_g : integer := 0;
494 
 
495 
      n_agents_g       : integer := 4;
496 
      n_cfg_pages_g    : integer := 1;
497 
      n_time_slots_g   : integer := 0;
498 
      n_extra_params_g : integer := 0;
499 
      multicast_en_g   : integer := 0;    -- 28.02.05
500 
      cfg_re_g         : integer := 0;
501 
      cfg_we_g         : integer := 0;
502 
      debug_width_g : integer := 0
503 
 
504 
    );
505 
 
506 
    port (
507 
      bus_clk     : in std_logic;
508 
      agent_clk   : in std_logic;
509 
      bus_sync_clk   : in std_logic;
510 
      agent_sync_clk : in std_logic;
511 
      rst_n       : in std_logic;
512 
      bus_comm_in : in std_logic_vector (comm_width_g-1 downto 0);
513 
      bus_data_in : in std_logic_vector (data_width_g-1 downto 0);
514 
      bus_full_in : in std_logic;
515 
      bus_Lock_in : in std_logic;
516 
      bus_av_in   : in std_logic;
517 
 
518 
      agent_comm_in   : in  std_logic_vector (comm_width_g-1 downto 0);
519 
      agent_data_in   : in  std_logic_vector (data_width_g-1 downto 0);
520 
      agent_addr_in   : in  std_logic_vector (data_width_g-1 downto 0);
521 
      agent_we_in     : in  std_logic;
522 
      agent_full_out  : out std_logic;
523 
      agent_one_p_out : out std_logic;
524 
 
525 
      agent_msg_addr_in   : in  std_logic_vector (data_width_g-1 downto 0);
526 
      agent_msg_data_in   : in  std_logic_vector (data_width_g-1 downto 0);
527 
      agent_msg_comm_in   : in  std_logic_vector (comm_width_g-1 downto 0);
528 
      agent_msg_we_in     : in  std_logic;
529 
      agent_msg_full_out  : out std_logic;
530 
      agent_msg_one_p_out : out std_logic;
531 
 
532 
      bus_comm_out : out std_logic_vector (comm_width_g-1 downto 0);
533 
      bus_data_out : out std_logic_vector (data_width_g-1 downto 0);
534 
      bus_full_out : out std_logic;
535 
      bus_Lock_out : out std_logic;
536 
      bus_av_out   : out std_logic;
537 
 
538 
      agent_re_in     : in  std_logic;
539 
      agent_addr_out  : out std_logic_vector (data_width_g-1 downto 0);
540 
      agent_data_out  : out std_logic_vector (data_width_g-1 downto 0);
541 
      agent_comm_out  : out std_logic_vector (comm_width_g-1 downto 0);
542 
      agent_empty_out : out std_logic;
543 
      agent_one_d_out : out std_logic;    -- is this used??
544 
 
545 
      agent_msg_re_in     : in  std_logic;
546 
      agent_msg_addr_out  : out std_logic_vector (data_width_g-1 downto 0);
547 
      agent_msg_data_out  : out std_logic_vector (data_width_g-1 downto 0);
548 
      agent_msg_comm_out  : out std_logic_vector (comm_width_g-1 downto 0);
549 
      agent_msg_empty_out : out std_logic;
550 
      agent_msg_one_d_out : out std_logic  -- is this used??
551 
    );
552 
  end component;
553 
 
554 
 
555 
 
556 
  -- constants
557 
  -- komennot
558 
  constant idle : integer := 0;
559 
  constant wc   : integer := 1;         --write conf
560 
  constant wd   : integer := 2;         --write data
561 
  constant wm   : integer := 3;         --write msg
562 
  constant rd   : integer := 4;         --read rq data
563 
  constant rc   : integer := 5;         --read rq conf
564 
  constant md   : integer := 6;         --multicast data
565 
  constant mm   : integer := 7;         --mutlicast msg
566 
 
567 
  -- av  => osoite / data
568 
  -- msg_or_data => data / viesti
569 
  constant a : integer := 1;
570 
  constant d : integer := 0;
571 
  constant m : integer := 1;
572 
  type     data_vec_array is array (1 to 8) of std_logic_vector (data_width_g-1 downto 0);
573 
 
574 
  type     addr_array is array (1 to 17) of integer;
575 
  constant addr_c : addr_array := (16#01000000#, 16#03000000#, 16#05000000#, 16#07000000#, 16#09000000#, 16#0b000000#, 16#0d000000#, 16#0f000000#,
576 
                                   16#11000000#, 16#13000000#, 16#15000000#, 16#17000000#, 16#19000000#, 16#1b000000#, 16#1d000000#, 16#1f000000#,
577 
                                   16#29000000#);
578 
  constant fifo_depths_c     : addr_array := (20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20);
579 
  constant msg_fifo_depths_c : addr_array := (0, 0, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20);
580 
 
581 
 
582 
  signal bus_data_out_1 : std_logic_vector (data_width_g-1 downto 0);
583 
  signal bus_comm_out_1 : std_logic_vector (comm_width_g-1 downto 0);
584 
  signal bus_lock_out_1 : std_logic;
585 
  signal bus_av_out_1   : std_logic;
586 
  signal bus_full_out_1 : std_logic;
587 
  signal bus_data_out_2 : std_logic_vector (data_width_g-1 downto 0);
588 
  signal bus_comm_out_2 : std_logic_vector (comm_width_g-1 downto 0);
589 
  signal bus_lock_out_2 : std_logic;
590 
  signal bus_av_out_2   : std_logic;
591 
  signal bus_full_out_2 : std_logic;
592 
  signal bus_data_out_3 : std_logic_vector (data_width_g-1 downto 0);
593 
  signal bus_comm_out_3 : std_logic_vector (comm_width_g-1 downto 0);
594 
  signal bus_lock_out_3 : std_logic;
595 
  signal bus_av_out_3   : std_logic;
596 
  signal bus_full_out_3 : std_logic;
597 
  signal bus_data_out_4 : std_logic_vector (data_width_g-1 downto 0);
598 
  signal bus_comm_out_4 : std_logic_vector (comm_width_g-1 downto 0);
599 
  signal bus_lock_out_4 : std_logic;
600 
  signal bus_av_out_4   : std_logic;
601 
  signal bus_full_out_4 : std_logic;
602 
  signal bus_data_out_5 : std_logic_vector (data_width_g-1 downto 0);
603 
  signal bus_comm_out_5 : std_logic_vector (comm_width_g-1 downto 0);
604 
  signal bus_lock_out_5 : std_logic;
605 
  signal bus_av_out_5   : std_logic;
606 
  signal bus_full_out_5 : std_logic;
607 
  signal bus_data_out_6 : std_logic_vector (data_width_g-1 downto 0);
608 
  signal bus_comm_out_6 : std_logic_vector (comm_width_g-1 downto 0);
609 
  signal bus_lock_out_6 : std_logic;
610 
  signal bus_av_out_6   : std_logic;
611 
  signal bus_full_out_6 : std_logic;
612 
  signal bus_data_out_7 : std_logic_vector (data_width_g-1 downto 0);
613 
  signal bus_comm_out_7 : std_logic_vector (comm_width_g-1 downto 0);
614 
  signal bus_lock_out_7 : std_logic;
615 
  signal bus_av_out_7   : std_logic;
616 
  signal bus_full_out_7 : std_logic;
617 
  signal bus_data_out_8 : std_logic_vector (data_width_g-1 downto 0);
618 
  signal bus_comm_out_8 : std_logic_vector (comm_width_g-1 downto 0);
619 
  signal bus_lock_out_8 : std_logic;
620 
  signal bus_av_out_8   : std_logic;
621 
  signal bus_full_out_8 : std_logic;
622 
  signal bus_data_out_9 : std_logic_vector (data_width_g-1 downto 0);
623 
  signal bus_comm_out_9 : std_logic_vector (comm_width_g-1 downto 0);
624 
  signal bus_lock_out_9 : std_logic;
625 
  signal bus_av_out_9   : std_logic;
626 
  signal bus_full_out_9 : std_logic;
627 
  signal bus_data_out_10 : std_logic_vector (data_width_g-1 downto 0);
628 
  signal bus_comm_out_10 : std_logic_vector (comm_width_g-1 downto 0);
629 
  signal bus_lock_out_10 : std_logic;
630 
  signal bus_av_out_10   : std_logic;
631 
  signal bus_full_out_10 : std_logic;
632 
  signal bus_data_out_11 : std_logic_vector (data_width_g-1 downto 0);
633 
  signal bus_comm_out_11 : std_logic_vector (comm_width_g-1 downto 0);
634 
  signal bus_lock_out_11 : std_logic;
635 
  signal bus_av_out_11   : std_logic;
636 
  signal bus_full_out_11 : std_logic;
637 
  signal bus_data_out_12 : std_logic_vector (data_width_g-1 downto 0);
638 
  signal bus_comm_out_12 : std_logic_vector (comm_width_g-1 downto 0);
639 
  signal bus_lock_out_12 : std_logic;
640 
  signal bus_av_out_12   : std_logic;
641 
  signal bus_full_out_12 : std_logic;
642 
  signal bus_data_out_13 : std_logic_vector (data_width_g-1 downto 0);
643 
  signal bus_comm_out_13 : std_logic_vector (comm_width_g-1 downto 0);
644 
  signal bus_lock_out_13 : std_logic;
645 
  signal bus_av_out_13   : std_logic;
646 
  signal bus_full_out_13 : std_logic;
647 
  signal bus_data_out_14 : std_logic_vector (data_width_g-1 downto 0);
648 
  signal bus_comm_out_14 : std_logic_vector (comm_width_g-1 downto 0);
649 
  signal bus_lock_out_14 : std_logic;
650 
  signal bus_av_out_14   : std_logic;
651 
  signal bus_full_out_14 : std_logic;
652 
  signal bus_data_out_15 : std_logic_vector (data_width_g-1 downto 0);
653 
  signal bus_comm_out_15 : std_logic_vector (comm_width_g-1 downto 0);
654 
  signal bus_lock_out_15 : std_logic;
655 
  signal bus_av_out_15   : std_logic;
656 
  signal bus_full_out_15 : std_logic;
657 
  signal bus_data_out_16 : std_logic_vector (data_width_g-1 downto 0);
658 
  signal bus_comm_out_16 : std_logic_vector (comm_width_g-1 downto 0);
659 
  signal bus_lock_out_16 : std_logic;
660 
  signal bus_av_out_16   : std_logic;
661 
  signal bus_full_out_16 : std_logic;
662 
  signal bus_data_out_17 : std_logic_vector (data_width_g-1 downto 0);
663 
  signal bus_comm_out_17 : std_logic_vector (comm_width_g-1 downto 0);
664 
  signal bus_lock_out_17 : std_logic;
665 
  signal bus_av_out_17   : std_logic;
666 
  signal bus_full_out_17 : std_logic;
667 
  signal bus_data_in    : std_logic_vector (data_width_g-1 downto 0);
668 
  signal bus_comm_in    : std_logic_vector (comm_width_g-1 downto 0);
669 
  signal bus_av_in      : std_logic;
670 
  signal bus_lock_in    : std_logic;
671 
  signal bus_full_in    : std_logic;
672 
 
673 
 
674 
 
675 
begin  -- structural
676 
 
677 
  a1 : if number_of_r4_agents_g > 0 generate
678 
 
679 
    agent_1 : hibi_wrapper_r4
680 
      generic map (
681 
        id_g                => 1,
682 
        base_id_g           => 2**id_width_g-1,
683 
        id_width_g          => id_width_g,
684 
        addr_width_g        => addr_width_g,
685 
        data_width_g        => data_width_g,
686 
        comm_width_g        => comm_width_g,
687 
        counter_width_g     => counter_width_g,
688 
        rx_fifo_depth_g     => fifo_depths_c(1),
689 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(1),
690 
        tx_fifo_depth_g     => fifo_depths_c(1),
691 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(1),
692 
        addr_g              => addr_c(1),
693 
        prior_g             => 1,
694 
        inv_addr_en_g       => 0,
695 
        max_send_g          => agent_max_send_1_g,
696 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
697 
        n_cfg_pages_g       => 1,
698 
        n_time_slots_g      => 0,
699 
        n_extra_params_g    => 0,
700 
        -- cfg_rom_en_g        => 1
701 
        debug_width_g       => 0
702 
        )
703 
      port map (
704 
        bus_clk      => clk,
705 
        agent_clk    => clk,
706 
        bus_sync_clk => clk,
707 
        agent_sync_clk => clk,
708 
        rst_n        => rst_n,
709 
        bus_comm_in  => bus_comm_in,
710 
        bus_comm_out => bus_comm_out_1,
711 
        bus_data_in  => bus_data_in,
712 
        bus_data_out => bus_data_out_1,
713 
        bus_full_in  => bus_full_in,
714 
        bus_full_out => bus_full_out_1,
715 
        bus_lock_in  => bus_lock_in,
716 
        bus_lock_out => bus_lock_out_1,
717 
        bus_av_in    => bus_av_in,
718 
        bus_av_out   => bus_av_out_1,
719 
 
720 
        agent_comm_in   => agent_comm_in_1,
721 
        agent_comm_out  => agent_comm_out_1,
722 
        agent_data_in   => agent_data_in_1,
723 
        agent_data_out  => agent_data_out_1,
724 
        agent_av_in     => agent_av_in_1,
725 
        agent_av_out    => agent_av_out_1,
726 
        agent_full_out  => agent_full_out_1,
727 
        agent_one_p_out => agent_one_p_out_1,
728 
        agent_we_in     => agent_we_in_1,
729 
        agent_empty_out => agent_empty_out_1,
730 
        agent_one_d_out => agent_one_d_out_1,
731 
        agent_re_in     => agent_re_in_1
732 
        -- synthesis translate_off
733 
        -- pragma translate_off
734 
        ,
735 
        debug_out => open,
736 
        debug_in => (others => '0')
737 
        -- pragma translate_on
738 
        -- synthesis translate_on
739 
        );
740 
  end generate a1;
741 
 
742 
  a2 : if number_of_r4_agents_g > 1 generate
743 
 
744 
    agent_2 : hibi_wrapper_r4
745 
      generic map (
746 
        id_g                => 3,
747 
        base_id_g           => 2**id_width_g-1,
748 
        id_width_g          => id_width_g,
749 
        addr_width_g        => addr_width_g,
750 
        data_width_g        => data_width_g,
751 
        comm_width_g        => comm_width_g,
752 
        counter_width_g     => counter_width_g,
753 
        rx_fifo_depth_g     => fifo_depths_c(2),
754 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(2),
755 
        tx_fifo_depth_g     => fifo_depths_c(2),
756 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(2),
757 
        addr_g              => addr_c(2),
758 
        prior_g             => agent_priority_2_g,
759 
        inv_addr_en_g       => 0,
760 
        max_send_g          => agent_max_send_2_g,
761 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
762 
        n_cfg_pages_g       => 1,
763 
        n_time_slots_g      => 0,
764 
        n_extra_params_g    => 0
765 
        -- cfg_rom_en_g        => 1
766 
        )
767 
      port map (
768 
        bus_clk      => clk,
769 
        agent_clk    => clk,
770 
        bus_sync_clk => clk,
771 
        agent_sync_clk => clk,
772 
        rst_n        => rst_n,
773 
        bus_comm_in  => bus_comm_in,
774 
        bus_comm_out => bus_comm_out_2,
775 
        bus_data_in  => bus_data_in,
776 
        bus_data_out => bus_data_out_2,
777 
        bus_full_in  => bus_full_in,
778 
        bus_full_out => bus_full_out_2,
779 
        bus_lock_in  => bus_lock_in,
780 
        bus_lock_out => bus_lock_out_2,
781 
        bus_av_in    => bus_av_in,
782 
        bus_av_out   => bus_av_out_2,
783 
 
784 
        agent_comm_in   => agent_comm_in_2,
785 
        agent_comm_out  => agent_comm_out_2,
786 
        agent_data_in   => agent_data_in_2,
787 
        agent_data_out  => agent_data_out_2,
788 
        agent_av_in     => agent_av_in_2,
789 
        agent_av_out    => agent_av_out_2,
790 
        agent_full_out  => agent_full_out_2,
791 
        agent_one_p_out => agent_one_p_out_2,
792 
        agent_we_in     => agent_we_in_2,
793 
        agent_empty_out => agent_empty_out_2,
794 
        agent_one_d_out => agent_one_d_out_2,
795 
        agent_re_in     => agent_re_in_2
796 
        -- synthesis translate_off
797 
        -- pragma translate_off
798 
        ,
799 
        debug_out => open,
800 
        debug_in => (others => '0')
801 
        -- pragma translate_on
802 
        -- synthesis translate_on
803 
        );
804 
  end generate a2;
805 
 
806 
 
807 
  a3 : if number_of_r4_agents_g > 2 generate
808 
 
809 
    agent_3 : hibi_wrapper_r4
810 
      generic map (
811 
        id_g                => 4,
812 
        base_id_g           => 2**id_width_g-1,
813 
        id_width_g          => id_width_g,
814 
        addr_width_g        => addr_width_g,
815 
        data_width_g        => data_width_g,
816 
        comm_width_g        => comm_width_g,
817 
        counter_width_g     => counter_width_g,
818 
        rx_fifo_depth_g     => fifo_depths_c(3),
819 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(3),
820 
        tx_fifo_depth_g     => fifo_depths_c(3),
821 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(3),
822 
        addr_g              => addr_c(3),
823 
        prior_g             => agent_priority_3_g,
824 
        inv_addr_en_g       => 0,
825 
        max_send_g          => agent_max_send_3_g,
826 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
827 
        n_cfg_pages_g       => 1,
828 
        n_time_slots_g      => 0,
829 
        n_extra_params_g    => 0
830 
        -- cfg_rom_en_g        => 1
831 
        )
832 
      port map (
833 
        bus_clk      => clk,
834 
        agent_clk    => clk,
835 
        bus_sync_clk => clk,
836 
        agent_sync_clk => clk,
837 
        rst_n        => rst_n,
838 
        bus_comm_in  => bus_comm_in,
839 
        bus_comm_out => bus_comm_out_3,
840 
        bus_data_in  => bus_data_in,
841 
        bus_data_out => bus_data_out_3,
842 
        bus_full_in  => bus_full_in,
843 
        bus_full_out => bus_full_out_3,
844 
        bus_lock_in  => bus_lock_in,
845 
        bus_lock_out => bus_lock_out_3,
846 
        bus_av_in    => bus_av_in,
847 
        bus_av_out   => bus_av_out_3,
848 
 
849 
        agent_comm_in   => agent_comm_in_3,
850 
        agent_comm_out  => agent_comm_out_3,
851 
        agent_data_in   => agent_data_in_3,
852 
        agent_data_out  => agent_data_out_3,
853 
        agent_av_in     => agent_av_in_3,
854 
        agent_av_out    => agent_av_out_3,
855 
        agent_full_out  => agent_full_out_3,
856 
        agent_one_p_out => agent_one_p_out_3,
857 
        agent_we_in     => agent_we_in_3,
858 
        agent_empty_out => agent_empty_out_3,
859 
        agent_one_d_out => agent_one_d_out_3,
860 
        agent_re_in     => agent_re_in_3
861 
        -- synthesis translate_off
862 
        -- pragma translate_off
863 
        ,
864 
        debug_out => open,
865 
        debug_in => (others => '0')
866 
        -- pragma translate_on
867 
        -- synthesis translate_on
868 
        );
869 
  end generate a3;
870 
  a4 : if number_of_r4_agents_g > 3 generate
871 
 
872 
    agent_4 : hibi_wrapper_r4
873 
      generic map (
874 
        id_g                => 5,
875 
        base_id_g           => 2**id_width_g-1,
876 
        id_width_g          => id_width_g,
877 
        addr_width_g        => addr_width_g,
878 
        data_width_g        => data_width_g,
879 
        comm_width_g        => comm_width_g,
880 
        counter_width_g     => counter_width_g,
881 
        rx_fifo_depth_g     => fifo_depths_c(4),
882 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(4),
883 
        tx_fifo_depth_g     => fifo_depths_c(4),
884 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(4),
885 
        addr_g              => addr_c(4),
886 
        prior_g             => agent_priority_4_g,
887 
        inv_addr_en_g       => 0,
888 
        max_send_g          => agent_max_send_4_g,
889 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
890 
        n_cfg_pages_g       => 1,
891 
        n_time_slots_g      => 0,
892 
        n_extra_params_g    => 0
893 
        -- cfg_rom_en_g        => 1
894 
        )
895 
      port map (
896 
        bus_clk      => clk,
897 
        agent_clk    => clk,
898 
        bus_sync_clk => clk,
899 
        agent_sync_clk => clk,
900 
        rst_n        => rst_n,
901 
        bus_comm_in  => bus_comm_in,
902 
        bus_comm_out => bus_comm_out_4,
903 
        bus_data_in  => bus_data_in,
904 
        bus_data_out => bus_data_out_4,
905 
        bus_full_in  => bus_full_in,
906 
        bus_full_out => bus_full_out_4,
907 
        bus_lock_in  => bus_lock_in,
908 
        bus_lock_out => bus_lock_out_4,
909 
        bus_av_in    => bus_av_in,
910 
        bus_av_out   => bus_av_out_4,
911 
 
912 
        agent_comm_in   => agent_comm_in_4,
913 
        agent_comm_out  => agent_comm_out_4,
914 
        agent_data_in   => agent_data_in_4,
915 
        agent_data_out  => agent_data_out_4,
916 
        agent_av_in     => agent_av_in_4,
917 
        agent_av_out    => agent_av_out_4,
918 
        agent_full_out  => agent_full_out_4,
919 
        agent_one_p_out => agent_one_p_out_4,
920 
        agent_we_in     => agent_we_in_4,
921 
        agent_empty_out => agent_empty_out_4,
922 
        agent_one_d_out => agent_one_d_out_4,
923 
        agent_re_in     => agent_re_in_4
924 
        -- synthesis translate_off
925 
        -- pragma translate_off
926 
        ,
927 
        debug_out => open,
928 
        debug_in => (others => '0')
929 
        -- pragma translate_on
930 
        -- synthesis translate_on
931 
        );
932 
  end generate a4;
933 
 
934 
  a5 : if number_of_r4_agents_g > 4 generate
935 
 
936 
    agent_5 : hibi_wrapper_r4
937 
      generic map (
938 
        id_g                => 6,
939 
        base_id_g           => 2**id_width_g-1,
940 
        id_width_g          => id_width_g,
941 
        addr_width_g        => addr_width_g,
942 
        data_width_g        => data_width_g,
943 
        comm_width_g        => comm_width_g,
944 
        counter_width_g     => counter_width_g,
945 
        rx_fifo_depth_g     => fifo_depths_c(5),
946 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(5),
947 
        tx_fifo_depth_g     => fifo_depths_c(5),
948 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(5),
949 
        addr_g              => addr_c(5),
950 
        prior_g             => agent_priority_5_g,
951 
        inv_addr_en_g       => 0,
952 
        max_send_g          => agent_max_send_5_g,
953 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
954 
        n_cfg_pages_g       => 1,
955 
        n_time_slots_g      => 0,
956 
        n_extra_params_g    => 0
957 
        -- cfg_rom_en_g        => 1
958 
        )
959 
      port map (
960 
        bus_clk      => clk,
961 
        agent_clk    => clk,
962 
        bus_sync_clk => clk,
963 
        agent_sync_clk => clk,
964 
        rst_n        => rst_n,
965 
        bus_comm_in  => bus_comm_in,
966 
        bus_comm_out => bus_comm_out_5,
967 
        bus_data_in  => bus_data_in,
968 
        bus_data_out => bus_data_out_5,
969 
        bus_full_in  => bus_full_in,
970 
        bus_full_out => bus_full_out_5,
971 
        bus_lock_in  => bus_lock_in,
972 
        bus_lock_out => bus_lock_out_5,
973 
        bus_av_in    => bus_av_in,
974 
        bus_av_out   => bus_av_out_5,
975 
 
976 
        agent_comm_in   => agent_comm_in_5,
977 
        agent_comm_out  => agent_comm_out_5,
978 
        agent_data_in   => agent_data_in_5,
979 
        agent_data_out  => agent_data_out_5,
980 
        agent_av_in     => agent_av_in_5,
981 
        agent_av_out    => agent_av_out_5,
982 
        agent_full_out  => agent_full_out_5,
983 
        agent_one_p_out => agent_one_p_out_5,
984 
        agent_we_in     => agent_we_in_5,
985 
        agent_empty_out => agent_empty_out_5,
986 
        agent_one_d_out => agent_one_d_out_5,
987 
        agent_re_in     => agent_re_in_5
988 
        -- synthesis translate_off
989 
        -- pragma translate_off
990 
        ,
991 
        debug_out => open,
992 
        debug_in => (others => '0')
993 
        -- pragma translate_on
994 
        -- synthesis translate_on
995 
        );
996 
  end generate a5;
997 
 
998 
  a6 : if number_of_r4_agents_g > 5 generate
999 
 
1000 
    agent_6 : hibi_wrapper_r4
1001 
      generic map (
1002 
        id_g                => 7,
1003 
        base_id_g           => 2**id_width_g-1,
1004 
        id_width_g          => id_width_g,
1005 
        addr_width_g        => addr_width_g,
1006 
        data_width_g        => data_width_g,
1007 
        comm_width_g        => comm_width_g,
1008 
        counter_width_g     => counter_width_g,
1009 
        rx_fifo_depth_g     => fifo_depths_c(6),
1010 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(6),
1011 
        tx_fifo_depth_g     => fifo_depths_c(6),
1012 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(6),
1013 
        addr_g              => addr_c(6),
1014 
        prior_g             => agent_priority_6_g,
1015 
        inv_addr_en_g       => 0,
1016 
        max_send_g          => agent_max_send_6_g,
1017 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1018 
        n_cfg_pages_g       => 1,
1019 
        n_time_slots_g      => 0,
1020 
        n_extra_params_g    => 0
1021 
        -- cfg_rom_en_g        => 1
1022 
        )
1023 
      port map (
1024 
        bus_clk      => clk,
1025 
        agent_clk    => clk,
1026 
        bus_sync_clk => clk,
1027 
        agent_sync_clk => clk,
1028 
        rst_n        => rst_n,
1029 
        bus_comm_in  => bus_comm_in,
1030 
        bus_comm_out => bus_comm_out_6,
1031 
        bus_data_in  => bus_data_in,
1032 
        bus_data_out => bus_data_out_6,
1033 
        bus_full_in  => bus_full_in,
1034 
        bus_full_out => bus_full_out_6,
1035 
        bus_lock_in  => bus_lock_in,
1036 
        bus_lock_out => bus_lock_out_6,
1037 
        bus_av_in    => bus_av_in,
1038 
        bus_av_out   => bus_av_out_6,
1039 
 
1040 
        agent_comm_in   => agent_comm_in_6,
1041 
        agent_comm_out  => agent_comm_out_6,
1042 
        agent_data_in   => agent_data_in_6,
1043 
        agent_data_out  => agent_data_out_6,
1044 
        agent_av_in     => agent_av_in_6,
1045 
        agent_av_out    => agent_av_out_6,
1046 
        agent_full_out  => agent_full_out_6,
1047 
        agent_one_p_out => agent_one_p_out_6,
1048 
        agent_we_in     => agent_we_in_6,
1049 
        agent_empty_out => agent_empty_out_6,
1050 
        agent_one_d_out => agent_one_d_out_6,
1051 
        agent_re_in     => agent_re_in_6
1052 
        -- synthesis translate_off
1053 
        -- pragma translate_off
1054 
        ,
1055 
        debug_out => open,
1056 
        debug_in => (others => '0')
1057 
        -- pragma translate_on
1058 
        -- synthesis translate_on
1059 
        );
1060 
  end generate a6;
1061 
  a7 : if number_of_r4_agents_g > 6 generate
1062 
 
1063 
    agent_7 : hibi_wrapper_r4
1064 
      generic map (
1065 
        id_g                => 8,
1066 
        base_id_g           => 2**id_width_g-1,
1067 
        id_width_g          => id_width_g,
1068 
        addr_width_g        => addr_width_g,
1069 
        data_width_g        => data_width_g,
1070 
        comm_width_g        => comm_width_g,
1071 
        counter_width_g     => counter_width_g,
1072 
        rx_fifo_depth_g     => fifo_depths_c(7),
1073 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(7),
1074 
        tx_fifo_depth_g     => fifo_depths_c(7),
1075 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(7),
1076 
        addr_g              => addr_c(7),
1077 
        prior_g             => agent_priority_7_g,
1078 
        inv_addr_en_g       => 0,
1079 
        max_send_g          => agent_max_send_7_g,
1080 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1081 
        n_cfg_pages_g       => 1,
1082 
        n_time_slots_g      => 0,
1083 
        n_extra_params_g    => 0
1084 
        -- cfg_rom_en_g        => 1
1085 
        )
1086 
      port map (
1087 
        bus_clk      => clk,
1088 
        agent_clk    => clk,
1089 
        bus_sync_clk => clk,
1090 
        agent_sync_clk => clk,
1091 
        rst_n        => rst_n,
1092 
        bus_comm_in  => bus_comm_in,
1093 
        bus_comm_out => bus_comm_out_7,
1094 
        bus_data_in  => bus_data_in,
1095 
        bus_data_out => bus_data_out_7,
1096 
        bus_full_in  => bus_full_in,
1097 
        bus_full_out => bus_full_out_7,
1098 
        bus_lock_in  => bus_lock_in,
1099 
        bus_lock_out => bus_lock_out_7,
1100 
        bus_av_in    => bus_av_in,
1101 
        bus_av_out   => bus_av_out_7,
1102 
 
1103 
        agent_comm_in   => agent_comm_in_7,
1104 
        agent_comm_out  => agent_comm_out_7,
1105 
        agent_data_in   => agent_data_in_7,
1106 
        agent_data_out  => agent_data_out_7,
1107 
        agent_av_in     => agent_av_in_7,
1108 
        agent_av_out    => agent_av_out_7,
1109 
        agent_full_out  => agent_full_out_7,
1110 
        agent_one_p_out => agent_one_p_out_7,
1111 
        agent_we_in     => agent_we_in_7,
1112 
        agent_empty_out => agent_empty_out_7,
1113 
        agent_one_d_out => agent_one_d_out_7,
1114 
        agent_re_in     => agent_re_in_7
1115 
        -- synthesis translate_off
1116 
        -- pragma translate_off
1117 
        ,
1118 
        debug_out => open,
1119 
        debug_in => (others => '0')
1120 
        -- pragma translate_on
1121 
        -- synthesis translate_on
1122 
        );
1123 
 
1124 
  end generate a7;
1125 
 
1126 
  a8 : if number_of_r4_agents_g > 7 generate
1127 
 
1128 
    agent_8 : hibi_wrapper_r4
1129 
      generic map (
1130 
        id_g                => 9,
1131 
        base_id_g           => 2**id_width_g-1,
1132 
        id_width_g          => id_width_g,
1133 
        addr_width_g        => addr_width_g,
1134 
        data_width_g        => data_width_g,
1135 
        comm_width_g        => comm_width_g,
1136 
        counter_width_g     => counter_width_g,
1137 
        rx_fifo_depth_g     => fifo_depths_c(8),
1138 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(8),
1139 
        tx_fifo_depth_g     => fifo_depths_c(8),
1140 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(8),
1141 
        addr_g              => addr_c(8),
1142 
        prior_g             => agent_priority_8_g,
1143 
        inv_addr_en_g       => 0,
1144 
        max_send_g          => agent_max_send_8_g,
1145 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1146 
        n_cfg_pages_g       => 1,
1147 
        n_time_slots_g      => 0,
1148 
        n_extra_params_g    => 0
1149 
        -- cfg_rom_en_g        => 1
1150 
        )
1151 
      port map (
1152 
        bus_clk      => clk,
1153 
        agent_clk    => clk,
1154 
        bus_sync_clk => clk,
1155 
        agent_sync_clk => clk,
1156 
        rst_n        => rst_n,
1157 
        bus_comm_in  => bus_comm_in,
1158 
        bus_comm_out => bus_comm_out_8,
1159 
        bus_data_in  => bus_data_in,
1160 
        bus_data_out => bus_data_out_8,
1161 
        bus_full_in  => bus_full_in,
1162 
        bus_full_out => bus_full_out_8,
1163 
        bus_lock_in  => bus_lock_in,
1164 
        bus_lock_out => bus_lock_out_8,
1165 
        bus_av_in    => bus_av_in,
1166 
        bus_av_out   => bus_av_out_8,
1167 
 
1168 
        agent_comm_in   => agent_comm_in_8,
1169 
        agent_comm_out  => agent_comm_out_8,
1170 
        agent_data_in   => agent_data_in_8,
1171 
        agent_data_out  => agent_data_out_8,
1172 
        agent_av_in     => agent_av_in_8,
1173 
        agent_av_out    => agent_av_out_8,
1174 
        agent_full_out  => agent_full_out_8,
1175 
        agent_one_p_out => agent_one_p_out_8,
1176 
        agent_we_in     => agent_we_in_8,
1177 
        agent_empty_out => agent_empty_out_8,
1178 
        agent_one_d_out => agent_one_d_out_8,
1179 
        agent_re_in     => agent_re_in_8
1180 
        -- synthesis translate_off
1181 
        -- pragma translate_off
1182 
        ,
1183 
        debug_out => open,
1184 
        debug_in => (others => '0')
1185 
        -- pragma translate_on
1186 
        -- synthesis translate_on
1187 
        );
1188 
  end generate a8;
1189 
 
1190 
 
1191 
  a9 : if number_of_r4_agents_g > 8 generate
1192 
 
1193 
    agent_9 : hibi_wrapper_r4
1194 
      generic map (
1195 
        id_g                => 10,
1196 
        base_id_g           => 2**id_width_g-1,
1197 
        id_width_g          => id_width_g,
1198 
        addr_width_g        => addr_width_g,
1199 
        data_width_g        => data_width_g,
1200 
        comm_width_g        => comm_width_g,
1201 
        counter_width_g     => counter_width_g,
1202 
        rx_fifo_depth_g     => fifo_depths_c(9),
1203 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(9),
1204 
        tx_fifo_depth_g     => fifo_depths_c(9),
1205 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(9),
1206 
        addr_g              => addr_c(9),
1207 
        prior_g             => agent_priority_9_g,
1208 
        inv_addr_en_g       => 0,
1209 
        max_send_g          => agent_max_send_9_g,
1210 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1211 
        n_cfg_pages_g       => 1,
1212 
        n_time_slots_g      => 0,
1213 
        n_extra_params_g    => 0
1214 
        -- cfg_rom_en_g        => 1
1215 
        )
1216 
      port map (
1217 
        bus_clk      => clk,
1218 
        agent_clk    => clk,
1219 
        bus_sync_clk => clk,
1220 
        agent_sync_clk => clk,
1221 
        rst_n        => rst_n,
1222 
        bus_comm_in  => bus_comm_in,
1223 
        bus_comm_out => bus_comm_out_9,
1224 
        bus_data_in  => bus_data_in,
1225 
        bus_data_out => bus_data_out_9,
1226 
        bus_full_in  => bus_full_in,
1227 
        bus_full_out => bus_full_out_9,
1228 
        bus_lock_in  => bus_lock_in,
1229 
        bus_lock_out => bus_lock_out_9,
1230 
        bus_av_in    => bus_av_in,
1231 
        bus_av_out   => bus_av_out_9,
1232 
 
1233 
        agent_comm_in   => agent_comm_in_9,
1234 
        agent_comm_out  => agent_comm_out_9,
1235 
        agent_data_in   => agent_data_in_9,
1236 
        agent_data_out  => agent_data_out_9,
1237 
        agent_av_in     => agent_av_in_9,
1238 
        agent_av_out    => agent_av_out_9,
1239 
        agent_full_out  => agent_full_out_9,
1240 
        agent_one_p_out => agent_one_p_out_9,
1241 
        agent_we_in     => agent_we_in_9,
1242 
        agent_empty_out => agent_empty_out_9,
1243 
        agent_one_d_out => agent_one_d_out_9,
1244 
        agent_re_in     => agent_re_in_9
1245 
        -- synthesis translate_off
1246 
        -- pragma translate_off
1247 
        ,
1248 
        debug_out => open,
1249 
        debug_in => (others => '0')
1250 
        -- pragma translate_on
1251 
        -- synthesis translate_on
1252 
        );
1253 
  end generate a9;
1254 
 
1255 
 
1256 
  a10 : if number_of_r4_agents_g > 9 generate
1257 
 
1258 
    agent_10 : hibi_wrapper_r4
1259 
      generic map (
1260 
        id_g                => 11,
1261 
        base_id_g           => 2**id_width_g-1,
1262 
        id_width_g          => id_width_g,
1263 
        addr_width_g        => addr_width_g,
1264 
        data_width_g        => data_width_g,
1265 
        comm_width_g        => comm_width_g,
1266 
        counter_width_g     => counter_width_g,
1267 
        rx_fifo_depth_g     => fifo_depths_c(10),
1268 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(10),
1269 
        tx_fifo_depth_g     => fifo_depths_c(10),
1270 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(10),
1271 
        addr_g              => addr_c(10),
1272 
        prior_g             => agent_priority_10_g,
1273 
        inv_addr_en_g       => 0,
1274 
        max_send_g          => agent_max_send_10_g,
1275 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1276 
        n_cfg_pages_g       => 1,
1277 
        n_time_slots_g      => 0,
1278 
        n_extra_params_g    => 0
1279 
        -- cfg_rom_en_g        => 1
1280 
        )
1281 
      port map (
1282 
        bus_clk      => clk,
1283 
        agent_clk    => clk,
1284 
        bus_sync_clk => clk,
1285 
        agent_sync_clk => clk,
1286 
        rst_n        => rst_n,
1287 
        bus_comm_in  => bus_comm_in,
1288 
        bus_comm_out => bus_comm_out_10,
1289 
        bus_data_in  => bus_data_in,
1290 
        bus_data_out => bus_data_out_10,
1291 
        bus_full_in  => bus_full_in,
1292 
        bus_full_out => bus_full_out_10,
1293 
        bus_lock_in  => bus_lock_in,
1294 
        bus_lock_out => bus_lock_out_10,
1295 
        bus_av_in    => bus_av_in,
1296 
        bus_av_out   => bus_av_out_10,
1297 
 
1298 
        agent_comm_in   => agent_comm_in_10,
1299 
        agent_comm_out  => agent_comm_out_10,
1300 
        agent_data_in   => agent_data_in_10,
1301 
        agent_data_out  => agent_data_out_10,
1302 
        agent_av_in     => agent_av_in_10,
1303 
        agent_av_out    => agent_av_out_10,
1304 
        agent_full_out  => agent_full_out_10,
1305 
        agent_one_p_out => agent_one_p_out_10,
1306 
        agent_we_in     => agent_we_in_10,
1307 
        agent_empty_out => agent_empty_out_10,
1308 
        agent_one_d_out => agent_one_d_out_10,
1309 
        agent_re_in     => agent_re_in_10
1310 
        -- synthesis translate_off
1311 
        -- pragma translate_off
1312 
        ,
1313 
        debug_out => open,
1314 
        debug_in => (others => '0')
1315 
        -- pragma translate_on
1316 
        -- synthesis translate_on
1317 
        );
1318 
  end generate a10;
1319 
 
1320 
 
1321 
  a11 : if number_of_r4_agents_g > 10 generate
1322 
 
1323 
    agent_11 : hibi_wrapper_r4
1324 
      generic map (
1325 
        id_g                => 12,
1326 
        base_id_g           => 2**id_width_g-1,
1327 
        id_width_g          => id_width_g,
1328 
        addr_width_g        => addr_width_g,
1329 
        data_width_g        => data_width_g,
1330 
        comm_width_g        => comm_width_g,
1331 
        counter_width_g     => counter_width_g,
1332 
        rx_fifo_depth_g     => fifo_depths_c(11),
1333 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(11),
1334 
        tx_fifo_depth_g     => fifo_depths_c(11),
1335 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(11),
1336 
        addr_g              => addr_c(11),
1337 
        prior_g             => agent_priority_11_g,
1338 
        inv_addr_en_g       => 0,
1339 
        max_send_g          => agent_max_send_11_g,
1340 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1341 
        n_cfg_pages_g       => 1,
1342 
        n_time_slots_g      => 0,
1343 
        n_extra_params_g    => 0
1344 
        -- cfg_rom_en_g        => 1
1345 
        )
1346 
      port map (
1347 
        bus_clk      => clk,
1348 
        agent_clk    => clk,
1349 
        bus_sync_clk => clk,
1350 
        agent_sync_clk => clk,
1351 
        rst_n        => rst_n,
1352 
        bus_comm_in  => bus_comm_in,
1353 
        bus_comm_out => bus_comm_out_11,
1354 
        bus_data_in  => bus_data_in,
1355 
        bus_data_out => bus_data_out_11,
1356 
        bus_full_in  => bus_full_in,
1357 
        bus_full_out => bus_full_out_11,
1358 
        bus_lock_in  => bus_lock_in,
1359 
        bus_lock_out => bus_lock_out_11,
1360 
        bus_av_in    => bus_av_in,
1361 
        bus_av_out   => bus_av_out_11,
1362 
 
1363 
        agent_comm_in   => agent_comm_in_11,
1364 
        agent_comm_out  => agent_comm_out_11,
1365 
        agent_data_in   => agent_data_in_11,
1366 
        agent_data_out  => agent_data_out_11,
1367 
        agent_av_in     => agent_av_in_11,
1368 
        agent_av_out    => agent_av_out_11,
1369 
        agent_full_out  => agent_full_out_11,
1370 
        agent_one_p_out => agent_one_p_out_11,
1371 
        agent_we_in     => agent_we_in_11,
1372 
        agent_empty_out => agent_empty_out_11,
1373 
        agent_one_d_out => agent_one_d_out_11,
1374 
        agent_re_in     => agent_re_in_11
1375 
        -- synthesis translate_off
1376 
        -- pragma translate_off
1377 
        ,
1378 
        debug_out => open,
1379 
        debug_in => (others => '0')
1380 
        -- pragma translate_on
1381 
        -- synthesis translate_on
1382 
        );
1383 
  end generate a11;
1384 
 
1385 
 
1386 
  a12 : if number_of_r4_agents_g > 11 generate
1387 
 
1388 
    agent_12 : hibi_wrapper_r4
1389 
      generic map (
1390 
        id_g                => 13,
1391 
        base_id_g           => 2**id_width_g-1,
1392 
        id_width_g          => id_width_g,
1393 
        addr_width_g        => addr_width_g,
1394 
        data_width_g        => data_width_g,
1395 
        comm_width_g        => comm_width_g,
1396 
        counter_width_g     => counter_width_g,
1397 
        rx_fifo_depth_g     => fifo_depths_c(12),
1398 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(12),
1399 
        tx_fifo_depth_g     => fifo_depths_c(12),
1400 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(12),
1401 
        addr_g              => addr_c(12),
1402 
        prior_g             => agent_priority_12_g,
1403 
        inv_addr_en_g       => 0,
1404 
        max_send_g          => agent_max_send_12_g,
1405 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1406 
        n_cfg_pages_g       => 1,
1407 
        n_time_slots_g      => 0,
1408 
        n_extra_params_g    => 0
1409 
        -- cfg_rom_en_g        => 1
1410 
        )
1411 
      port map (
1412 
        bus_clk      => clk,
1413 
        agent_clk    => clk,
1414 
        bus_sync_clk => clk,
1415 
        agent_sync_clk => clk,
1416 
        rst_n        => rst_n,
1417 
        bus_comm_in  => bus_comm_in,
1418 
        bus_comm_out => bus_comm_out_12,
1419 
        bus_data_in  => bus_data_in,
1420 
        bus_data_out => bus_data_out_12,
1421 
        bus_full_in  => bus_full_in,
1422 
        bus_full_out => bus_full_out_12,
1423 
        bus_lock_in  => bus_lock_in,
1424 
        bus_lock_out => bus_lock_out_12,
1425 
        bus_av_in    => bus_av_in,
1426 
        bus_av_out   => bus_av_out_12,
1427 
 
1428 
        agent_comm_in   => agent_comm_in_12,
1429 
        agent_comm_out  => agent_comm_out_12,
1430 
        agent_data_in   => agent_data_in_12,
1431 
        agent_data_out  => agent_data_out_12,
1432 
        agent_av_in     => agent_av_in_12,
1433 
        agent_av_out    => agent_av_out_12,
1434 
        agent_full_out  => agent_full_out_12,
1435 
        agent_one_p_out => agent_one_p_out_12,
1436 
        agent_we_in     => agent_we_in_12,
1437 
        agent_empty_out => agent_empty_out_12,
1438 
        agent_one_d_out => agent_one_d_out_12,
1439 
        agent_re_in     => agent_re_in_12
1440 
        -- synthesis translate_off
1441 
        -- pragma translate_off
1442 
        ,
1443 
        debug_out => open,
1444 
        debug_in => (others => '0')
1445 
        -- pragma translate_on
1446 
        -- synthesis translate_on
1447 
        );
1448 
  end generate a12;
1449 
 
1450 
  a13 : if number_of_r4_agents_g > 12 generate
1451 
 
1452 
    agent_13 : hibi_wrapper_r4
1453 
      generic map (
1454 
        id_g                => 14,
1455 
        base_id_g           => 2**id_width_g-1,
1456 
        id_width_g          => id_width_g,
1457 
        addr_width_g        => addr_width_g,
1458 
        data_width_g        => data_width_g,
1459 
        comm_width_g        => comm_width_g,
1460 
        counter_width_g     => counter_width_g,
1461 
        rx_fifo_depth_g     => fifo_depths_c(13),
1462 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(13),
1463 
        tx_fifo_depth_g     => fifo_depths_c(13),
1464 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(13),
1465 
        addr_g              => addr_c(13),
1466 
        prior_g             => agent_priority_13_g,
1467 
        inv_addr_en_g       => 0,
1468 
        max_send_g          => agent_max_send_13_g,
1469 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1470 
        n_cfg_pages_g       => 1,
1471 
        n_time_slots_g      => 0,
1472 
        n_extra_params_g    => 0
1473 
        -- cfg_rom_en_g        => 1
1474 
        )
1475 
      port map (
1476 
        bus_clk      => clk,
1477 
        agent_clk    => clk,
1478 
        bus_sync_clk => clk,
1479 
        agent_sync_clk => clk,
1480 
        rst_n        => rst_n,
1481 
        bus_comm_in  => bus_comm_in,
1482 
        bus_comm_out => bus_comm_out_13,
1483 
        bus_data_in  => bus_data_in,
1484 
        bus_data_out => bus_data_out_13,
1485 
        bus_full_in  => bus_full_in,
1486 
        bus_full_out => bus_full_out_13,
1487 
        bus_lock_in  => bus_lock_in,
1488 
        bus_lock_out => bus_lock_out_13,
1489 
        bus_av_in    => bus_av_in,
1490 
        bus_av_out   => bus_av_out_13,
1491 
 
1492 
        agent_comm_in   => agent_comm_in_13,
1493 
        agent_comm_out  => agent_comm_out_13,
1494 
        agent_data_in   => agent_data_in_13,
1495 
        agent_data_out  => agent_data_out_13,
1496 
        agent_av_in     => agent_av_in_13,
1497 
        agent_av_out    => agent_av_out_13,
1498 
        agent_full_out  => agent_full_out_13,
1499 
        agent_one_p_out => agent_one_p_out_13,
1500 
        agent_we_in     => agent_we_in_13,
1501 
        agent_empty_out => agent_empty_out_13,
1502 
        agent_one_d_out => agent_one_d_out_13,
1503 
        agent_re_in     => agent_re_in_13
1504 
        -- synthesis translate_off
1505 
        -- pragma translate_off
1506 
        ,
1507 
        debug_out => open,
1508 
        debug_in => (others => '0')
1509 
        -- pragma translate_on
1510 
        -- synthesis translate_on
1511 
        );
1512 
  end generate a13;
1513 
 
1514 
 
1515 
  a14 : if number_of_r4_agents_g > 13 generate
1516 
 
1517 
    agent_14 : hibi_wrapper_r4
1518 
      generic map (
1519 
        id_g                => 15,
1520 
        base_id_g           => 2**id_width_g-1,
1521 
        id_width_g          => id_width_g,
1522 
        addr_width_g        => addr_width_g,
1523 
        data_width_g        => data_width_g,
1524 
        comm_width_g        => comm_width_g,
1525 
        counter_width_g     => counter_width_g,
1526 
        rx_fifo_depth_g     => fifo_depths_c(14),
1527 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(14),
1528 
        tx_fifo_depth_g     => fifo_depths_c(14),
1529 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(14),
1530 
        addr_g              => addr_c(14),
1531 
        prior_g             => agent_priority_14_g,
1532 
        inv_addr_en_g       => 0,
1533 
        max_send_g          => agent_max_send_14_g,
1534 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1535 
        n_cfg_pages_g       => 1,
1536 
        n_time_slots_g      => 0,
1537 
        n_extra_params_g    => 0
1538 
        -- cfg_rom_en_g        => 1
1539 
        )
1540 
      port map (
1541 
        bus_clk      => clk,
1542 
        agent_clk    => clk,
1543 
        bus_sync_clk => clk,
1544 
        agent_sync_clk => clk,
1545 
        rst_n        => rst_n,
1546 
        bus_comm_in  => bus_comm_in,
1547 
        bus_comm_out => bus_comm_out_14,
1548 
        bus_data_in  => bus_data_in,
1549 
        bus_data_out => bus_data_out_14,
1550 
        bus_full_in  => bus_full_in,
1551 
        bus_full_out => bus_full_out_14,
1552 
        bus_lock_in  => bus_lock_in,
1553 
        bus_lock_out => bus_lock_out_14,
1554 
        bus_av_in    => bus_av_in,
1555 
        bus_av_out   => bus_av_out_14,
1556 
 
1557 
        agent_comm_in   => agent_comm_in_14,
1558 
        agent_comm_out  => agent_comm_out_14,
1559 
        agent_data_in   => agent_data_in_14,
1560 
        agent_data_out  => agent_data_out_14,
1561 
        agent_av_in     => agent_av_in_14,
1562 
        agent_av_out    => agent_av_out_14,
1563 
        agent_full_out  => agent_full_out_14,
1564 
        agent_one_p_out => agent_one_p_out_14,
1565 
        agent_we_in     => agent_we_in_14,
1566 
        agent_empty_out => agent_empty_out_14,
1567 
        agent_one_d_out => agent_one_d_out_14,
1568 
        agent_re_in     => agent_re_in_14
1569 
        -- synthesis translate_off
1570 
        -- pragma translate_off
1571 
        ,
1572 
        debug_out => open,
1573 
        debug_in => (others => '0')
1574 
        -- pragma translate_on
1575 
        -- synthesis translate_on
1576 
        );
1577 
  end generate a14;
1578 
 
1579 
 
1580 
  a15 : if number_of_r4_agents_g > 14 generate
1581 
 
1582 
    agent_15 : hibi_wrapper_r4
1583 
      generic map (
1584 
        id_g                => 16,
1585 
        base_id_g           => 2**id_width_g-1,
1586 
        id_width_g          => id_width_g,
1587 
        addr_width_g        => addr_width_g,
1588 
        data_width_g        => data_width_g,
1589 
        comm_width_g        => comm_width_g,
1590 
        counter_width_g     => counter_width_g,
1591 
        rx_fifo_depth_g     => fifo_depths_c(15),
1592 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(15),
1593 
        tx_fifo_depth_g     => fifo_depths_c(15),
1594 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(15),
1595 
        addr_g              => addr_c(15),
1596 
        prior_g             => agent_priority_15_g,
1597 
        inv_addr_en_g       => 0,
1598 
        max_send_g          => agent_max_send_15_g,
1599 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1600 
        n_cfg_pages_g       => 1,
1601 
        n_time_slots_g      => 0,
1602 
        n_extra_params_g    => 0
1603 
        -- cfg_rom_en_g        => 1
1604 
        )
1605 
      port map (
1606 
        bus_clk      => clk,
1607 
        agent_clk    => clk,
1608 
        bus_sync_clk => clk,
1609 
        agent_sync_clk => clk,
1610 
        rst_n        => rst_n,
1611 
        bus_comm_in  => bus_comm_in,
1612 
        bus_comm_out => bus_comm_out_15,
1613 
        bus_data_in  => bus_data_in,
1614 
        bus_data_out => bus_data_out_15,
1615 
        bus_full_in  => bus_full_in,
1616 
        bus_full_out => bus_full_out_15,
1617 
        bus_lock_in  => bus_lock_in,
1618 
        bus_lock_out => bus_lock_out_15,
1619 
        bus_av_in    => bus_av_in,
1620 
        bus_av_out   => bus_av_out_15,
1621 
 
1622 
        agent_comm_in   => agent_comm_in_15,
1623 
        agent_comm_out  => agent_comm_out_15,
1624 
        agent_data_in   => agent_data_in_15,
1625 
        agent_data_out  => agent_data_out_15,
1626 
        agent_av_in     => agent_av_in_15,
1627 
        agent_av_out    => agent_av_out_15,
1628 
        agent_full_out  => agent_full_out_15,
1629 
        agent_one_p_out => agent_one_p_out_15,
1630 
        agent_we_in     => agent_we_in_15,
1631 
        agent_empty_out => agent_empty_out_15,
1632 
        agent_one_d_out => agent_one_d_out_15,
1633 
        agent_re_in     => agent_re_in_15
1634 
        -- synthesis translate_off
1635 
        -- pragma translate_off
1636 
        ,
1637 
        debug_out => open,
1638 
        debug_in => (others => '0')
1639 
        -- pragma translate_on
1640 
        -- synthesis translate_on
1641 
        );
1642 
  end generate a15;
1643 
 
1644 
  a16 : if number_of_r4_agents_g > 15 generate
1645 
 
1646 
    agent_16 : hibi_wrapper_r4
1647 
      generic map (
1648 
        id_g                => 17,
1649 
        base_id_g           => 2**id_width_g-1,
1650 
        id_width_g          => id_width_g,
1651 
        addr_width_g        => addr_width_g,
1652 
        data_width_g        => data_width_g,
1653 
        comm_width_g        => comm_width_g,
1654 
        counter_width_g     => counter_width_g,
1655 
        rx_fifo_depth_g     => fifo_depths_c(16),
1656 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(16),
1657 
        tx_fifo_depth_g     => fifo_depths_c(16),
1658 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(16),
1659 
        addr_g              => addr_c(16),
1660 
        prior_g             => agent_priority_16_g,
1661 
        inv_addr_en_g       => 0,
1662 
        max_send_g          => agent_max_send_16_g,
1663 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1664 
        n_cfg_pages_g       => 1,
1665 
        n_time_slots_g      => 0,
1666 
        n_extra_params_g    => 0
1667 
        -- cfg_rom_en_g        => 1
1668 
        )
1669 
      port map (
1670 
        bus_clk      => clk,
1671 
        agent_clk    => clk,
1672 
        bus_sync_clk => clk,
1673 
        agent_sync_clk => clk,
1674 
        rst_n        => rst_n,
1675 
        bus_comm_in  => bus_comm_in,
1676 
        bus_comm_out => bus_comm_out_16,
1677 
        bus_data_in  => bus_data_in,
1678 
        bus_data_out => bus_data_out_16,
1679 
        bus_full_in  => bus_full_in,
1680 
        bus_full_out => bus_full_out_16,
1681 
        bus_lock_in  => bus_lock_in,
1682 
        bus_lock_out => bus_lock_out_16,
1683 
        bus_av_in    => bus_av_in,
1684 
        bus_av_out   => bus_av_out_16,
1685 
 
1686 
        agent_comm_in   => agent_comm_in_16,
1687 
        agent_comm_out  => agent_comm_out_16,
1688 
        agent_data_in   => agent_data_in_16,
1689 
        agent_data_out  => agent_data_out_16,
1690 
        agent_av_in     => agent_av_in_16,
1691 
        agent_av_out    => agent_av_out_16,
1692 
        agent_full_out  => agent_full_out_16,
1693 
        agent_one_p_out => agent_one_p_out_16,
1694 
        agent_we_in     => agent_we_in_16,
1695 
        agent_empty_out => agent_empty_out_16,
1696 
        agent_one_d_out => agent_one_d_out_16,
1697 
        agent_re_in     => agent_re_in_16
1698 
        -- synthesis translate_off
1699 
        -- pragma translate_off
1700 
        ,
1701 
        debug_out => open,
1702 
        debug_in => (others => '0')
1703 
        -- pragma translate_on
1704 
        -- synthesis translate_on
1705 
        );
1706 
  end generate a16;
1707 
 
1708 
  a17 : if number_of_r3_agents_g > 0 generate
1709 
 
1710 
    agent_17 : hibi_wrapper_r3
1711 
      generic map (
1712 
        id_g                => number_of_r4_agents_g + 2, --because indexing starts from 2...
1713 
        base_id_g           => 2**id_width_g-1,
1714 
        id_width_g          => id_width_g,
1715 
        addr_width_g        => addr_width_g,
1716 
        data_width_g        => data_width_g,
1717 
        comm_width_g        => comm_width_g,
1718 
        counter_width_g     => counter_width_g,
1719 
        rx_fifo_depth_g     => fifo_depths_c(17),
1720 
        rx_msg_fifo_depth_g => msg_fifo_depths_c(17),
1721 
        tx_fifo_depth_g     => fifo_depths_c(17),
1722 
        tx_msg_fifo_depth_g => msg_fifo_depths_c(17),
1723 
        addr_g              => addr_c(17),
1724 
        prior_g             => number_of_r4_agents_g + 1, -- to prevent empty priority numbers.
1725 
        inv_addr_en_g       => 0,
1726 
        max_send_g          => agent_max_send_17_g,
1727 
        n_agents_g          => number_of_r4_agents_g + number_of_r3_agents_g,
1728 
        n_cfg_pages_g       => 1,
1729 
        n_time_slots_g      => 0,
1730 
        n_extra_params_g    => 0
1731 
        -- cfg_rom_en_g        => 1
1732 
        )
1733 
      port map (
1734 
        bus_clk      => clk,
1735 
        agent_clk    => clk,
1736 
        bus_sync_clk => clk,
1737 
        agent_sync_clk => clk,
1738 
        rst_n        => rst_n,
1739 
        bus_comm_in  => bus_comm_in,
1740 
        bus_comm_out => bus_comm_out_17,
1741 
        bus_data_in  => bus_data_in,
1742 
        bus_data_out => bus_data_out_17,
1743 
        bus_full_in  => bus_full_in,
1744 
        bus_full_out => bus_full_out_17,
1745 
        bus_lock_in  => bus_lock_in,
1746 
        bus_lock_out => bus_lock_out_17,
1747 
        bus_av_in    => bus_av_in,
1748 
        bus_av_out   => bus_av_out_17,
1749 
 
1750 
        agent_addr_in   => agent_addr_in_17,
1751 
        agent_addr_out  => agent_addr_out_17,
1752 
        agent_comm_in   => agent_comm_in_17,
1753 
        agent_comm_out  => agent_comm_out_17,
1754 
        agent_data_in   => agent_data_in_17,
1755 
        agent_data_out  => agent_data_out_17,
1756 
        agent_full_out  => agent_full_out_17,
1757 
        agent_one_p_out => agent_one_p_out_17,
1758 
        agent_we_in     => agent_we_in_17,
1759 
        agent_empty_out => agent_empty_out_17,
1760 
        agent_one_d_out => agent_one_d_out_17,
1761 
        agent_re_in     => agent_re_in_17,
1762 
 
1763 
        agent_msg_data_in => agent_msg_data_in_17,
1764 
        agent_msg_addr_in => agent_msg_addr_in_17,
1765 
        agent_msg_comm_in => agent_msg_comm_in_17,
1766 
        agent_msg_we_in   => agent_msg_we_in_17,
1767 
        agent_msg_re_in   => agent_msg_re_in_17,
1768 
        agent_msg_data_out  => agent_msg_data_out_17,
1769 
        agent_msg_addr_out  => agent_msg_addr_out_17,
1770 
        agent_msg_comm_out  => agent_msg_comm_out_17,
1771 
        agent_msg_empty_out => agent_msg_empty_out_17,
1772 
        agent_msg_one_d_out => agent_msg_one_d_out_17,
1773 
        agent_msg_full_out  => agent_msg_full_out_17,
1774 
        agent_msg_one_p_out => agent_msg_one_p_out_17
1775 
        );
1776 
  end generate a17;
1777 
 
1778 
  -- only one agent
1779 
  s2 : if number_of_r4_agents_g < 2 generate
1780 
    bus_data_out_2 <= (others => '0');
1781 
    bus_comm_out_2 <= (others => '0');
1782 
    bus_lock_out_2 <= '0';
1783 
    bus_av_out_2   <= '0';
1784 
    bus_full_out_2 <= '0';
1785 
    agent_data_out_2 <= (others => '0');
1786 
  end generate s2;
1787 
 
1788 
  s3 : if number_of_r4_agents_g < 3 generate
1789 
    bus_data_out_3 <= (others => '0');
1790 
    bus_comm_out_3 <= (others => '0');
1791 
    bus_lock_out_3 <= '0';
1792 
    bus_av_out_3   <= '0';
1793 
    bus_full_out_3 <= '0';
1794 
    agent_data_out_3 <= (others => '0');
1795 
  end generate s3;
1796 
 
1797 
  s4 : if number_of_r4_agents_g < 4 generate
1798 
    bus_data_out_4 <= (others => '0');
1799 
    bus_comm_out_4 <= (others => '0');
1800 
    bus_lock_out_4 <= '0';
1801 
    bus_av_out_4   <= '0';
1802 
    bus_full_out_4 <= '0';
1803 
    agent_data_out_4 <= (others => '0');
1804 
  end generate s4;
1805 
 
1806 
  s5 : if number_of_r4_agents_g < 5 generate
1807 
    bus_data_out_5 <= (others => '0');
1808 
    bus_comm_out_5 <= (others => '0');
1809 
    bus_lock_out_5 <= '0';
1810 
    bus_av_out_5   <= '0';
1811 
    bus_full_out_5 <= '0';
1812 
    agent_data_out_5 <= (others => '0');
1813 
  end generate s5;
1814 
 
1815 
  s6 : if number_of_r4_agents_g < 6 generate
1816 
    bus_data_out_6 <= (others => '0');
1817 
    bus_comm_out_6 <= (others => '0');
1818 
    bus_lock_out_6 <= '0';
1819 
    bus_av_out_6   <= '0';
1820 
    bus_full_out_6 <= '0';
1821 
    agent_data_out_6 <= (others => '0');
1822 
  end generate s6;
1823 
 
1824 
  s7 : if number_of_r4_agents_g < 7 generate
1825 
    bus_data_out_7 <= (others => '0');
1826 
    bus_comm_out_7 <= (others => '0');
1827 
    bus_lock_out_7 <= '0';
1828 
    bus_av_out_7   <= '0';
1829 
    bus_full_out_7 <= '0';
1830 
    agent_data_out_7 <= (others => '0');
1831 
  end generate s7;
1832 
 
1833 
  s8 : if number_of_r4_agents_g < 8 generate
1834 
    bus_data_out_8 <= (others => '0');
1835 
    bus_comm_out_8 <= (others => '0');
1836 
    bus_lock_out_8 <= '0';
1837 
    bus_av_out_8   <= '0';
1838 
    bus_full_out_8 <= '0';
1839 
    agent_data_out_8 <= (others => '0');
1840 
  end generate s8;
1841 
 
1842 
  s9 : if number_of_r4_agents_g < 9 generate
1843 
    bus_data_out_9 <= (others => '0');
1844 
    bus_comm_out_9 <= (others => '0');
1845 
    bus_lock_out_9 <= '0';
1846 
    bus_av_out_9   <= '0';
1847 
    bus_full_out_9 <= '0';
1848 
    agent_data_out_9 <= (others => '0');
1849 
  end generate s9;
1850 
 
1851 
  s10 : if number_of_r4_agents_g < 10 generate
1852 
    bus_data_out_10 <= (others => '0');
1853 
    bus_comm_out_10 <= (others => '0');
1854 
    bus_lock_out_10 <= '0';
1855 
    bus_av_out_10   <= '0';
1856 
    bus_full_out_10 <= '0';
1857 
    agent_data_out_10 <= (others => '0');
1858 
  end generate s10;
1859 
 
1860 
  s11 : if number_of_r4_agents_g < 11 generate
1861 
    bus_data_out_11 <= (others => '0');
1862 
    bus_comm_out_11 <= (others => '0');
1863 
    bus_lock_out_11 <= '0';
1864 
    bus_av_out_11   <= '0';
1865 
    bus_full_out_11 <= '0';
1866 
    agent_data_out_11 <= (others => '0');
1867 
  end generate s11;
1868 
 
1869 
  s12 : if number_of_r4_agents_g < 12 generate
1870 
    bus_data_out_12 <= (others => '0');
1871 
    bus_comm_out_12 <= (others => '0');
1872 
    bus_lock_out_12 <= '0';
1873 
    bus_av_out_12   <= '0';
1874 
    bus_full_out_12 <= '0';
1875 
    agent_data_out_12 <= (others => '0');
1876 
  end generate s12;
1877 
 
1878 
  s13 : if number_of_r4_agents_g < 13 generate
1879 
    bus_data_out_13 <= (others => '0');
1880 
    bus_comm_out_13 <= (others => '0');
1881 
    bus_lock_out_13 <= '0';
1882 
    bus_av_out_13   <= '0';
1883 
    bus_full_out_13 <= '0';
1884 
    agent_data_out_13 <= (others => '0');
1885 
  end generate s13;
1886 
 
1887 
  s14 : if number_of_r4_agents_g < 14 generate
1888 
    bus_data_out_14 <= (others => '0');
1889 
    bus_comm_out_14 <= (others => '0');
1890 
    bus_lock_out_14 <= '0';
1891 
    bus_av_out_14   <= '0';
1892 
    bus_full_out_14 <= '0';
1893 
    agent_data_out_14 <= (others => '0');
1894 
  end generate s14;
1895 
 
1896 
  s15 : if number_of_r4_agents_g < 15 generate
1897 
    bus_data_out_15 <= (others => '0');
1898 
    bus_comm_out_15 <= (others => '0');
1899 
    bus_lock_out_15 <= '0';
1900 
    bus_av_out_15   <= '0';
1901 
    bus_full_out_15 <= '0';
1902 
    agent_data_out_15 <= (others => '0');
1903 
  end generate s15;
1904 
 
1905 
  s16 : if number_of_r4_agents_g < 16 generate
1906 
    bus_data_out_16 <= (others => '0');
1907 
    bus_comm_out_16 <= (others => '0');
1908 
    bus_lock_out_16 <= '0';
1909 
    bus_av_out_16   <= '0';
1910 
    bus_full_out_16 <= '0';
1911 
    agent_data_out_16 <= (others => '0');
1912 
  end generate s16;
1913 
 
1914 
  s17 : if number_of_r3_agents_g < 1 generate
1915 
    bus_data_out_17 <= (others => '0');
1916 
    bus_comm_out_17 <= (others => '0');
1917 
    bus_lock_out_17 <= '0';
1918 
    bus_av_out_17   <= '0';
1919 
    bus_full_out_17 <= '0';
1920 
    agent_msg_data_out_17 <= (others => '0');
1921 
  end generate s17;
1922 
 
1923 
  -- continuous assignments
1924 
  bus_comm_in <= bus_comm_out_1 or bus_comm_out_2 or bus_comm_out_3
1925 
                 or bus_comm_out_4 or bus_comm_out_5 or bus_comm_out_6
1926 
                 or bus_comm_out_7 or bus_comm_out_8 or bus_comm_out_9
1927 
                 or bus_comm_out_10 or bus_comm_out_11 or bus_comm_out_12
1928 
                 or bus_comm_out_13 or bus_comm_out_14 or bus_comm_out_15
1929 
                 or bus_comm_out_16 or bus_comm_out_17;  -- after period/3;
1930 
  bus_av_in <= bus_av_out_1 or bus_av_out_2
1931 
               or bus_av_out_3 or bus_av_out_4
1932 
               or bus_av_out_5 or bus_av_out_6
1933 
               or bus_av_out_7 or bus_av_out_8
1934 
               or bus_av_out_9 or bus_av_out_10
1935 
               or bus_av_out_11 or bus_av_out_12
1936 
               or bus_av_out_13 or bus_av_out_14
1937 
               or bus_av_out_15 or bus_av_out_16
1938 
               or bus_av_out_17;        -- after period/3;
1939 
  bus_lock_in <= bus_lock_out_1 or bus_lock_out_2 or bus_lock_out_3
1940 
                 or bus_lock_out_4 or bus_lock_out_5 or bus_lock_out_6
1941 
                 or bus_lock_out_7 or bus_lock_out_8 or bus_lock_out_9
1942 
                 or bus_lock_out_10 or bus_lock_out_11 or bus_lock_out_12
1943 
                 or bus_lock_out_13 or bus_lock_out_14 or bus_lock_out_15
1944 
                 or bus_lock_out_16 or bus_lock_out_17;  -- after period/3;
1945 
 
1946 
  bus_full_in <= bus_full_out_1
1947 
                 or bus_full_out_2
1948 
                 or bus_full_out_3
1949 
                 or bus_full_out_4
1950 
                 or bus_full_out_5
1951 
                 or bus_full_out_6
1952 
                 or bus_full_out_7
1953 
                 or bus_full_out_8
1954 
                 or bus_full_out_9
1955 
                 or bus_full_out_10
1956 
                 or bus_full_out_11
1957 
                 or bus_full_out_12
1958 
                 or bus_full_out_13
1959 
                 or bus_full_out_14
1960 
                 or bus_full_out_15
1961 
                 or bus_full_out_16
1962 
                 or bus_full_out_17;     --                after period/3;
1963 
 
1964 
  -- Debug signals OUT
1965 
  debug_bus_full_out <= bus_full_in;
1966 
  debug_bus_comm_out <= bus_comm_in;
1967 
  debug_bus_av_out  <= bus_av_in;
1968 
 
1969 
  --1) wire the wrappers together
1970 
 
1971 
--  hibi_or : process (bus_comm_out_1, bus_comm_out_2, bus_data_out_1, bus_data_out_2)
1972 
--  begin  -- process hibi_or
1973 
  -- logical or for bus data
1974 
--    if bus_comm_out_1 /= "000" or bus_comm_out_2 /= "000"
1975 
--      or bus_comm_out_3 /= "000" or bus_comm_out_4 /= "000"
1976 
--      or bus_comm_out_5 /= "000" or bus_comm_out_6 /= "000"
1977 
--      or bus_comm_out_7 /= "000" or bus_comm_out_8 /= "000" then
1978 
 
1979 
  bus_data_in <= bus_data_out_1 or bus_data_out_2 or bus_data_out_3
1980 
                 or bus_data_out_4 or bus_data_out_5 or bus_data_out_6
1981 
                 or bus_data_out_7 or bus_data_out_8 or bus_data_out_9
1982 
                 or bus_data_out_10 or bus_data_out_11 or bus_data_out_12
1983 
                 or bus_data_out_13 or bus_data_out_14 or bus_data_out_15
1984 
                 or bus_data_out_16 or bus_data_out_17;  -- after period/3;
1985 
--    else
1986 
--      -- tri-state 'z' added only to ease debugging!
1987 
--      bus_data_in <= (others => '0');  -- 'z'    --    after period/3;
1988 
--    end if;
1989 
--  end process hibi_or;
1990 
 
1991 
end structural;
1992 
 

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