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% ------------------------------------------
% List of references
% Soc Interconnection Research Group
% Institute of Digital and Computer Systems
% Tampere University of Technology
% ------------------------------------------
 
% ------------------------------------------
% Created by : Erno Salminen (ES), 07.04.2004
% Modified   :
% ------------------------------------------
 
% ------------------------------------------
% It is best to emacs for editing this file
% because is has a separate bibtex mode which
% gives additional menus for adding new refs.
%
% Do not ever remove any references or modify their
% identification!
% You can still add comments or correct data.
% Be careful when adding  to ref_id! (see below)
% ------------------------------------------
 
% --------------------------
% Example of journal artcile
% --------------------------
% In Latex doc, type \cite{ref_id} to add ref to this record.
% ref_id is of type 
%  = last name of first author, e.g. salminen
%         = two numbers, e.g. 03
%       = 'running number' to distinquish several refs of
%                 one author on a given year, start with a
% use only small case letters and no white spaces, e.g. salminen03a
% Explanations from: http://www.ecst.csuchico.edu/~jacobsd/bib/formats/bibtex.html
% Article{ref_id,
% author = {The name(s) of the author(s), in the format
%           described in the LaTeX book. },
% title = {The work's title, typed as explained in the LaTeX book. },
% journal = {A journal name. Abbreviations are provided for many journals. },
% year = { The year of publication or, for an unpublished work,
%          the year it was written. Generally it should consist
%          of four numerals, such as 1984},
% OPTkey = {Used for alphabetizing, cross referencing, and creating a
%           label when the ``author'' information is missing.
%           This field should not be confused with the key that
%           appears in the cite command and at the beginning
%           of the database entry. },
% OPTvolume = {The volume of a journal or multi-volume book. },
% OPTnumber = {The number of a journal, magazine, technical report,
%              or of a work in a series. An issue of a journal or
%              magazine is usually identified by its volume and
%              number; the organization that issues a technical
%              report usually gives it a number; and sometimes
%              books are given numbers in a namedseries. },
% OPTpages = { One or more page numbers or range of numbers,
%              such as 42--111 or 7,41,73--97
%              or 43+ (the `+' in this last example indicates pages
%              following that don't form a simple range). To
%              make it easier to maintain Scribe-compatible databases,
%              the standard styles convert a single dash (as in 7-33)
%              to the double dash used in TeX to denote number
%              ranges (as in 7--33). },
% OPTmonth = {The month in which the work was published or,
%             for an unpublished work, in which it was written.
%             You should use the standard three-letter abbreviation,
%             as described in Appendix B.1.3 of the LaTeX book. },
% OPTnote = {Any additional information that can help the reader.
%            The first word should be capitalized. },
% OPTannote = {An annotation. It is not used by the standard bibliography
%              styles, but may be used by others that produce
%              an annotated bibliography. } %}
% --------------------------
 
 
@STRING(p-ieee    = "Proc. IEEE")
@STRING(t-comp    = "IEEE Trans. Comput.")
@STRING(t-casii   = "IEEE Trans. Circuits Syst. II")
@STRING(t-casvt   = "IEEE Trans. Circuits Syst. Video Technol.")
@STRING(t-vlsi    = "IEEE Trans. VLSI Syst.")
@STRING(t-comm    = "IEEE Trans. Commun.")
@STRING(t-sp      = "IEEE Trans. Signal Processing")
@STRING(t-pds     = "IEEE Trans. Parallel Distrib. Syst.")
@STRING(t-it      = "IEEE Trans. Inform. Theory")
@STRING(t-assp    = "IEEE Trans. Acoust., Speech, Signal Processing")
@STRING(t-ae      = "IEEE Trans. on Audio and Electroacoustics")
@STRING(t-emc     = "IEEE Trans. Electromagn. Compat.")
@STRING(t-ce      = "IEEE Trans. Consumer Electron.")
@STRING(j-ssc     = "IEEE J. Solid-State Circuits")
@STRING(t-cadics  = "IEEE Trans. Computer-Aided Design of Integrated Circuits
                     and Systems")
@STRING(m-comm    = "IEEE Commun. Mag.")
@STRING(int-comp  = "Integrated Computer-Aided Eng.")
@STRING(m-dtc     = "IEEE Des. Test Comput.")
@STRING(j-acm     = "Journal of the ACM")
@STRING(j-vlsisp  = "Journal of VLSI Signal Processing")
@STRING(sp        = "Signal Processing")
@STRING(rti       = "Real-Time Imaging")
@STRING(iee-com   = "IEE Proceedings - Communications")
@STRING(mc        = "Mathematics of Computation")
@STRING(el        = "Electronics Letters")
@STRING(cssp      = "Circuits, Systems, and Signal Processing")
@STRING(pc        = "Parallel Computing")
@STRING(iscas     = "Proc. IEEE Int. Symposium on Circuits and Systems")
@STRING(icassp    = "Proc. IEEE Int. Conference on Acoustics, Speech, and
                     Signal Processing")
@STRING(cicc      = "Proc. IEEE Custom Integrated Circuits Conference")
@STRING{spe      = "Software - Practice and Experience"}
@STRING{pldi     = "Proc. Conf. on Programming Languages Design and Implementation"}
 
% Ernon lis�yksi�
@STRING{kap      ="Kluwer Academic Publishers"}
@STRING{tresoc   ="Intl. Symposium on Soc"}
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% AAA
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%Ahmad, B.; Erdogan, A.T.; Khawam, S.;
%Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
%Adaptive Hardware and Systems, 2006. AHS 2006. First NASA/ESA Conference on
%15-18 June 2006 Page(s):405 - 411
@InProceedings{ahmad06,
  author =       {B. Ahmad and  A.T. Erdogan and S. Khawam},
  title =        {Architecture of a Dynamically Reconfigurable {NoC} for Adaptive Reconfigurable {MPSoC}},
  booktitle =    {AHS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {405--411},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%K. Anjo, Y. Yamada, M. Koibuchi, A. Jouraku, H. Amano,
%BLACK-BUS: a new data-transfer technique using local address on networks-on-chips,
%In. Proc.  18th International Parallel and Distributed Processing Symposium (IPDPS '04),
%April 26-30, 2004, pp. 10 - 17.
@InProceedings{anjo04,
  author =       {K. Anjo and Y. Yamada and M. Koibuchi and A. Jouraku and H. Amano},
  title =        {BLACK-BUS: a new data-transfer technique using local address on networks-on-chips},
  booktitle =    {IPDPS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {10--17},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Andriahantenaina, A. et al.:
%SPIN: a scalable, packet switched, on-chip micro-network.
%In Proc. of DATE (2003) 70-73
%paukap�� on kirjoittanut oman nimens� v��rin, t�� on nyt (sic)
@InProceedings{adriahantenaina03,
  author =       {Adrijean Adriahantenaina and Herve Charlery and Alain Greiner and Laurent Mortiez and Cesar Albenes Zeferino},
  title =        {{SPIN}: a scalable, packet switched, on-chip micro-network},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {70--73},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Munich, Germany},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {greiner03} Andriahatenenaina, A., Greiner, A.:
%  Micro-network for SoC: Implementation of 32-port SPIN Network. In
%  proc. DATE (2003) 11128-11129
@InProceedings{andriahantenaina03_n,
  author =       {Adrijean Andriahantenaina and Alain Greiner},
  title =        {Micro-Network for {SoC}: Implementation of a 32-Port {SPIN} network},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1128--1129},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Munich, Germany},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Ahonen, T.; Nurmi, J.;
%Integration of a NOC-based multimedia processing platform
%Field Programmable Logic and Applications, 2005. International Conference on
%24-26 Aug. 2005 Page(s):606 - 611
@InProceedings{ahonen06,
  author =       {T. Ahonen and J. Nurmi},
  title =        {Integration of a {NOC-based} multimedia processing platform},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {606--611},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus
%Ainsworth, T.W.; Pinkston, T.M., NOCS, May 2007,
%Page(s): 18-29
@InProceedings{ainsworth07,
  author =       {T.W. Ainsworth and T.M. Pinkston},
  title =        {On Characterizing Performance of the {Cell Broadband Engine Element Interconnect Bus}},
  booktitle =    {NOCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {18--29},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%On the credibility of manet simulations
%Andel, T.R.; Yasinsac, A.;
%Computer
%Volume 39,  Issue 7,  July 2006 Page(s):48 - 54
@Article{andel06,
  author =       {T.R. Andel and A. Yasinsac},
  title =        {On the credibility of manet simulations},
  journal =      {IEEE Computer},
  year =         {2006},
  OPTkey =       {},
  volume =       {39},
  number =       {7},
  pages =        {48--54},
  month =        {Jul.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {amba99} ARM Limited: AMBA Specification Rev 2.0. (1999)
@Manual{amba99,
  title =        {AMBA Specification},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {{Arm Limited}},
  OPTaddress =   {},
  edition =      {Rev. 2.0.},
  OPTmonth =     {},
  year =         {1999},
  OPTnote =      {ARM IHI 0011A},
  OPTannote =    {}
}
 
 
 
%F. Angiolini, P. Meloni, D. Bertozzi, L. Benini, S. Carta, L. Raffo,
%Networks on Chips: A Synthesis Perspective,
%Proceedings of the Parallel Computing (ParCo) Conference 2005, M�laga, Spain, Sep 13-16, 2005 (
@InProceedings{angiolini05,
  author =       {F. Angiolini and P. Meloni and D. Bertozzi and L. Benini and S. Carta and L. Raffo},
  title =        {Networks on Chips: A Synthesis Perspective},
  booktitle =    {ParCo},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Malaga, Spain},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%F. Angiolini, P. Meloni, S. Carta, L. Benini, L.   Raffo,
%Contrasting a NoC and a Traditional Interconnect Fabric with Layout Awareness,
%Design, Automation and Test in Europe (DATE), 06-10 March 2006, Vol. 1, pp. 1- 6.
@InProceedings{angiolini06,
  author =       {F. Angiolini and P. Meloni and S. Carta and L. Benini and L. Raffo},
  title =        {Contrasting a {NoC} and a Traditional Interconnect Fabric with Layout Awareness},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1--6},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {angiolini07} Angiolini, F., Meloni, P., Carta, S.M., Raffo, L., Benini, L.:
% A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs,
% IEEE Trans.  Computer-Aided
%  Design of Integrated Circuits and Systems, March 2007, 26, (3), pp.
%  421-434
 
@Article{angiolini07,
  author =       {F. Angiolini and P. Meloni and S.M. Carta  and L.  Raffo and L. Benini},
  title =        {A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for {MPSoCs}},
  journal =      t-cadics,
  year =         {2007},
  OPTkey =       {},
  volume =       {26},
  number =       {3},
  pages =        {421--434},
  month =        {Mar.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%
@Manual{axi03,
  title =        {AMBA AXI Protocol Sepcification},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {{Arm Limited}},
  OPTaddress =   {},
  edition =      {Revision r0p0},
  OPTmonth =     {},
  year =         {2003},
  OPTnote =      {ARM IHI 0022A},
  OPTannote =    {}
}
 
 
 
 
 
 
@InProceedings{amdahl67,
  author =       {Gene M. Amdahl},
  title =        {Validity of single processor approach to achieving large scale computing capcabilities},
  booktitle =    {AFIPS Spring Joint Computer Conference},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {483--485},
  year =         {1967},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  publisher = {Thompson Books},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {arm03} ARM Limited: ARM7 Thumb Family Flyer. (2003)
@Manual{arm03,
  title =        {ARM7 Thumb Family Flyer},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {{Arm Limited}},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  year =         {2003},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Tero Arpinen, Petri Kukkala, Erno Salminen, Marko H�nnik�inen, Timo D. H�m�l�inen,
%Configurable Multiprocessor Platform with RTOS for Distributed Execution of UML 2.0 Designed Applications,
%9th Design, Automation and Test in Europe Conference (DATE 2006),
%Munich, Germany, March 6-10, 2006, pp. 1324-1329.
@InProceedings{arpinen06,
  author =       {Tero Arpinen and Petri Kukkala and Erno Salminen and M. H\"annik\"ainen and T. H\"am\"al\"ainen},
  title =        {Configurable Multiprocessor Platform with {RTOS} for Distributed Execution of {UML 2.0} Designed Applications},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1324--1329},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Misc{arteris05,
  OPTkey =       {},
  author =       {{Arteris S.A.}},
  title =        {A comparison of Network-on-Chip and Busses},
  howpublished = {white paper},
  OPTmonth =     {},
  year =         {2005},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% BBB
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%A. Baghdadi, W.O. Cesario, A.A. Jerraya, N.-E. Zergainoh,
%Combining a performance estimation methodology with a hardware/software codesign flow supporting multiprocessor systems,
% IEEE TSE, Vol. 28, Iss. 9, Sep. 2002, pp. 822-831.
@Article{baghdadi02,
  author =       {A. Baghdadi and W.O. Cesario and A.A. Jerraya and N.-E. Zergainoh},
  title =        {Combining a performance estimation methodology with a hardware/software codesign flow supporting multiprocessor systems},
  journal =      {IEEE Trans. Software Engineering},
  year =         {2002},
  OPTkey =       {},
  volume =       {28},
  number =       {9},
  pages =        {822--831},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@Article{bailey91,
  author =       {David H. Bailey},
  title =        {Twelve Ways to Fool the Masses When Giving Performance Results on Parallel Computers},
  journal =      {Supercomputing Review},
  year =         {1991},
  OPTkey =       {},
  volume =       {4},
  number =       {8},
  pages =        {54--57},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%J. Balachandran, S. Brebels, G. Carchon, M. Kuijk, Walter De Raedt,  B.K.J.C. Nauwelaers, E. Beyne,
%Wafer-level package interconnect options,
%IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 14, Iss. 6,  June 2006, pp. 654 - 659.
@Article{balachandran06,
  author =       {J. Balachandran and S. Brebels and G. Carchon and M. Kuijk and Walter De Raedt and  B.K.J.C. Nauwelaers and E. Beyne},
  title =        {Wafer-level package interconnect options},
  journal =      t-vlsi,
  year =         {2006},
  OPTkey =       {},
  volume =       {14},
  number =       {6},
  pages =        {654--659},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
% A Power and Energy Exploration of Network-on-Chip Architectures
%Banerjee, A.; Mullins, R.; Moore, S.;
%Networks-on-Chip, 2007. NOCS 2007. First International Symposium on
%7-9 May 2007 Page(s):163 - 172
@InProceedings{banerjee07,
  author =       {A. Banerjee and R. Mullins and S. Moore},
  title =        {A Power and Energy Exploration of Network-on-Chip Architectures},
  booktitle =    {NOCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {163--172},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Richard S. Barr , Bruce L. Golden , James P. Kelly , Mauricio G. C. Resende,  and William R. Stewart Jr.,
%Designing and reporting on computational experiments with heuristic methods
%Journal of Heuristics, Vol. 1, Num. 1, Sep. 1995, pp.  9-32.
@Article{barr95,
  author =       {Richard S. Barr and Bruce L. Golden and James P. Kelly and Mauricio G. C. Resende  and William R. {Stewart Jr.}},
  title =        {Designing and reporting on computational experiments with heuristic methods},
  journal =      {Journal of Heuristics},
  year =         {1995},
  OPTkey =       {},
  volume =       {1},
  number =       {1},
  pages =        {9--32},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Luiz Andr� Barroso, Kourosh Gharachorloo, Robert McNamara, Andreas Nowatzyk, Shaz Qadeer, Barton Sano, Scott Smith, Robert Stets, Ben Verghese ,
%Piranha: a scalable architecture based on single-chip multiprocessing
%May 2000, ACM SIGARCH Computer Architecture News , Proceedings of the 27th annual international symposium on Computer architecture,  Volume 28 Issue 2.
@InProceedings{barroso00,
  author =       {Luiz Andr� Barroso and Kourosh Gharachorloo and Robert McNamara and Andreas Nowatzyk and Shaz Qadeer and Barton Sano and Scott Smith and Robert Stets and Ben Verghese},
  title =        {Piranha: a scalable architecture based on single-chip multiprocessing },
  booktitle =    {ISCA},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {282--293},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{bartic03,
  author =       {T.A. Bartic and J-Y. Mignolet and V. Nollet and T. Marescaux and D. Verkest and S. Vernalde and R. Lauwereins},
  title =        {Highly Scalable Network on Chip for Reconfigurable Systems},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {78--82},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Th�odore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Fr�d�ric Robert:
%Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.
%FPL 2004: 637-647
@InProceedings{bartic04,
  author =       {T.A. Bartic and Dirk Desmet and Jean-Yves Mignolet and Th�odore Marescaux and Diederik Verkest and Serge Vernalde and Rudy Lauwereins and J. Miller and Fr�d�ric Robert},
  title =        {Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {637--647},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Topology adaptive network-on-chip design and implementation
%Bartic, T.A.; Mignolet, J.-Y.; Nollet, V.; Marescaux, T.; Verkest, D.; Vernalde, S.; Lauwereins, R.
%IEE Proc.-Comput. Digit. Tech., Vol. 152, No. 4, July 2005
%Page(s):  467- 472
@Article{bartic05,
  author =       {T.A. Bartic and J.-Y. Mignolet and V. Nollet and T. Marescaux and D. Verkest and S. Vernalde and R. Lauwereins},
  title =        {Topology adaptive network-on-chip design and implementation},
  journal =      {IEE Proc. Comput. Digit. Tech.},
  year =         {2005},
  OPTkey =       {},
  volume =       {152},
  number =       {4},
  pages =        {467--472},
  month =        {Jul.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%E. Beigne, F. Clermidy, P. Vivet, A. Clouard, M. Renaudin,
%An Asynchronous NOC Architecture Providing Low Latency Service and Its Multi-Level Design Framework,
%Proceedings of 11th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC),
%14-16 March 2005, pp. 54 - 63.
@InProceedings{beigne05,
  author =       {E. Beigne and F. Clermidy and P. Vivet and A. Clouard and M. Renaudin},
  title =        {An Asynchronous {NOC} Architecture Providing Low Latency Service and Its Multi-Level Design Framework},
  booktitle =    {ASYNC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {54--63},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@book{benini98,
 author = {Luca Benini and Giovanni de Micheli},
 title = {Dynamic Power Management: Design Techniques and CAD Tools},
 year = {1998},
 OPTisbn = {079238086X},
 publisher = kap,
 address = {Norwell, MA, USA},
 }
 
%Luca Benini, Alessandro Bogliolo, and Giovanni De Micheli,
%A Survey of Design Techniques for System-Level Dynamic Power Management
%IEEE Trans. VLSI Syst, Vol. 8, No. 3, June 2000 299
 
@Article{benini00,
  author =       {Luca Benini and Alessandro Bogliolo and Giovanni de Micheli},
  title =        {A Survey of Design Techniques for System-Level Dynamic Power Management},
  journal =      t-vlsi,
  year =         {200},
  OPTkey =       {},
  volume =       {8},
  number =       {3},
  pages =        {299--316},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%\bibitem {benini02} Benini, L., de Micheli, G.: Networks on chips: A
%  New SoC Paradigm. Computer, vol. 35, issue 1 (2002) 70-78
@Article{benini02,
  author =       {Luca Benini and Giovanni de Micheli},
  title =        {Networks on chips: A new {SoC} Paradigm},
  journal =      {IEEE Computer},
  year =         {2002},
  OPTkey =       {},
  volume =       {35},
  number =       {1},
  pages =        {70--78},
  month =        {Jan.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%L. Benini et al.,
%SystemC cosimulation and emulation of multiprocessor SoC designs,
%Computer, Vol. 36, Iss. 4, Apr. 2003, pp. 53-59.
@Article{benini03,
  author =       {L. Benini and D. Bertozzi and D. Bruni and N. Drago and F. Fummi and M. Poncino},
  title =        {SystemC cosimulation and emulation of multiprocessor {SoC} designs},
  journal =      {IEEE Computer},
  year =         {2003},
  OPTkey =       {},
  volume =       {36},
  number =       {4},
  pages =        {53--59},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Book{benini06,
  author =       {Luca Benini and Giovanni de Micheli},
  ALTeditor =    {},
  title =        {Networks on chips: technology and tools},
  publisher =    {Morgan Kaufmann},
  year =         {2006},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{bertozzi02,
  author =       {Davide Bertozzi and Luca Benini and Giovanni de Micheli},
  title =        {Low power error resilient coding for on-chip data buses},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Bertozzi, A. Jalabert, Srinivasan Murali, R. Tamhankar, S. Stergiou, L. Benini, G. De Micheli,
%NoC synthesis flow for customized domain specific multiprocessor systems-on-chip,
%IEEE Transactions on Parallel and Distributed Systems,
%Vol. 16,  Iss. 2,  Feb. 2005, pp. 113 - 129.
@Article{bertozzi05,
  author =       {D. Bertozzi and A. Jalabert and Srinivasan Murali and R. Tamhankar and S. Stergiou and L. Benini and Giovanni de Micheli},
  title =        {NoC synthesis flow for customized domain specific multiprocessor systems-on-chip},
  journal =      t-pds,
  year =         {2005},
  OPTkey =       {},
  volume =       {16},
  number =       {2},
  pages =        {113--129},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%zi, L. Benini, G. De Micheli, ,
%Error control schemes for on-chip communication links: the energy-reliability tradeoff,
%IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 24,  Iss. 6,  June 2005, pp. 818 - 831
@Article{bertozzi05b,
  author =       {D. Bertozzi and  L. Benini and Giovanni de Micheli},
  title =        {Error control schemes for on-chip communication links: the energy-reliability tradeoff},
  journal =      t-cadics,
  year =         {2005},
  OPTkey =       {},
  volume =       {24},
  number =       {6},
  pages =        {818--831},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{bessonov03,
  author =       {O. Bessonov and D.  Fougere and B. Roux},
  title =        {Using a parallel {CFD} code for evaluation of clusters and {MPPs}},
  booktitle =    {IPDPS},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Praveen Bhojwani and Rabi Mahapatra,
%Interfacing Cores with On-chip Packet-Switched Networks
%VLSI Design, New Delhi,  4-8 Jan. 2003, pp. 382 - 387
@InProceedings{bhojwani03,
  author =       {Praveen Bhojwani and Rabi Mahapatra},
  title =        {Interfacing Cores with On-chip Packet-Switched Networks},
  booktitle =    {VLSI design},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {382--387},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% T. Bjerregaard and J. Spars�,
%A Router Architecture for Connection-Oriented Service Guarantees in the MANGO Clockless Network-on-Chip,
%Design, Automation and Test in Europe (DATE),
%7-11 March 2005,  Vol.2 , pp. 1226-1231.
@InProceedings{bjerregaard05,
  author =       {T. Bjerregaard and J. Sparsoe},
  title =        {A Router Architecture for Connection-Oriented Service Guarantees in the {MANGO} Clockless Network-on-Chip},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1226--1231},
  year =         {2005},
  OPTeditor =    {},
  volume =       {2},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{bjerregaard06,
  author =       {Tobias Bjerregaard and Shankar Mahadevan},
  title =        {A Survey of Research and Practices of Network-on-Chip},
  journal =      {ACM Computing Surveys},
  year =         {2006},
  OPTkey =       {},
  volume =       {38},
  number =       {1},
  pages =        {article No. 1},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@INPROCEEDINGS{bobrek04,
  author = {A. Bobrek and others},
  title = {Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach},
  booktitle = "DATE",
  month = "Feb.",
  year = "2004",
  pages = "1144--1149",
  volume = "2"
}
 
 
 
%E. Bolotin, I. Cidon, R. Ginosar, A. Kolodny,
%Cost considerations in network on chip,
%Integration, the VLSI Journal,
%Vol. 38, Iss. 1, Oct. 2004, pp. 19-42.
@Article{bolotin04a,
  author =       {E. Bolotin and I. Cidon and R. Ginosar and A. Kolodny },
  title =        {Cost considerations in network on chip},
  journal =      {Integration, the VLSI Journal},
  year =         {2004},
  OPTkey =       {},
  volume =       {38},
  number =       {1},
  pages =        {19--42},
  month =        {Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{bolotin04b,
  author =       {Evgeny Bolotin and Israel Gidon and Ran Ginosar and Avinoam Kolodny},
  title =        {{QNoC}: {QoS} architecture and design process for network on chip},
  journal =      {Journal of Systems Architecture},
  year =         {2004},
  OPTkey =       {},
  volume =       {50},
  number =       {2--3},
  pages =        {105--128},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
 
 
@Misc{borkar05,
  key = {0305/VET/HBD/PDF},
  author = {Shekhar Y. Borkar and Pradeep Dubey  and Kevin C. Kahn and David J. Kuck and Hans Mulder and Stephen S. Pawlowski and Justin R. Rattner},
  title =        {Platform 2015: Intel Processor and Platform Evolution for the Next Decade},
  howpublished = {Intel Corporation, white paper},
  month =        {},
  year =         {2005},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
%A. Bouchhima, I. Bacivarow, W. Youssef, M. Bonaciu, A.A. Jerraya,
% Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration,
% ASP-DAC, Shanghai, China, Jan. 2005, pp. 969 - 972.
@InProceedings{bouchima05,
  author =       {A. Bouchhima and I. Bacivarow and W. Youssef and M. Bonaciu and A.A. Jerraya},
  title =        {Using abstract {CPU} subsystem simulation model for high level {HW/SW} architecture exploration},
  booktitle =    {ASP-DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {969--972},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Shanghai, China},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%A. Bouhraoua and M. E. Elrabaa
%A High-Throughput Network-on-Chip Architecture for Systems-on-Chip Interconnect
%Intl. Symposium on System-on-Chip
%Tampere, Finland, Nov. 2006, pp. 127-130.
@InProceedings{bouhraoua06,
  author =       {A. Bouhraoua and M. E. Elrabaa},
  title =        {A High-Throughput Network-on-Chip Architecture for Systems-on-Chip Interconnect},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {127--130},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Bryg, W. R., Chan, K. K., Fiduccia, N. S.:
%A high-performance, low-cost multiprocessor bus for workstations and midrange servers.
%Hewlett-Packard Journal, Feb. 1996.
@Article{bryg96,
  author =       {W. R. Bryg and  K. K. Chan and N. S. Fiduccia},
  title =        {A high-performance, low-cost multiprocessor bus for workstations and midrange servers},
  journal =      {Hewlett-Packard Journal},
  year =         {1996},
  OPTkey =       {},
  volume =       {47},
  number =       {1},
  OPTpages =     {},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% CCC
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
% Y. Cao, T. Sato, M. Orshansky, D. Sylvester, C. Hu,
%New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation,
%Custom Integrated Circuits Conference (CICC),
%21-24 May 2000, pp. 201 - 204.
@InProceedings{cao00,
  author =       {Yu Cao and Takashi Sato and Michael Orshansky and Dennis Sylvester and Chenming Hu},
  title =        {New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation},
  booktitle =    {Custom Integrated Circuits Conference (CICC)},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {201--204},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Orlando, FL, USA},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Cardoso, R.S.; Kreutz, M.E.; Carro, L.; Susin, A.A.;
%Design space exploration on heterogeneous network-on-chip
%Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
%23-26 May 2005 Page(s):428 - 431 Vol. 1
%Digital Object Identifier 10.1109/ISCAS.2005.1464616
@InProceedings{cardoso05,
  author =       {R.S. Cardoso and M.E. Kreutz and L. Carro and A.A. Susin},
  title =        {Design space exploration on heterogeneous network-on-chip},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {428--431},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {1},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Carloni, L.P.; Sangiovanni-Vincentelli, A.L.;
%Coping with latency in SOC design
%Micro, IEEE , Volume: 22 , Issue: 5 , Sept.-Oct. 2002
%Pages:24 - 35
@Article{carloni02,
  author =       {L.P. Carloni and  A.L. Sangiovanni-Vincentelli},
  title =        {Coping with latency in {SOC} design},
  journal =      {IEEE Micro},
  year =         {2002},
  OPTkey =       {},
  volume =       {22},
  number =       {5},
  pages =        {24--35},
  month =        {Sep.-Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{castellsrufas06,
  author =       {David Castells-Rufas and Jaume Joven and Jordi Carrabina},
  title =        {A Validation and Performance Evaluation Tool for {ProtoNoc}},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {159--162},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%J. Chan, S. Parameswaran,
%NoCGEN:a template based reuse methodology for Networks On Chip architecture,
%In Proc. 17th International Conference on VLSI Design, 5-9 Jan. 2004, pp. 717 - 720.
@InProceedings{chan04,
  author =       {J. Chan and S. Parameswaran},
  title =        {NoCGEN:a template based reuse methodology for Networks On Chip architecture},
  booktitle =    {VLSI design},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {717--720},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Chan, J.; Parameswaran, S.;
%NoCEE: energy macro-model extraction methodology for network on chip routers
%Computer-Aided Design, 2005. ICCAD-2005. IEEE/ACM International Conference on
%6-10 Nov. 2005 Page(s):254 - 259
@InProceedings{chan05,
  author =       {J. Chan and S. Parameswaran},
  title =        {{NoCEE:} energy macro-model extraction methodology for network on chip routers},
  booktitle =    {ICCAD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {254--259},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Book{chang99,
  author =       {Henry Chang and Larry Cooke and Merrill Hunt and Grant Martin and Andrew McNelly and Lee Todd},
  ALTeditor =    {},
  title =        {Surviving the SoC Revolution},
  publisher =    kap,
  year =         {1999},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Norwell, MA},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen,
%Evaluation and design trade-offs between circuit-switched and packet-switched NOCs for application-specific SOCs,
%DAC, July 24 - 28, 2006,  pp. 143 - 148.
@InProceedings{chang06,
  author =       {Kuei-Chung Chang and Jih-Sheng Shen and Tien-Fu Chen},
  title =        {Evaluation and design trade-offs between circuit-switched and packet-switched {NOCs} for application-specific {SOCs}},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {143--148},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%A Systemc Test Environment For Spin Network
%Charlery, H.; Greiner, A.;
%Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
%22-24 June 2006 Page(s):449 - 453
@InProceedings{charlery06,
  author =       {H. Charlery  and A. Greiner},
  title =        {A {SystemC} Test Environment For {SPIN} Network},
  booktitle =    {MIXDES},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {449--453},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Gdynia, Poland},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Hsin-Chou Chi, Jia-Hung Chen,
%Design and implementation of a routing switch for on-chip interconnection networks,
%Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits,
%4-5 Aug. 2004, pp. 392 - 395.
@InProceedings{chi04,
  author =       {Hsin-Chou Chi and Jia-Hung Chen},
  title =        {Design and implementation of a routing switch for on-chip interconnection networks},
  booktitle =    {AP-ASIC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {392--395},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Ching, P. Schaumont, I. Verbauwhede,
%Integrated modeling and generation of a reconfigurable network-on-chip,
%In Proc. 18th International Parallel and Distributed Processing Symposium (IPDPS),
%April 26-30, 2004, pp. 139 - 145.
@InProceedings{ching04,
  author =       {D. Ching and P. Schaumont and I. Verbauwhede},
  title =        {Integrated modeling and generation of a reconfigurable network-on-chip},
  booktitle =    {IPDPS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {139--145},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{chiang92,
  author =       {Men-Chow Chiang and Gurindar S. Sohi},
  title =        {Evaluating design choices for shared bus multiprocessors in a throughput-oriented environment},
  journal =      {IEEE Trans. Computers},
  year =         {1992},
  OPTkey =       {},
  volume =       {41},
  number =       {3},
  pages =        {297--317},
  month =        {Mar.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Young-Sin Cho, Eun-Ju Choi, Kyoung-Rok Cho,
%Modeling and analysis of the system bus latency on the SoC platform,
%SLIP, Munich, Germany, 2006, pp. 67-74.
@InProceedings{cho06,
  author =       {Young-Sin Cho and Eun-Ju Choi and Kyoung-Rok Cho},
  title =        {Modeling and analysis of the system bus latency on the {SoC} platform},
  booktitle =    {SLIP},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {67--74},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Munich, Germany},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{clark06,
  author =       {Lindsay Clark},
  title =        {Who are winners as focus changes on licence challenges?},
  journal =      {Computer Weekly},
  year =         {2006},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTpages =     {},
  month =        {Jul.},
  OPTnote =      {http://www.computerweekly.com/Articles/Article.aspx?liArticleID=217143},
  OPTannote =    {}
}
 
@Manual{crossbow02,
  title =        {2D-Fabric 402c Parallel Processing Interface},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {Crossbow Technologies Inc.},
  address =      {Sugar Land, TX, USA},
  OPTedition =   {},
  month =        {Jul.},
  year =         {2002},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Book{culler98,
  author =       {David Culler and J.P. Singh and Anoop Gupta},
  ALTeditor =    {},
  title =        {Parallel Computer Architecture - A Hardware/Software Approach},
  publisher =    {Morgan Kaufmann},
  year =         {1998},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%I. Cidon and I. Keidar
%Zooming in on Network-on-Chip Architectures".
%Technical Report CCIT 565, Technion Department of Electrical Engineering, December 2005.
@TechReport{cidon05,
  author =       {I. Cidon and I. Keidar},
  title =        {Zooming in on Network-on-Chip Architectures},
  institution =  {Technion Department of Electrical Engineering},
  year =         {2005},
  OPTkey =       {},
  OPTtype =      {},
  number =       {CCIT 565},
  OPTaddress =   {},
  month =        {Dec.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
% Benchmarketing competition
% Colwell, B.;
%Computer
%Volume 36,  Issue 12,  Dec. 2003 Page(s):9 - 11
%Digital Object Identifier 10.1109/MC.2003.1250853
@Article{colwell03,
  author =       {B. Colwell},
  title =        {Benchmarketing competition},
  journal =      {Computer},
  year =         {2003},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  pages =        {9--11},
  month =        {Dec.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Book{colwell06,
  author =       {Robert P Colwell},
  ALTeditor =    {},
  title =        {Pentium Chronicles - The people, passion, and politics behind Intel's landmark chips},
  publisher =    {Wiley Interscience},
  year =         {2006},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% T. Conte, Insight, not (random) numbers, keynote presentation,
% ISPASS. 2005, [Online] http://ispass.org/ispass2005/keynote-conte.pdf
@Misc{conte05,
  OPTkey =       {},
  author =       {T. Conte},
  title =        {Insight, not (random) numbers, keynote presentation, },
  howpublished = {keynote presentation at ISPASS, [online], http://ispass.org/ispass2005/keynote-conte.pdf},
  OPTmonth =     {},
  year =         {2005},
  OPTnote =      {},
  OPTannote =    {}
}
 
%R. Cypher, A. Ho, S Konstantiinidou, P. Messian,
%Arhictectural requirements of Parallel Scientific Applications with Explicit Communication,
%ISCA, May 1993, pp. 2-13.
@InProceedings{cypher93,
  author =       {R. Cypher and A. Ho and S Konstantinidou and P. Messian},
  title =        {Architectural requirements of Parallel Scientific Applications with Explicit Communication},
  booktitle =    {ISCA},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {2--13},
  year =         {1993},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% DDD
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs
%Dall'Osso, M.; Biccari, G.; Giovannini, L.; Bertozzi, D.; Benini, L.;
%Computer Design, 2003. Proceedings. 21st International Conference on , Oct. 13-15, 2003
%Pages:536 - 539
@InProceedings{dallosso03,
  author =       {M. Dall'Osso and G. Biccari and L. Giovannini and D. Bertozzi and L. Benini},
  title =        {xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor {SoCs}},
  booktitle =    {ICCD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {13--15},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Dally, W.J.; Towles, B. ,
% Route packets, not wires: on-chip interconnection networks
%Design Automation Conference (DAC), June 2001pp. 684 -689.
@InProceedings{dally01,
  author =       {W.J. Dally and B. Towles},
  title =        {Route packets, not wires: on-chip interconnection networks},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {684--689},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@InBook{dally04,
  author =       {William James Dally and Brian Towles},
  ALTeditor =    {},
  title =        {Principles and practices of interconnection networks},
  chapter =      {},
  publisher =    {Morgan Kaufmann Publishers},
  year =         {2004},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTtype =      {},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  OPTpages =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{dasgupta06,
  author =       {Sohini Dasgupta and Alex Yakovlev},
  title =        {Modeling And Performance Analysis of {GALS} Architectures},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {187--190},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%R.P. Dick, D.L. Rhodes, W. Wolf,
%TGFF: Task Graphs for Free, CODES/CASHE, Seattle, WA, Mar. 1998, pp. 97-101.
@InProceedings{dick98,
  author =       {R.P. Dick and D.L. Rhodes and W. Wolf},
  title =        {{TGFF}: Task Graphs for Free},
  booktitle =    {CODES/CASHE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {97--101},
  year =         {1998},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Seattle, WA, USA},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% R. Dick, Embedded system synthesis benchmarks suites (E3S),
% http://www.ece.northwestern.edu/~dickrp/e3s/
 
@Misc{dick02,
  OPTkey =       {},
  author =       {R. Dick},
  title =        {Embedded system synthesis benchmarks suites ({E3S}), version 0.9},
  howpublished = {[online],http://www.ece.northwestern.edu/~dickrp/e3s/},
  OPTmonth =     {},
  year =         {2002},
  OPTnote =      {},
  OPTannote =    {}
}
 
%R. Dobkin, R. Ginosar, C.P. Sotiriou, High Rate Data Synchronization in GALS SoCs,
%IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 14, Iss. 10, Oct. 2006, pp. 1063 - 1074.
@Article{dobkin06,
  author =       {R. Dobkin and R. Ginosar and C.P. Sotiriou},
  title =        {High Rate Data Synchronization in {GALS SoCs}},
  journal =      t-vlsi,
  year =         {2006},
  OPTkey =       {},
  volume =       {14},
  number =       {10},
  pages =        {1063--1074},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Flexible MPSoC Platform with Fast Interconnect Exploration for Optimal System Performance for a Specific Application,
%F. Dumitrascu, I. Bacivarov, L. Pieralisi, M. Bonaciu, A.A. Jerraya,
%Design, Automation and Test in Europe (DATE), Vol. 2,  06-10 March 2006, pp. 1 - 6.
@InProceedings{dumitrascu06,
  author =       {F. Dumitrascu and I. Bacivarov and L. Pieralisi and M. Bonaciu and A.A. Jerraya},
  title =        {Flexible {MPSoC} Platform with Fast Interconnect Exploration for Optimal System Performance for a Specific Application},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1--6},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {dutta01} Dutta, S., \emph{et al.}: Viper: A Multiprocessor SoC for
%  Advanced Set-Top Box and Digital TV Systems. IEEE Design and Test of
%  Computers, vol. 18, issue 5 (2001) 21-31
@Article{dutta01,
  author =       {Santanu Dutta and Rune Jensen and Alf Rieckmann},
  title =        {Viper: A multiprocessor {SOC} for advanced set-top box and digital {TV} systems},
  journal =      {IEEE Des. Test Comput},
  year =         {2001},
  volume =       {18},
  number =       {5},
  pages =        {21--31},
  month =        {Sep.-Oct.},
  OPTnote =      {T�h�n voinee kirjoitella mit� lyst��}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% EEE
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
@ARTICLE{Edenfeld04,
  author      = {D. Edenfeld and A. B. Kahng and M. Rodgers and Y. Zorian},
  title       = {2003 technology roadmap for semiconductors},
  journal     = {IEEE Computer},
  volume      = {37},
  number      = {1},
  month       = {Jan.},
  pages       = {47--56},
  year        = {2004}
}
 
 
 
 
%EEMBC,
%Certified Performance Analysis for embedded systems designers,
%[online], http://www.eembc.org/, visited May 12th 2005.
@Misc{eembc06,
  OPTkey =       {},
  author =       {{EEMBC}},
  title =        {Certified Performance Analysis for embedded systems designers},
  howpublished = {[online], http://www.eembc.org/},
  OPTmonth =     {},
  OPTyear =      {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Emma, A. Pescap�, G. Ventre,
%Analysis and experimentation of an open distributed platform for synthetic traffic generation,
%FTDCS, Suzhou, China, May 2004, pp. 277-283.
 
@InProceedings{emma04,
  author =       {D. Emma and A. Pescap� and G. Ventre},
  title =        {Analysis and experimentation of an open distributed platform for synthetic traffic generation},
  booktitle =    {FTDCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {277--283},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Suzhou, China},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {erbas03} Erbas, C. et al.:
%IDF models for trace transformations: A case study in computational refinement.
%In: Proc. of SAMOS (2003) 167-172
@InProceedings{erbas03,
  author =       {Cagkan Erbas and Simon Polstra and Andy D. Pimentel},
  title =        {{IDF} models for trace transformations: A case study in computational refinement},
  booktitle =    {SAMOS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {167--172},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Samos, Greece},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%The evolution of DSP processors
%Eyre, J.; Bier, J.;
%Signal Processing Magazine, IEEE
%Volume 17,  Issue 2,  March 2000 Page(s):43 - 51
%Digital Object Identifier 10.1109/79.826411
 
@Article{Eyre00,
  author =       {J. Eyre and J.Bier},
  title =        {The evolution of {DSP} processors},
  journal =      {IEEE Signal Processing Magazine},
  year =         {2000},
  OPTkey =       {},
  volume =       {17},
  number =       {2},
  pages =        {43--51},
  month =        {Mar.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%S. Evain, J. P. Diguet, D. Houzet,
%"�Spider: a CAD Tool for efficient NoC design",
%IEEE NORCHIP 2004, Oslo, NORWAY, November 8-9, 2004.
@InProceedings{evain04,
  author =       {S. Evain and J. P. Diguet and D. Houzet},
  title =        {$\mu$Spider: a {CAD} Tool for efficient {NoC} design},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {218--221},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% FFF
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%Performance Evaluation for Three-Dimensional Networks-On-Chip
%Feero, B.; Pande, P.P.
%Page(s): 305-310
@InProceedings{feero07,
  author =       {B. Feero  and P.P. Pande},
  title =        {Performance Evaluation for Three-Dimensional Networks-On-Chip},
  booktitle =    {ISVLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {305--310},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Felicijan, F.; Furber, S.B.;
% v�lill� kirjoitettu Feliciian! ilma j:t�
%An asynchronous on-chip network router with quality-of-service (QoS) support
%SOC Conference, 2004. Proceedings. IEEE International
%12-15 Sept. 2004 Page(s):274 - 277
@InProceedings{felicijan04,
  author =       {F. Felicijan and S.B. Furber},
  title =        {An asynchronous on-chip network router with quality-of-service {(QoS)} support},
  booktitle =    {SOCC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {274--277},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%David Flynn,
%AMBA: Enabling Reusable On-Chip Designs,
%IEEE Micro, July/August 1997, Vol. 17, No. 4, pp. 20-27.
@Article{flynn97,
  author =       {David Flynn},
  title =        {AMBA: Enabling Reusable On-Chip Designs},
  journal =      {IEEE Micro},
  year =         {1997},
  OPTkey =       {},
  volume =       {17},
  number =       {4},
  pages =        {20--27},
  month =        {Jul./Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Forsell, M.;
%A scalable high-performance computing solution for networks on chips
%Micro, IEEE , Volume: 22 Issue: 5 , Sept.-Oct. 2002
%Page(s): 46 -55
@Article{forsell02,
  author =       {M Forsell},
  title =        {A scalable high-performance computing solution for networks on chips},
  journal =      {IEEE Micro},
  year =         {2002},
  OPTkey =       {},
  volume =       {22},
  number =       {5},
  pages =        {46--55},
  month =        {Sep.-Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%E. Frachtenberg and D. G. Feitelson,
%``Pitfalls in parallel job scheduling evaluation''.
%In Job Scheduling Strategies for Parallel Processing,
%D. G. Feitelson, E. Frachtenberg, L. Rudolph, and U. Schwiegelshohn (Eds.), pp. 257-282,
%Springer-Verlag, 2005. Lecture Notes in Computer Science Vol. 3834.
 
@InCollection{frachtenberg05,
  author =       {E. Frachtenberg and D. G. Feitelson},
  title =        {Pitfalls in parallel job scheduling evaluation},
  booktitle =    {LNCS 3834: Job Scheduling Strategies for Parallel Processing},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {257-282},
  publisher =    {Springer-Verlag},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTtype =      {},
  OPTchapter =   {},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% GGG
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%C.H.   Gebotys,  R.J. Gebotys,
%A framework for security on NoC technologies,
%IEEE Computer Society Annual Symposium on VLSI,
%20-21 Feb. 2003, pp. 113 - 117.
@InProceedings{gebotys03,
  author =       {C.H.  Gebotys and  R.J. Gebotys},
  title =        {A framework for security on {NoC} technologies},
  booktitle =    {VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {113--117},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%N. Genko, D. Atienza, G. De Micheli, L. Benini, J.M. Mendias, R. Hermida, F. Catthoor,
%A Novel Approach for Network on Chip Emulation,
%ISCAS, May 2005, pp. 2365-2368.
@InProceedings{genko05,
  author =       {N. Genko and D. Atienza and G. de Micheli and L. Benini and J.M. Mendias and R. Hermida and F. Catthoor},
  title =        {A Novel Approach for Network on Chip Emulation},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {2365--2368},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Essential Fault-Tolerance Metrics for NoC Infrastructures
%Grecu, Cristian; Anghel, Lorena; Pande, Partha P.; Ivanov, Andre; Saleh, Resve;
%On-Line Testing Symposium, 2007. IOLTS 07. 13th IEEE International
%8-11 July 2007 Page(s):37 - 42
@InProceedings{grecu07b,
  author =       {Cristian Grecu and Lorena Anghel and Partha P. Pande and  Andre Ivanov and Resve Saleh},
  title =        {Essential Fault-Tolerance Metrics for {NoC} Infrastructures},
  booktitle =    {IOLTS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {37--42},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{grecu07c,
  author =       {C. Grecu and A. Ivanov and R. Saleh and P.P. Pande},
  title =        {Testing Network-on-Chip Communication Fabrics},
  journal =      {IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems},
  year =         {2007},
  OPTkey =       {},
  volume =       {26},
  number =       {10},
  pages =        {2201--2014},
  month =        {Dec.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem{grecu08} Grecu, C., Ivanov, A., Saleh, R., Rusu, C., Anghel,
%  L., Pande, P., Nuca, V.
% A flexible network-on-chip simulator for early design space exploration,
% IEEE Microsystems and Nanoelectronics Research Conference,
% Ottawa, Canada, Oct. 2008, pp.
%  33-36
 
@InProceedings{grecu08,
  author =       {C. Grecu and A. Ivanov and R. Saleh and C. Rusu and L. Anghel and P. Pande and V. Nuca},
  title =        {A flexible network-on-chip simulator for early design space exploration},
  booktitle =    {MNRC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {33--36},
  year =         {2008},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Ed Grochowski, Murali Annavaram,
%Energy per Instruction Trends in Intel� Microprocessors,
%Technology (at) Intel Magazine, March 2006, pp. 1-8.
@Article{grochowski06,
  author =       {Ed Grochowski and Murali Annavaram},
  title =        {Energy per Instruction Trends in {Intel} Microprocessors},
  journal =      {{Technology at Intel Magazine}},
  OPTjournal =   {{Technology@Intel Magazine}},
  year =         {2006},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  pages =        {1--8},
  month =        {Mar.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Guerrier Pierre, Greiner Alain
%A Scalable Architecture for System-on-Chip Interconnections
%Sophia Antipolis Forum on MicroElectronics (SAME'99), Sophia Antipolis, France, October 1999, pp. 90-93
@InProceedings{guerrier99,
  author =       {Pierre Guerrier and Alain Greiner},
  title =        {A Scalable Architecture for System-on-Chip Interconnections},
  booktitle =    {SAME},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {90--93},
  year =         {1999},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Sophia Antipolis, France},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%P. Guerrier and A. Greiner,
%A generic architecture for on-chip packet-switched interconnections,
%DATE, Paris, France, Mar. 2000, pp. 250-256
@InProceedings{guerrier00,
  author =       {Pierre Guerrier and Alain Greiner},
  title =        {A generic architecture for on-chip packet-switched interconnections},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {250--256},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Paris, France},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@InProceedings{guo06,
  author =       {Jin Guo and Antonis Papanikolaou and Pol Marchal and Francky Catthoor},
  title =        {Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture},
  booktitle =    {SLIP},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {75--81},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Munich, Germany},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%J.L. Gustafson, R. Todi,
%Conventional benchmarks as a sample of the performance spectrum, HICSS, Kohala Coast, HI, Vol. 7, Jan. 1998, pp. 514-523.
@InProceedings{gustafson98,
  author =       {J.L. Gustafson and R. Todi},
  title =        {Conventional benchmarks as a sample of the performance spectrum},
  booktitle =    {HICSS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {514--523},
  year =         {1998},
  OPTeditor =    {},
  volume =       {7},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kohala Coast, HI, USA},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%John L. Gustafson,
%Reevaluating Amdahl's law,
%Communications of the ACM,
%Vol. 31 ,  Iss. 5, May 1988, pp. 532 - 533.
@Article{gustafsson88,
  author =       {John L. Gustafson},
  title =        {Reevaluating {Amdahl's} law},
  journal =      {Communications of the ACM},
  year =         {1988},
  OPTkey =       {},
  volume =       {31},
  number =       {5},
  pages =        {532--533},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Matthew R. Guthaus, Jeffrey S. Ringenberg, Dan Ernst, Todd M. Austin, Trevor Mudge, Richard B. Brown.
%"MiBench: A Free, Commercially Representative Embedded Benchmark Suite,"
%IEEE International Workshop on Workload Characterization (WWC-4),
%2 Dec. 2001, pp. 3 - 14.
@InProceedings{guthaus01,
  author =       {Matthew R. Guthaus and Jeffrey S. Ringenberg and Dan Ernst and Todd M. Austin and Trevor Mudge and Richard B. Brown},
  title =        {{MiBench}: A Free, Commercially Representative Embedded Benchmark Suite},
  booktitle =    {WWC-4},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {3--14},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Austin, TX, USA},
  month =        {Dec},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% HHH
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
%M.C. Hansen, H. Yalcin, J.P. Hayes,
%Unveiling the ISCAS-85 benchmarks: a case study in reverse engineering,
%IEEE Design & Test of Computers, Vol. 16,  Iss. 3,  July-Sept. 1999, pp. 72 - 80.
 
@Article{hansen99,
  author =       {M.C. Hansen and H. Yalcin and J.P. Hayes},
  title =        {Unveiling the {ISCAS-85} benchmarks: a case study in reverse engineering},
  journal =      {IEEE Des. Test Comput},
  year =         {1999},
  OPTkey =       {},
  volume =       {16},
  number =       {3},
  pages =        {72--80},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%A. Hansson, K. Goossens,
%Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases,
%First International Symposium on Networks-on-Chip (NOCS),
%7-9 May 2007, pp. 233 - 242.
@InProceedings{hansson07,
  author =       {A. Hansson and K. Goossens},
  title =        {Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases},
  booktitle =    {NOCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {233--242},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Wim Heirman, Joni Dambre, and Jan Van Campenhout,
%Synthetic traffic generation as a tool for dynamic interconnect evaluation
%Proceedings of the 2007 international workshop on System level interconnect prediction, Austin, Texas, USA, 2007
@InProceedings{heirman07,
  author =       {Wim Heirman and Joni Dambre and Jan Van Campenhout},
  title =        {Synthetic traffic generation as a tool for dynamic interconnect evaluation},
  booktitle =    {SLIP},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {65--72},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Austin, TX, USA},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%A . Hemani, A. Jantsch, S. Kumar, A. Postula, J. �berg, M. Millberg, and D. Lindqvist.
%network on chip: An architecture for billion transistor era.
%In Proceeding of the IEEE NorChip Conference, November 2000.
@InProceedings{hemani00,
  author =       {A. Hemani and A. Jantsch and S. Kumar and A. Postula and J. \"Oberg and M. Millberg and D. Lindqvist},
  title =        {Network on chip: An architecture for billion transistor era},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Turku, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%On-chip networks: a scalable, communication-centric embedded system design paradigm,
%J. Henkel, W. Wolf, S. Chakradhar,
%In Proc. 17th International Conference on VLSI Design, 5-9 Jan. 2004,  pp. 845 - 851.
@InProceedings{henkel04,
  author =       {J. Henkel and W. Wolf and S. Chakradhar},
  title =        {On-chip networks: a scalable, communication-centric embedded system design paradigm},
  booktitle =    {VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {845--851},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Book{hennessy03,
  author =       {John L. Hennessy and David A. Patterson},
  ALTeditor =    {},
  title =        {Computer Architecture - A Quantitative Approach},
  publisher =    {Morgan Kaufmann Publishers},
  year =         {2003},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  edition =      {3rd},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Tomas Henriksson, Daniel Wiklund, and Dake Liu,
%VLSI implementation of a switch for on-chip networks,
%Proc of Int'l workshop on Design and diagnostics of electronic circuits and systems (DDECS), Poznan, Poland, Apr 2003
@InProceedings{henrikson03,
  author =       {Tomas Henriksson and Daniel Wiklund and Dake Liu},
  title =        {{VLSI} implementation of a switch for on-chip networks},
  booktitle =    {DDECS},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Poznan, Poland},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
%C. Hilton, B. Nelson
%A flexible circuit switched NOC for FPGA based systems
%This paper appears in: Field Programmable Logic and Applications, 2005. International Conference on
%Publication Date: 24-26 Aug. 2005
%On page(s): 191- 196
@InProceedings{hilton05,
  author =       {C. Hilton and B. Nelson},
  title =        {A flexible circuit switched {NOC} for {FPGA} based systems},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {24--26},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {ho01} Ho, R. et al.:
%The future of wires.
%In: Proc. IEEE, 2001, Vol. 89, Iss. 4, 490-504
@Article{ho01,
  author =       {Ron Ho and Kenneth W. Mai and Mark A. Horowitz},
  title =        {The future of wires},
  journal =      {Proc. IEEE},
  year =         {2001},
  OPTkey =       {},
  volume =       {89},
  number =       {4},
  pages =        {490--504},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Book{hodges04,
  author =       {David A. Hodges and Horae G. Jackson and Reseve A. Saleh},
  ALTeditor =    {},
  title =        {Analysis and Design of Digital Integrated Circuits: in deep submicron technology},
  publisher =    {McGraw-Hill},
  year =         {2004},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  edition =      {Third},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Kalle Holma, Mikko Set�l�, Erno Salminen, Timo D. H�m�l�inen,
%Evaluating the Model Accuracy in Automated Design Space Exploration,
%10th Euromicro Conference on Digital System Design, L�beck, Germany, August 27-31, 2007, 7 pages, Accepted.
@InProceedings{holma07_korvaa_lehtijutulla,
  author =       {Kalle Holma and Mikko Set\"al\"a and Erno Salminen and Timo H\"am\"al\"ainen},
  title =        {Evaluating the Model Accuracy in Automated Design Space Exploration},
  booktitle =    {Euromicro Conference on Digital System Design},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {173--180},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {L\"ubeck, Germany},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Kalle Holma, Mikko Set�l�, Erno Salminen, Marko H�nnik�inen, Timo D. H�m�l�inen, "Evaluating the Model Accuracy in Automated Design Space Exploration",
% Microprocessors and Microsystems: Special Issue in Dependability and Testing of Modern Digital Systems, April 15-15, 2008, 9 pages, Article in Press.
@Article{holma08,
  author =       {Kalle Holma and Mikko Set\"al\"a and Erno Salminen and Timo H\"am\"al\"ainen},
  title =        {Evaluating the Model Accuracy in Automated Design Space Exploration},
  journal =      {Microprocessors and Microsystems},
  year =         {2008},
  OPTkey =       {},
  volume =       {32},
  number =       {5-6},
  pages =        {321--329},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%\bibitem{holma08c} Holma, K., Arpinen, T., Salminen, E., H\"annik\"ainen,
%  M., H\"am\"al\"ainen, T.D.: '
% Real-Time Execution Monitoring on Multi-Processor System-on-Chip'.
% Int. Symposium on
%  System-on-Chip, Tampere, Finland, Nov. 2008, pp. 23-28
@InProceedings{holma08c,
  author =       {Kalle Holma and Tero Arpinen  and Erno Salminen and Marko H\"annik\"ainen and Timo H\"am\"al\"ainen},
  title =        {Real-Time Execution Monitoring on Multi-Processor System-on-Chip},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {23--28},
  year =         {2008},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{holsmark05,
  author =       {Rickard Holsmark and Shashi Kumar},
  title =        {Design issues and performance evaluation of mesh {NoC} with regions},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {40--43},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Reliable network-on-chip based on generalized de Bruijn graph
%Hosseinabady, M.; Kakoee, M.R.; Mathew, J.; Pradhan, D.K.;
%High Level Design Validation and Test Workshop, 2007. HLVDT 2007. IEEE International
%7-9 Nov. 2007 Page(s):3 - 10
%Digital Object Identifier 10.1109/HLDVT.2007.4392777
@InProceedings{hosseinabady07,
  author =       { M. Hosseinabady and M.R. Kakoee and  J. Mathew and D.K. Pradhan},
  title =        {Reliable network-on-chip based on generalized de {Bruijn} graph},
  booktitle =    {HLVDT},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {3--10},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Jingcao Hu, Yangdong Deng, Radu Marculescu.
%System-Level Point-to-Point Communication Synthesis Using Floorplanning Information.
%ASP-DAC/VLSI, January, 2002, pp. 573 - 579.
@InProceedings{hu02,
  author =       {Jingcao Hu and Yangdong Deng and Radu Marculescu},
  title =        {System-Level Point-to-Point Communication Synthesis Using Floorplanning Information},
  booktitle =    {ASP-DAC/VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {573--579},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%M.-C. Chiang,  G.S. Sohi,
%Evaluating design choices for shared bus multiprocessors in a throughput-oriented environment,
%IEEE Transactions on Computers, Vol.41,  Iss. 3,  March 1992, pp. 297 - 317.
@InProceedings{hu04,
  author =       {Jingcao Hu and Redu Marculescu},
  title =        {{DyAD} - Smart routing for networks-on-chip},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {260--263},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {San Diego, CA},
  month =        {June},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% III
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
@Manual{intel02,
  title =        {Intel Itanium 2 Processor - Hardware Developer's Manual},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {{Intel Corporation}},
  OPTaddress =   {},
  OPTedition =   {Doc number 251109-001},
  month =        {Jul.},
  year =         {2002},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Misc{intel06,
  OPTkey =       {},
  author =       {{Intel Corporation}},
  title =        {Quick Processor Reference Guide},
  howpublished = {[online], http://www.intel.com/pressroom/kits/quickrefffram.htm},
  month =        {May},
  year =         {2006},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Misc{itrs06,
  OPTkey =       {},
  author =       {ITRS},
  title =        {International Technology Roadmap for Semiconductors, editions 1999-2005},
  howpublished = {[online], www.http://www.itrs.net},
  month =        {May},
  year =         {2006},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% JJJ
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%xpipesCompiler: a tool for instantiating application specific networks on chip
%Jalabert, A.; Murali, S.; Benini, L.; De Micheli, G.;
%Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings , Volume: 2 , Feb. 16-20, 2004
%Pages:884 - 889
@InProceedings{jalabert04,
  author =       {Antoine Jalabert and Srinivasan Murali and Luca Benini and  Giovanni de Micheli},
  title =        {XpipesCompiler: a tool for instantiating application specific networks on chip},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {884-889},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%MoCSYS: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated Topology Synthesis Framework for System-Level Design of FPGA Based On-Chip Networks
%Janarthanan, Arun; Tomko, Karen A.;
%VLSI Design, 2008. VLSID 2208. 21st International Conference on
%4-8 Jan. 2008 Page(s):397 - 402
%Digital Object Identifier 10.1109/VLSI.2008.79
@InProceedings{janarthanan08,
  author =       {Arun Janarthanan and Karen A. Tomko},
  title =        {{MoCSYS}: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated Topology Synthesis Framework for System-Level Design of {FPGA} Based On-Chip Networks},
  booktitle =    {VLSID},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {397--402},
  year =         {2008},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%\bibitem {jantsch03} Jantsch, A., Tenhunen, H. (eds.): Networks on
%  Chip. Kluwer Academic Publishers, Dordrecht, The Netherlands (2003)
@Book{jantsch03,
  ALTauthor =    {},
  editor =       {Axel Jantsch and Hannu Tenhunen},
  title =        {Networks on Chip},
  publisher =    kap,
  year =         {2003},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Dordrecht, The Netherlands},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Axel Jantsch, Robert Lauter, Arseni Vitkowski,
%Power analysis of link level and end-to-end data protection in networks on chip,
%ISCAS, Kobe, Japan, May 2005, pp..
@InProceedings{jantsch05,
  author =       {Axel Jantsch and Robert Lauter and Arseni Vitkowski},
  title =        {Power analysis of link level and end-to-end data protection in networks on chip},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1770--1773},
  year =         {2005},
  OPTeditor =    {},
  volume =       {2},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kobe, Japan},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% A. Jantsch,
% Models of Computation for Networks on Chip,
%Application of Concurrency to System Design, 2006. ACSD 2006. Sixth International Conference on,
%Date: 28-30 June 2006, pp.  165- 178.
@InProceedings{jantsch06,
  author =       {A. Jantsch},
  title =        {Models of Computation for Networks on Chip},
  booktitle =    {ACSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {2006},
  year =         {165--178},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% A.A. Jerraya, Long term trends for embedded system design,  Euromicro Symposium on Digital System Design (DSD), Aug. 31 - Sept. 3. 2004, pp. 20 - 26.
@InProceedings{jerraya04,
  author =       {Ahmed A. Jerraya},
  title =        {Long term trends for embedded system design},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {20--26},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Rennes, France},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Book{jerraya04b,
  author = {Ahmed Jerraya and Wayne Wolf},
  ALTeditor =    {},
  title = {Multiprocessor Systems-on-Chips},
  publisher = {Morgan Kaufmann},
  year =         {2004},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTedition =   {},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{jeschke07,
  author =       {Hartwig Jeschke},
  title =        {Efficiency Measures for Multimedia {SOCs}},
  booktitle =    {SAMOS VII},
  OPTbooktitle =         {LNCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {190--199},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {4599},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {Springer},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% KKK
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%J. A. Kahle, M. N. Day, H. P. Hofstee, C. R. Johns, T. R. Maeurer, and D. Shippy,
%Introduction to the cell multiprocessor.
%IBM Journal of Research and Development
%49, 4/5, Jul.-Sep.2005, pp. 589-604.
 
@Article{kahle05,
  author =       {J. A. Kahle and M. N. Day and H. P. Hofstee and C. R. Johns and T. R. Maeurer and D. Shippy},
  title =        {Introduction to the {Cell} multiprocessor},
  journal =      {IBM Journal of Research and Development},
  year =         {2005},
  OPTkey =       {},
  volume =       {49},
  number =       {4/5},
  pages =        {598--604},
  month =        {Jul.-Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {kahn74} Kahn, G.:
%The semantics of a simple language for parallel
%programming. IFIP Congress, Stockholm, Sweden, (1974) 471-475
@InProceedings{kahn74,
  author =       {G. Kahn},
  title =        {The semantics of a simple language for parallel programming},
  booktitle =    {IFIP Conference},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {471--475},
  year =         {1974},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Stockholm, Sweden},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@ARTICLE{Kahng:02,
  author      = "A.B. Kahng",
  title       = "Directions for drivers and design",
  journal     = IEEE_M_CD,
  volume      = "18",
  number      = "4",
  month       = "Jul.",
  pages       = "32--39",
  year        = "2002"
}
 
 
@INPROCEEDINGS{kakita06,
  author = {S. Kakita and others},
  title = {Functional Model Exploration for Multimedia Application via Algebraic Operators},
  booktitle = "ACSD",
  month = "June",
  year = "2006",
  pages = "229--238"
}
 
 
%S. Kalidindi, N. Huynh, B. Eklow, J. Goldstein,
%Real life system testing of networking equipment,
%ITC, Oct. 2004, pp. 1072 - 1077.
 
@InProceedings{kalidindi04,
  author =       {S. Kalidindi and N. Huynh and B. Eklow and J. Goldstein},
  title =        {{"Real life"} system testing of networking equipment},
  booktitle =    {ITC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1072--1077},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Flexible Architecture for System-On-Chip Video Codec [pdf]
%Tero Kangas, Erno Salminen, Kimmo Kuusilinna, Timo H�m�l�inen, and Jukka Saarinen
%Proceedings of Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2000)
%Honolulu, Hawaii, USA, November 5-8, 2000, pp. 216-221.
@InProceedings{kangas01,
  author =       {Tero Kangas and Erno Salminen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen and Jukka Saarinen},
  title =        {Flexible Architecture for System-On-Chip Video Codec},
  booktitle =    {ISPACS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {216--221},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Honolulu, Hawaii},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {kangas02} Kangas, T., \emph{et al.}: System-on-Chip Communication
%  Optimization with Bus Monitoring. In proc. DDECS (2002) 304-309
@InProceedings{kangas02,
  author =       {Tero Kangas and Vesa Lahtinen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {System-on-Chip Communication Optimization with Bus Monitoring},
  booktitle =    {DDECS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {304--309},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Brno, Czech Republic},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% 10.09.2006 NYK. VITTAUS T�H�N JULKAISULLA [P3]!!!
%\bibitem {kangas03} Kangas, T. et al.:
%Using a communication generator in SoC architecture exploration. In: Proc. of
%Symposium on System-on-chip (2003) 105-108
 
 
@InProceedings{kangas04,
  author =       {Tero Kangas and Jouni Riihim\"aki and Erno Salminen and Vesa Lahtinen and Heikki Orsila and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {A Communication-Centric Design Flow for {HIBI}-Based {SoCs}},
  booktitle =    {SAMOS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {474--483},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Article{kangas06,
  author =       {Tero Kangas and Kimmo Kuusilinna and Timo D. H\"am\"al\"ainen},
  title =        {Scalable Architecture for {SoC} Video Encoders},
  journal =      {Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology},
  year =         {2006},
  OPTkey =       {},
  volume =       {44},
  number =       {1-2},
  pages =        {79--95},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko H�nnik�inen, Timo D. H�m�l�inen, Jouni Riihim�ki, Kimmo Kuusilinna,
%"UML-based Multi-Processor SoC Design Framework",
%Transactions on Embedded Computing Systems,
%May 1, 2007, Vol.5, Issue 2, pp. 281-320
@Article{kangas06b,
  author =       {Tero Kangas and Petri Kukkala and Heikki Orsila and Erno Salminen and Marko H\"annik\"ainen and Timo D. H\"am\"al\"ainen and Jouni Riihim\"aki and Kimmo Kuusilinna},
  title =        {{UML-based} Multi-Processor {SoC} Design Framework},
  journal =      {ACM Trans. Embedded Computing Systems},
  year =         {2006},
  OPTkey =       {},
  volume =       {5},
  number =       {2},
  pages =        {281--320},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@PhdThesis{kangas06c,
  author =       {Tero Kangas},
  title =        {Methods and Implementations for Automated System on Chip Architecture Exploration},
  school =       {Tampere University of Technology},
  year =         {2006},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Karim, F.; Nguyen, A.; Dey, S.;
%An interconnect architecture for networking systems on chips
%Micro, IEEE
%Volume 22,  Issue 5,  Sept.-Oct. 2002 Page(s):36 - 45
@Article{karim02,
  author =       {F. Karim and A. Nguyen and S. Dey},
  title =        {An interconnect architecture for networking systems on chips},
  journal =      {IEEE Micro},
  year =         {2002},
  OPTkey =       {},
  volume =       {22},
  number =       {5},
  pages =        {36--45},
  month =        {Sep.-Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%New adaptive routing algorithm for extended generalized fat trees on-chip
%Kariniemi, H.; Nurmi, J.;
%System-on-Chip, 2003. Proceedings. International Symposium on
%19-21 Nov. 2003 Page(s):113 - 118
@InProceedings{kariniemi03a,
  author =       {Heikki Kariniemi and Jari Nurmi},
  title =        {New adaptive routing algorithm for extended generalized fat trees on-chip},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {113--118},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%H. Kariniemi and J. Nurmi, �
%Performance Evaluation of Three Arbiters for Internally Buffered Crossbar Switch�
%Proc. of The 3rd IASTED International Conference on Circuits, Signals, and Systems, Cancun, Mexico, May 19 � 21, 2003.
@InProceedings{kariniemi03b,
  author =       {Heikki Kariniemi and Jari Nurmi},
  title =        {Performance Evaluation of Three Arbiters for Internally Buffered Crossbar Switch},
  booktitle =    {IASTED International Conference on Circuits, Signals, and Systems},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Cancun, Mexico},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@InProceedings{kariniemi04,
  author =       {Heikki Kariniemi and Jari Nurmi},
  title =        {Reusable {XGFT} Interconnect {IP} for Network-On-Chip Implementations},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {94--102},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Fault tolerant XGFT network on chip for multi processor system on chip circuits
%Kariniemi, K.; Nurmi, J.;
%Field Programmable Logic and Applications, 2005. International Conference on
%24-26 Aug. 2005 Page(s):203 - 210
@InProceedings{kariniemi05a,
  author =       {Heikki Kariniemi and Jari Nurmi},
  title =        {Fault tolerant XGFT network on chip for multi processor system on chip circuits},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {203--210},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Fault-tolerant 2-D Mesh Network-On-Chip for MultiProcessor Systems-on-Chip
%Kariniemi, H.; Nurmi, J.;
%Design and Diagnostics of Electronic Circuits and systems, 2006 IEEE
%April 18-21, 2006 Page(s):184 - 189
@InProceedings{kariniemi05b,
  author =       {Heikki Kariniemi and Jari Nurmi},
  title =        {Fault-tolerant 2-D Mesh Network-On-Chip for MultiProcessor Systems-on-Chip},
  booktitle =    {DDECS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {184--189},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@PhdThesis{kariniemi06,
  author =       {Heikki Kariniemi},
  title =        {On-line reconfigurable extended generalized fat tree network-on-chip for multiprocessor system-on-chip circuits},
  school =       {Tampere University of Technology},
  year =         {2006},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%N. Kavaldjiev,  G.J.M. Smit,
%An energy-efficient network-on-chip for a heterogeneous tiled reconfigurable systems-on-chip,
%Euromicro Symposium on Digital System Design (DSD), 31 Aug.-3 Sept. 2004, pp. 492 - 498.
@InProceedings{kavaldjiev04a,
  author =       {N. Kavaldjiev and  G.J.M. Smit},
  title =        {An energy-efficient network-on-chip for a heterogeneous tiled reconfigurable systems-on-chip},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {492--498},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Kavaldjiev, N.; Smit, G.J.M.; Jansen, P.G.;
%A virtual channel router for on-chip networks
%SOC Conference, 2004. Proceedings. IEEE International
%12-15 Sept. 2004 Page(s):289 - 293
@InProceedings{kavaldjiev04b,
  author =       {N. Kavaldjiev and  G.J.M. Smit and P.G. Jansen},
  title =        {A virtual channel router for on-chip networks},
  booktitle =    {SOCC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {289--293},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Kavaldjiev, N.; Smit, G.J.M.; Jansen, P.G.; Wolkotte, P.T.;
%A virtual channel network-on-chip for GT and BE traffic
%Emerging VLSI Technologies and Architectures, 2006. IEEE Computer Society Annual Symposium on
%Volume 00,  2-3 March 2006 Page(s):6 pp.
@InProceedings{kavaldjiev06,
  author =       {N. Kavaldjiev and G.J.M. Smit and P.G. Jansen and P.T. Wolkotte},
  title =        {A virtual channel network-on-chip for {GT} and {BE} traffic},
  booktitle =    {ISVLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2006},
  OPTeditor =    {},
  volume =       {00},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {keating02} Keating, M., Bricaud, P.:
%  Manual 2nd edn. Kluwer Academic Publishers, Norwell, MA (2002)
@Book{keating02,
  author =       {Michael Keating and Pierre Bricaud},
  ALTeditor =    {},
  title =        {Reuse Methodology Manual},
  publisher =    kap,
  year =         {2002},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Norwell, MA},
  edition =      {Third},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {keutzer00} Keutzer, K., \emph{et al.}: System-Level Design:
%  Orthogonalization of Concerns and Platform-Based Design.
%  Computer-Aided Design of Integrated Circuits and Systems, vol. 19,
%  issue 12 (2000) 1523-1543
@Article{keutzer00,
  author =       {Kurt Keutzer and Sharad Malik and Richard Newton and Jan M. Rabaey and Alberto Sangiovanni-Vincentelli},
  title =        {System-Level Design: Orthogonalization of Concerns and Platform-Based Design},
  journal =      t-cadics,
  year =         {2000},
  OPTkey =       {},
  volume =       {19},
  number =       {12},
  OPTpages =     {1523--1543},
  month =        {Dec.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Daewook Kim, Manho Kim and Gerald E. Sobelman,
%"Design of a High-Performance Scalable CDMA Router for On-Chip Switched Networks,"
%Proceedings, International SoC Design Conference, pp. 32-35, 2005.
@InProceedings{kim05,
  author =       {Daewook Kim and Manho Kim and Gerald E. Sobelman},
  title =        {Design of a High-Performance Scalable {CDMA} Router for On-Chip Switched Networks},
  booktitle =    {ISSOC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {32--35},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Jongman Kim, Dongkook Park, Theo Theocharides, Narayanan Vijaykrishnan, Chita R. Das:
%A low latency router supporting adaptivity for on-chip interconnects.
%DAC 2005: 559-564
@InProceedings{kim_j05,
  author =       {Jongman Kim and Dongkook Park and Theo Theocharides and Narayanan Vijaykrishnan and Chita R. Das},
  title =        {A low latency router supporting adaptivity for on-chip interconnects},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {559-564},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@ARTICLE{kim_s05,
  author = {S. Kim and C. Im and S. Ha},
  title = {Schedule-Aware Performance Estimation of Communication Architecture for Efficient Design Space Exploration},
  journal = "IEEE Trans. VLSI Systems",
  volume = "13",
  number = "5",
  month = "May",
  year = "2005",
  pages = "539--552"
}
 
 
 
 
@Book{kogel06,
  author =       {Tim Kogel and Rainer Leupers and Heinrich Meyer},
  ALTeditor =    {},
  title =        {Integrated System-level Modeling of Network-on-Chip enabled Multiprocessor Platforms},
  publisher =    {Springer},
  year =         {2006},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Dordrecht, The Netherlands},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%K. Kozminski,
%Benchmarks for layout synthesis - evolution and current status,
%Design Automation Conference (DAC), June 17-21, 1991, pp. 265 - 270.
@InProceedings{kozminski91,
  author =       {K. Kozminski},
  title =        {Benchmarks for layout synthesis - evolution and current status},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {265--270},
  year =         {1991},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%An 81.6 GOPS Object Recognition Processor Based on NoC and Visual Image Processing Memory
%Kim, Donghyun; Kim, Kwanho; Kim, Joo-Young; Lee, Seungjin; Yoo, Hoi-Jun;
%Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
%16-19 Sept. 2007 Page(s):443 - 446
%Digital Object Identifier 10.1109/CICC.2007.4405769
@InProceedings{kim_d07,
  author =       {Donghyun Kim and  Kwanho Kim and Joo-Young Kim and Seungjin Lee and Hoi-Jun Yoo},
  title =        {An 81.6 {GOPS} Object Recognition Processor Based on {NoC} and Visual Image Processing Memory},
  booktitle =    {CICC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {443-446},
  OPTyear =      {},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%C. Kretzschmar, A.K. Nieuwland, D. Muller,
%Why transition coding for power minimization of on-chip buses does not work,
%Proceedings Design, Automation and Test in Europe Conference and Exhibition (DATE),
%16-20 Feb. 2004, Vol 1, pp. 512 - 517.
@InProceedings{kretzschmar04,
  author =       {C. Kretzschmar and A.K. Nieuwland and D. Muller},
  title =        {Why transition coding for power minimization of on-chip buses does not work},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {512--517},
  year =         {2004},
  OPTeditor =    {},
  volume =       {1},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {kreutz01} Kreutz, M.E. et al.:
%Communication architectures for system-on-chip.
%In: Proc. of SBCCI (2001) 14-19
@InProceedings{kreutz01,
  author =       {Marcio E. Kreutz and Luigi Carro and Cesar A. Zeferino and Altamiro A. Susin},
  title =        {Communication architectures for system-on-chip},
  booktitle =    {SBCCI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {14--19},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Pirenopolis, Brazil},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Kreutz, M.; Marcon, C.; Carro, L.; Calazans, N.; Susin, A.A.;
%Energy and latency evaluation of NoC topologies
%Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
%23-26 May 2005 Page(s):5866 - 5869 Vol. 6
@InProceedings{kreutz05,
  author =       {M. Kreutz and L. Marcon and L. Carro and N. Calazans and A.A. Susin},
  title =        {Energy and latency evaluation of {NoC} topologies},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {5866--5869},
  year =         {2005},
  OPTeditor =    {},
  volume =       {6},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kobe, Japan},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%P. Kukkala, V. Helminen, M. H�nnik�inen, T. H�m�l�inen,
%UML 2.0 implementation of an embedded WLAN protocol,
%PIMRC, Sep. 2004, Barcelona, Spain, pp. 1158-1162.
@InProceedings{kukkala04,
  author =       {P. Kukkala and V. Helminen and M. H\"annik\"ainen and T. H\"am\"al\"ainen},
  title =        {{UML 2.0} implementation of an embedded {WLAN} protocol},
  booktitle =    {PIMRC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1158--1162},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Barcelona, Spain},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{kukkala05,
  author =       {P. Kukkala and  M. H\"annik\"ainen and T. H\"am\"al\"ainen},
  title =        {Co-simulation of Wireless Local Area Network Terminals with Protocol Software Implemented in {SDL}},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {161--164},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Porto, Portugal},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Petri Kukkala, Mikko Set�l�, Tero Arpinen, Erno Salminen, Marko H�nnik�inen, Timo D. H�m�l�inen,
%Implementing a WLAN Video Terminal Using UML and Fully-Automated Design Flow,
%EURASIP Journal on Embedded Systems, January 10, 2007,
%Issue Embedded Digital Signal Processing Systems� edited by Jarmo Henrik Takala, Shuvra Bhattacharyya, and Gang Qu., 15 pages.
@Article{kukkala07,
  author =       {Petri Kukkala and Mikko Set\"al\"a and Tero Arpinen and Erno Salminen and M. H\"annik\"ainen and T. H\"am\"al\"ainen},
  title =        {Implementing a {WLAN} Video Terminal Using {UML} and Fully-Automated Design Flow},
  journal =      {EURASIP Journal on Embedded Systems},
  year =         {2007},
  OPTkey =       {},
  OPTvolume =    {},
  number =       {Embedded Digital Signal Processing Systems},
  OPTpages =     {},
  month =        {Jan},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Ari Kulmala, "Multiprocessor System with General-Purpose Interconnection Architecture on FPGA", Tampere, Finland, 2005, 73 pages, Tampere University of Technology.
@MastersThesis{kulmala05,
  author =       {Ari Kulmala},
  title =        {Multiprocessor System with General-Purpose Interconnection Architecture on {FPGA}},
  school =       {Tampere University of Technology},
  year =         {2005},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Ari Kulmala, Olli Lehtoranta, Timo D. H�m�l�inen, Marko H�nnik�inen,
%"Scalable MPEG-4 Encoder on FPGA Multiprocessor SoC",
%EURASIP Journal on Embedded Systems, June 27, 2006, Vol.2006, Issue Field-Programmable Gate Arrays in Embedded Systems,
%15 pages, Hindawi Publishing Corporation.
@Article{kulmala06a,
  author =       {Ari Kulmala and Olli Lehtoranta and Timo D. H\"am\"al\"ainen and Marko H\"annik\"ainen},
  title =        {Scalable {MPEG-4} Encoder on {FPGA} Multiprocessor {SoC}},
  journal =      {EURASIP Journal on Embedded Systems},
  year =         {2006},
  OPTkey =       {},
  OPTvolume =    {2006},
  number =       {Field-Programmable Gate Arrays in Embedded Systems},
  OPTpages =     {15},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Ari Kulmala, Timo D. H�m�l�inen, Marko H�nnik�inen,
%Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA",
%9th Euromicro Conference on Digital System Design, Cavtat, Croatia, August 30, 2006 - September 1, 2006, pp. 83-86.
@InProceedings{kulmala06b,
  author =       {Ari Kulmala and Timo D. H\"am\"al\"ainen and Marko H\"annik\"ainen},
  title =        {Comparison of {GALS} and Synchronous Architectures with {MPEG-4} Video Encoder on Multiprocessor System-on-Chip {FPGA}},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {83--86},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Ari Kulmala, Erno Salminen, Timo D. H�m�l�inen,
%Distributed Bus Arbitration Algorithm Comparison on FPGA Based MPEG-4 Multiprocessor SoC",
%Norchip 2006, Link�ping, Sweden, November 20-21, 2006, pp. 167-170
@InProceedings{kulmala06c,
  author =       {Ari Kulmala and Erno Salminen and Marko H\"annik\"ainen and Timo D. H\"am\"al\"ainen},
  title =        {Distributed Bus Arbitration Algorithm Comparison on {FPGA} Based {MPEG-4} Multiprocessor {SoC}},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {167--170},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Link\"oping, Sweden},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Ari Kulmala, Erno Salminen, Marko H�nnik�inen, Timo D. H�m�l�inen,
%Evaluating SoC Network Performance in MPEG-4 Encoder,
%SIPS, Oct. 2006, pp. 261--267.
@InProceedings{kulmala06d,
  author =       {Ari Kulmala and Erno Salminen and Timo D. H\"am\"al\"ainen},
  title =        {Evaluating {SoC} Network Performance in {MPEG-4} Encoder},
  booktitle =    {SIPS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {271--276},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Banff, Canada},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Ari Kulmala, Timo D. H�m�l�inen, Marko H�nnik�inen, "
%Reliable GALS Implementation of MPEG-4 Encoder with Mixed Clock FIFO on Standard FPGA",
%16th International Conference on Field Programmable Logic and Applications (FPL 2006),
%Madrid, Spain, August 28-30, 2006, pp. 495-500, IEEE.
@InProceedings{kulmala06e,
  author =       {Ari Kulmala and Marko H\"annik\"ainen and Timo D. H\"am\"al\"ainen},
  title =        {Reliable {GALS} Implementation of {MPEG-4} Encoder with Mixed Clock {FIFO} on Standard {FPGA}},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {495--500},
  OPTyear =      {},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Madrid, Spain},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Ari Kulmala, Erno Salminen, Timo D. H�m�l�inen,
%Prototyping and Evaluating Large System-on-Chips on Multi-FPGA Platform
%SAMOS VII, Jul. 2007, pp. 179-189.
@InProceedings{kulmala07,
  author =       {Ari Kulmala and Erno Salminen and Timo D. H\"am\"al\"ainen},
  title =        {Prototyping and Evaluating Large System-on-Chips on {Multi-FPGA} Platform},
  booktitle =    {SAMOS VII},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {179-189},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
% Ari Kulmala, Erno Salminen, Marko H�nnik�inen, Timo D. H�m�l�inen,
%"Evaluating SoC Network Performance in MPEG-4 Encoder",
%The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, May 15-15, 2007, 19 pages, Springer US.
@Article{kulmala08a,
  author =       {Ari Kulmala and Erno Salminen and Timo D. H\"am\"al\"ainen},
  title =        {Evaluating {SoC} Network Performance in {MPEG-4} Encoder},
  journal =      {Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology},
  year =         {2008},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  pages =        {},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {SIPS-laajennos}
}
 
 
%Ari Kulmala, Erno Salminen, Timo D. H�m�l�inen,
%Distributed Bus Arbitration Algorithm Comparison on FPGA Based MPEG-4 Multiprocessor SoC
%IET Computers and Digital Techniques, May 11-11, 2007, IET, Submitted.
@Article{kulmala08b,
  author =       {Ari Kulmala and Erno Salminen and Timo D. H\"am\"al\"ainen},
  title =        {Distributed Bus Arbitration Algorithm Comparison on {FPGA} Based {MPEG-4} Multiprocessor {SoC}},
  journal =      {IET Computers and Digital Techniques},
  year =         {2008},
  OPTkey =       {},
  volume =       {2},
  number =       {4},
  pages =        {314--325},
  month =        {Jul.},
  OPTnote =      {},
  OPTannote =    {Norchip-laajennos}
}
 
%Shashi Kumar, Axel Jantsch, Juha-Pekka Soininen, Martti Forsell, Mikael Millberg, Johnny �berg, Kari Tiensyrj�, and Ahmed Hemani.
%A network on chip architecture and design methodology.
%In Proceedings of IEEE Computer Society Annual Symposium on VLSI, April 2002., pp.105-112
@InProceedings{kumar02,
  author =       {Shashi Kumar and Axel Jantsch and Juha-Pekka Soininen and Martti Forsell and Mikael Millberg and Johnny \"Oberg and Kari Tiensyrj\"a and Ahmed Hemani},
  title =        {A network on chip architecture and design methodology},
  booktitle =    {VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {105--112},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {April},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {kuusilinna98} Kuusilinna, K., \emph{et al.}: Low-Latency Interconnection for
%  IP-Block Based Multimedia Chips. In proc. PDCN (1998) 411-416
@InProceedings{kuusilinna98,
  author =       {K. Kuusilinna and Timo H\"am\"al\"ainen and Pasi Liimatainen and Jukka Saarinen},
  title =        {Low-Latency interconnection for {IP}-Block Based Multimedia Chips},
  booktitle =    {PDCN},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {411--416},
  year =         {1998},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Brisbane, Australia},
  month =        {Dec.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Kuon, I.; Rose, J.;
%Measuring the Gap Between FPGAs and ASICs
%Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
%Volume 26,  Issue 2,  Feb. 2007 Page(s):203 - 215
%Digital Object Identifier 10.1109/TCAD.2006.884574
@Article{kuon07,
  author =       {I Kuon and J. Rose},
  title =        {Measuring the Gap Between {FPGA}s and {ASICs}},
  journal =      t-cadics,
  year =         {2007},
  OPTkey =       {},
  volume =       {26},
  number =       {2},
  pages =        {203--215},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% LLL
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%\bibitem {lahiri01} Lahiri, K. et al.:
%Evaluation of the traffic-performance characteristics of system-on-chip communication architectures.
%In Proc. of Conference on VLSI Design (2001) 29-35
@InProceedings{lahiri01,
  author =       {Kanishka Lahiri and Anand Raghunathan and Sujit Dey},
  title =        {Evaluation of the traffic-performance characteristics of system-on-chip communication architectures},
  booktitle =    {VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {29--35},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Bangalore, India},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Design space exploration for optimizing on-chip communication architectures,
%K. Lahiri, A. Raghunathan, S. Dey,
%IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
%Vol. 23 , Iss. 6, June 2004, pp. 952 - 961.
@Article{lahiri04,
  author =       {Kanishka Lahiri and Anand Raghunathan and Sujit Dey},
  title =        {Design space exploration for optimizing on-chip communication architectures},
  journal =      t-cadics,
  year =         {2004},
  OPTkey =       {},
  volume =       {23},
  number =       {6},
  pages =        {952-961},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {lahtinen02} Lahtinen. V., \emph{et al.}: Interconnection scheme for
%  continuous-media systems-on-chip. Microprocessors and Microsystems
%  vol. 26, issue 3 (2002) 123-138
@Article{lahtinen02,
  author =       {Vesa Lahtinen and Kimmo Kuusilinna and Tero Kangas and Timo H\"am\"al\"ainen},
  title =        {Interconnection scheme for continuous-media systems-on-chip},
  journal =      {Microprocessors and Microsystems},
  year =         {2002},
  OPTkey =       {},
  volume =       {26},
  number =       {3},
  pages =        {123--138},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@InProceedings{lahtinen03,
  author =       {Vesa Lahtinen and Erno Salminen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {Comparison of Synthesized Bus and Crossbar Interconnection Architectures},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {433--436},
  year =         {2003},
  OPTeditor =    {},
  volume =       {5},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. H�m�l�inen, Tero Kangas,
% Reducing SoC Power Consumption with Generic Interconnection Components and TDMA-based Arbitration,
% IEEE International Workshop on Design and Diagnostics of Electronics Circuits and Systems (DDECS 2003), Poznan, Poland, April 14-16, 2003, pp. 261-268.
@InProceedings{lahtinen03b,
  author =       {Vesa Lahtinen and Tero Kangas and Erno Salminen and Kimmo Kuusilinna and Timo D. H\"am\"al\"ainen},
  title =        {Reducing {SoC} Power Consumption with Generic Interconnection Components and {TDMA-based} Arbitration},
  booktitle =    {DDECS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {261--268},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Poznan, Poland},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@PhdThesis{lahtinen04,
  author =       {Vesa Lahtinen},
  title =        {Design and Analysis of Interconnection Architectures},
  school =       {Tampere University of Technology},
  year =         {2004},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {Tampere, Finland},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
% Power breakdown analysis for a heterogeneous NoC platform running a video application
%Lambrechts, A.   Raghavan, P.   Leroy, A.   Talavera, G.   Aa, T.V.   Jayapala, M.   Catthoor, F.   Verkest, D.   Deconinck, G.   Corporaal, H.   Robert, F.   Carrabina, J.
%Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on,
%Publication Date: 23-25 July 2005, On page(s): 179- 184
@InProceedings{lambrechts05,
  author =       {A. Lambrechts  and others},
  title =        {Power breakdown analysis for a heterogeneous {NoC} platform running a video application},
  booktitle =    {ASAP},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {179--184},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip
%Lattard, D.; Beigne, E.; Clermidy, F.; Durand, Y.; Lemaire, R.; Vivet, P.; Berens, F.;
%Solid-State Circuits, IEEE Journal of
%Volume 43,  Issue 1,  Jan. 2008 Page(s):223 - 235
%Digital Object Identifier 10.1109/JSSC.2007.909339
@Article{lattard08,
  author =       {D. Lattard and E. Beigne and F. Clermidy and  Y. Durand and R. Lemaire and  P. Vivet and F. Berens},
  title =        {A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip},
  journal =      j-ssc,
  year =         {2008},
  OPTkey =       {},
  volume =       {43},
  number =       {1},
  pages =        {223--235},
  month =        {Jan.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%H. G. Lee, U. Y. Ogras, R. Marculescu, N. Chang,
%Design Space Exploration and Prototyping for On-chip Multimedia Applications,
%Design Automation Conference, 2006 43rd ACM/IEEE
%24-28 July 2006 Page(s):137 - 142
@InProceedings{lee_hg06,
  author =       {H. G. Lee and U. Y. Ogras and R. Marculescu and N. Chang},
  title =        {Design Space Exploration and Prototyping for On-chip Multimedia Applications},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {137--142},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Kangmin Lee; Se-Joong Lee; Sung-Eun Kim; Hye-Mi Choi; Donghyun Kim; Sunyoung Kim; Min-Wuk Lee; Hoi-Jun Yoo;
%A 51mW 1.6GHz on-chip network for low-power heterogeneous SoC platform
%Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International , 15-19 Feb. 2004
%Pages:152 - 518 Vol.1
@InProceedings{lee_k04,
  author =       {Kangmin Lee and Se-Joong Lee and Sung-Eun Kim and Hye-Mi Choi and Donghyun Kim and Sunyoung Kim and Min-Wuk Lee and Hoi-Jun Yoo},
  title =        {A {51mW} {1.6GHz} on-chip network for low-power heterogeneous {SoC} platform},
  booktitle =    {ISSCC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {152--158},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {1},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo,
%Low-Power Network-on-Chip for High-Performance SoC Design,
%IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 14, no. 2, pp. 148-160, Feb 2006.
@Article{lee_k06,
  author =       {Kangmin Lee and Se-Joong Lee and Hoi-Jun Yoo},
  title =        {Low-Power Network-on-Chip for High-Performance {SoC} Design},
  journal =      t-vlsi,
  year =         {2006},
  OPTkey =       {},
  volume =       {14},
  number =       {2},
  pages =        {148--160},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Kangmin Lee, Se-Joong Lee, Donghyun Kim, Kwanho Kim, Gawon Kim, Joungho Kim, Hoi-Jun Yoo,
%Networks-on-Chip and Networks-in-Package for High-Performance SoC Platforms,
%IEEE Asian Solid Stated Circuits Conference (A-SSCC - Design Contest), Nov. 2005.
@InProceedings{lee_k05b,
  author =       {Kangmin Lee and Se-Joong Lee and Donghyun Kim and Kwanho Kim and Gawon Kim and Joungho Kim and Hoi-Jun Yoo},
  title =        {Networks-on-Chip and Networks-in-Package for High-Performance {SoC} Platforms},
  booktitle =    {A-SSCC},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {!!!},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Sanghun Lee; Chanho Lee; Hyuk-Jae Lee,
%A new multi-channel on-chip-bus architecture for system-on-chips
%IEEE International SOC Conference, Santa Clara, CA, 12-15 Sept. 2004, pp. 305- 308
@InProceedings{lee_s04,
  author =       {Sanghun Lee and Chanho Lee and Hyuk-Jae Lee},
  title =        {A new multi-channel on-chip-bus architecture for system-on-chips},
  booktitle =    {SOCC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {305--308},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Se-Joong Lee, Kangmin Lee, Seong-Jun Song, Hoi-Jun Yoo,
%Packet-Switched On-Chip Interconnection Network for System-on-Chip Applications,
%IEEE Transactions on Circuits and Systems II, vol. 52, no. 6, pp. 308-312, June 2005.
@Article{lee_s05a,
  author =       {Se-Joong Lee and Kangmin Lee and Seong-Jun Song and Hoi-Jun Yoo},
  title =        {Packet-Switched On-Chip Interconnection Network for System-on-Chip Applications},
  journal =      {IEEE Trans. Circuits and Systems II},
  year =         {2005},
  OPTkey =       {},
  volume =       {52},
  number =       {6},
  pages =        {308--312},
  month =        {Jun.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Se-Joong Lee, Kangmin Lee, Hoi-Jun Yoo,
%Analysis and Implementation of Practical Cost-Effective Network-on-Chips,
%IEEE Design & Test of Computers Magazine (Special Issue for NoC), Sept. 2005.
@Article{lee_s05b,
  author =       {Se-Joong Lee and Kangmin Lee and Hoi-Jun Yoo},
  title =        {Analysis and Implementation of Practical Cost-Effective Network-on-Chips},
  journal =      {IEEE Des. Test Comput.},
  year =         {2005},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTpages =     {!!!},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko H�nnik�inen, Timo D. H�m�l�inen, "A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC", 15th International Conference on Field Programmable Logic and Applications (FPL 2005), Tampere, Finland, August 24-26, 2005
@InProceedings{lehtoranta05,
  author =       {Olli Lehtoranta and Erno Salminen and Ari Kulmala and Marko H\"annik\"ainen and Timo H\"am\"al\"ainen},
  title =        {A Parallel {MPEG-4} Encoder for {FPGA} Based Multiprocessor {SoC}},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {380--385},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@Book{lenoski95,
  author =       {Daniel E. Lenoski and Wolf-Dietrich Weber},
  ALTeditor =    {},
  title =        {Scalable Shared-memory Multiprocessing},
  publisher =    {Morgan Kaufman Publishers Inc.},
  year =         {1995},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {San Francisco, CA, USA},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%A. Leroy, P. Marchal, A. Shickova, F. Catthoor, F. Robert, D. Verkest,
%Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs,
% CODES+ISSS�05, Sept. 19�21, 2005, Jersey City, New Jersey, USA, pp .81-86.
@InProceedings{leroy05,
  author =       {A. Leroy and P. Marchal and A. Shickova and F. Catthoor and F. Robert and D. Verkest},
  title =        {Spatial division multiplexing: a novel approach for guaranteed throughput on {NoCs}},
  booktitle =    {CODES+ISSS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {81--86},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {New Jersey, NJ, USA},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%K.Y. Leung, K.H. Yeung,
%The design and implementation of a WWW traffic generator,
%Seventh International Conference on Parallel and Distributed Systems,
%4-7 July 2000, pp. 509 - 514.
@InProceedings{leung00,
  author =       {K.Y. Leung and K.H. Yeung},
  title =        {The design and implementation of a {WWW} traffic generator},
  booktitle =    {ICPADS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {509--514},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{leverich07,
 author    = {Jacob Leverich and Hideho Arakida and Alex Solomatnikov and Amin Firoozshahian and Mark Horowitz and Christos Kozyrakis},
 title     = {Comparing memory systems for chip multiprocessors},
 booktitle = {ISCA},
 OPTbooktitle = {ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture},
 year      = {2007},
 OPTisbn      = {978-1-59593-706-3},
 pages     = {358--368},
 location  = {San Diego, California, USA},
  month =        {Jun.},
 OPTdoi       = {http://doi.acm.org/10.1145/1250662.1250707},
 OPTpublisher = {ACM Press},
 OPTaddress   = {New York, NY, USA},
 }
 
%\bibitem {liang04} Jian Liang et al.:
%An architecture and compiler for scalable on-chip communication.
%In: TVLSI, Vol. 12, Iss. 7, (2004) 711-726
@Article{liang04,
  author =       {Jian Liang and Andrew Laffely and Sriram Srinivasan and Russell Tessier},
  title =        {An architecture and compiler for scalable on-chip communication},
  journal =      t-vlsi,
  year =         {2004},
  OPTkey =       {},
  volume =       {12},
  number =       {7},
  pages =        {711--726},
  month =        {Jul.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% P. Liljeberg, J. Plosila, J. Isoaho,
%Self-timed ring architecture for SOC applications,
%IEEE International SOC [Systems-on-Chip] Conference, 17-20 Sept. 2003, pp. 359- 362
@InProceedings{liljeberg03,
  author =       {Pasi Liljeberg and Juha Plosila and Jouni Isoaho},
  title =        {Self-timed ring architecture for {SOC} applications},
  booktitle =    {SOCC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {359--362},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {lines04} Lines, A.,
%Asynchronous interconnect for synchronous SoC design.
%In: Micro, Vol. 24,  Iss. 1, (2004) 32-41
@Article{lines04,
  author =       {Andrew Lines},
  title =        {Asynchronous interconnect for synchronous {SoC} design},
  journal =      {IEEE Micro},
  year =         {2004},
  OPTkey =       {},
  volume =       {24},
  number =       {1},
  pages =        {32--41},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%  Jian Liu , Li-Rong Zheng and Hannu Tenhunen,
% Interconnect intellectual property for Network-on-Chip (NoC) ,
%Journal of Systems Architecture, Vol. 50, Iss. 2-3, February 2004, pp. 65-79.
@Article{liu04,
  author =       {Jian Liu and Li-Rong Zheng and Hannu Tenhunen},
  title =        {Interconnect intellectual property for Network-on-Chip {(NoC)}},
  journal =      {Journal of Systems Architecture},
  year =         {2004},
  OPTkey =       {},
  volume =       {50},
  number =       {2-3},
  pages =        {65--79},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Loghi, M.   Angiolini, F.   Bertozzi, D.   Benini, L.   Zafalon, R.
%Analyzing on-chip communication in a MPSoC environment
%This paper appears in: Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
%Publication Date: Feb. 16-20, 2004
%On page(s): 752- 757
%Volume: 2,   ISSN: 1530-1591
@InProceedings{loghi04,
  author =       {M. Loghi and F. Angiolini and D. Bertozzi and L. Benini and R. Zafalon},
  title =        {Analyzing on-chip communication in a {MPSoC} environment},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {752--757},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Samba-bus: a high performance bus architecture for system-on-chips
%Ruibing Lu; Cheng-Kok Koh;
%Computer Aided Design, 2003 International Conference on. ICCAD-2003 , Nov. 9-13, 2003
%Pages:8 - 12
@InProceedings{lu03,
  author =       {Ruibing Lu and Cheng-Kok Koh},
  title =        {Samba-bus: a high performance bus architecture for system-on-chips},
  booktitle =    {ICCAD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {8--12},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Zhonghai Lu, Mingchen Zhong, and Axel Jantsch.
%Evaluation of onchip networks using deflection routing.
%In Proceedings of the 16th Great Lakes Symposium on VLSI (GLSVLSI'06), Philadephia, USA, May 2006.
@InProceedings{lu06,
  author =       {Zhonghai Lu and Mingchen Zhong and Axel Jantsch},
  title =        {Evaluation of on-chip networks using deflection routing},
  booktitle =    {GLSVLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {296--301},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Philadelphia, PA, USA},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
 
@Manual{lu08,
  title =        {Network-on-Chip Benchmarking Specification Part 2: Micro-Benchmark Specification Version 1.0},
  OPTkey =       {},
  author =       {Zhonghai Lu and Axel Jantsch and Erno Salminen and Cristian Grecu},
  organization = {OCP-IP},
  OPTaddress =   {},
  OPTedition =   {},
  month =        {May},
  year =         {2008},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% MMM
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
%S. Mahadevan et al.,
%Network traffic generator model for fast network-on-chip simulation,
%DATE, 7-11 Mar. 2005, Vol. 2, pp. 780-785.
@InProceedings{mahadevan05,
  author =       {Shankar Mahadevan and Federico Angiolini and Michael Storgaard and Rasmus Gr�ndahl Olsen and Jens Spars� and Jan Madsen},
  title =        {Network traffic generator model for fast network-on-chip simulation},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {780--785},
  year =         {2005},
  OPTeditor =    {},
  volume =       {2},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%E. Malley, A. Salinas, K. Ismail, L. Pileggi, L.
%Power comparison of throughput optimized IC busses,
%VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on , 20-21 Feb. 2003, pp. 35 -44.
@InProceedings{malley03,
  author =       {E. Malley and A. Salinas and K. Ismail and L. Pileggi},
  title =        {Power comparison of throughput optimized {IC} busses},
  booktitle =    {VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {35--44},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Manegold, S.; Boncz, P.; Kersten, M.;, Optimizing main-memory join on modern hardware
%Knowledge and Data Engineering, IEEE Transactions on
%Volume 14,  Issue 4,  July-Aug. 2002 Page(s):709 - 730
@Article{manegold02,
  author =       {S. Manegold and  P. Boncz and  M. Kersten},
  title =        {Optimizing main-memory join on modern hardware},
  journal =      {IEEE Trans. Knowledge and Data Engineering},
  year =         {2002},
  OPTkey =       {},
  volume =       {14},
  number =       {4},
  pages =        {709--730},
  month =        {Jul.-Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%The Impact of Higher Communication Layers on NoC Supported MP-SoCs
%Marescaux, T.; Brockmeyer , E.; Corporaal, H.;
%Networks-on-Chip, 2007. NOCS 2007. First International Symposium on
%7-9 May 2007 Page(s):107 - 116
 
 
@InProceedings{marescaux07,
  author =       {T. Marescaux and  E. Brockmeyer and H. Corporaal},
  title =        {The Impact of Higher Communication Layers on {NoC} Supported {MP-SoCs}},
  booktitle =    {NOCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {107--116},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%E.J. Marinissen, V. Iyengar, K. Chakrabarty,
%A set of benchmarks for modular testing of SOCs,
%International Test Conference, 7-10 Oct. 2002, pp. 519 - 528.
@InProceedings{marinissen02,
  author =       {E.J. Marinissen and V. Iyengar and K. Chakrabarty},
  title =        {A set of benchmarks for modular testing of {SOCs}},
  booktitle =    {ITC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {519--528},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Misc{mello04,
  OPTkey =       {},
  author =       {Aline Vieira de Mello and Leandro Heleno M\"oller},
  title =        {Hermes project web page},
  howpublished = {[online], http://toledo.inf.pucrs.br/~gaph/Projects/Hermes/Hermes.html},
  OPTmonth =     {},
  year =         {2004},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{mello06,
  author =       {Alinen Mello and Leonel Tedesco and Ney Calazans and Fernando Moraes},
  title =        {Evaluation of current {QoS} Mechanisms in Network on Chip},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {115--118},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, and Axel Jantsch.
%The Nostrum backbone - a communication protocol stack for networks on chip.
%In Proceedings of the VLSI Design Conference, Mumbai, India,
@InProceedings{millberg04,
  author =       {Mikael Millberg and Erland Nilsson and Rikard Thid and Shashi Kumar and Axel Jantsch},
  title =        {The Nostrum backbone - a communication protocol stack for networks on chip},
  booktitle =    {VLSI design},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Mumbai, India},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip,
%M. Millberg, E. Nilsson, R. Thid, A. Jantsch,
%In Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE),
%16-20 Feb. 2004, Vol. 2, pp. 890 - 895.
@InProceedings{millberg04b,
  author =       {M. Millberg and E. Nilsson, R. Thid and A. Jantsch},
  title =        {Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {890--895},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Abhishek Mitra, Marcello Lajolo,Kanishka Lahiri
%SOFTENIT: a methodology for boosting the software content of system-on-chip designs
%Proceedings of the 15th ACM Great Lakes symposium on VLSI
%Chicago, Illinois, USA
%Pages: 361 - 366, 2005
@InProceedings{mitra05,
  author =       {Abhishek Mitra and Marcello Lajolo and Kanishka Lahiri},
  title =        {{SOFTENIT}: a methodology for boosting the software content of system-on-chip designs},
  booktitle =    {GLSVLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {361--366},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Misc{mody06,
  OPTkey =       {},
  author =       {Mihir Mody},
  title =        {Video encoding, {SoC} development, and {TI's DSP} architecture},
  howpublished = {Video/Imaging design line, CMP MEdia LLC, online: http://www.videsignline.},
  month =        {May},
  year =         {2006},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@INPROCEEDINGS{mohanty02,
  author = {S. Mohanty and V. Prasanna},
  title = {Rapid System-Level Performance Evaluation and Optimization for Application Mapping onto {SoC} Architectures}},
  booktitle = "IEEE Int. ASIC/SOC Conf.",
  month = "Sept.",
  year = "2002",
  pages = "160--167"
}
 
 
%F. Mondinelli, M. Borgatti, Z.M.K. Vajna,
%A 0.13 um 1Gb/s/channel store-and-forward network on-chip,
%IEEE International SOC Conference, 12-15 Sept. 2004, pp. 141 - 142
@InProceedings{mondinelli04,
  author =       {F. Mondinelli and M. Borgatti and Z.M.K. Vajna},
  title =        {A 0.13 um {1Gb/s/channel} store-and-forward network on-chip},
  booktitle =    {SOCC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {141--142},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{moore65,
  author =       {Gordon E. Moore},
  title =        {Cramming more components onto integrated circuits},
  journal =      {Electronics magazine},
  year =         {1965},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  pages =        {114--117},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%G.E.  Moore,
%No exponential is forever: but "Forever" can be delayed!,
%IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers,
%2003, pp. 20 - 23 vol.1.
@InProceedings{moore03,
  author =       {Gordon E. Moore},
  title =        {No exponential is forever: but {"Forever"} can be delayed!},
  booktitle =    {ISSCC, Digest of Technical Papers},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {20--23},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {moraes03} Moraes, F., \emph{et al.}: A Low Area Overhead
%  Packet-Switched Network on Chip: Architecture and Prototyping. In
%  proc. IFIP VLSI-SOC (2003) 174-179
@InProceedings{moraes03,
  author =       {Fernando  Moraes and Aline Mello and Leandro M\"oller and Luciano Ost and Ney Calazans},
  title =        {A Low Area Overhead Packet-Switched Network on Chip: Architecture and Prototyping},
  booktitle =    {IFIP VLSO-SOC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {174--179},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Darmstadt, Germany},
  month =        {Dec.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%HERMES: an infrastructure for low area overhead packet-switching networks on chip,
%F. Moraes, N. Calazans, A. Mello, L. M�ller, L. Ost,
%Integration, the VLSI Journal, Vol. 38, Iss. 1, Oct. 2004, Pages 69-93.
@Article{moraes04,
  author =       {Fernando Moraes and  Ney Calazans and Aline Mello and Leandro M\"oller and Luciano Ost},
  title =        {HERMES: an infrastructure for low area overhead packet-switching networks on chip},
  journal =      {Integration, the VLSI Journal},
  year =         {2004},
  OPTkey =       {},
  volume =       {38},
  number =       {1},
  pages =        {69--93},
  month =        {Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%A. Morgenshtein, I. Cidon, A. Kolodny, R. Ginosar, Comparative analysis of serial vs parallel links in NoC,
%System-on-Chip, 2004. Proceedings. 2004 International Symposium on , vol., no., pp. 185-188, 16-18 Nov. 2004.
@InProceedings{morgenshtein04,
  author =       {A. Morgenshtein and I. Cidon and A. Kolodny and R. Ginosar},
  title =        {Comparative analysis of serial vs parallel links in {NoC}},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {185--188},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%R. Mullins and A. West and S. Moore
%The design and implementation of a low-latency on-chip network
%Design Automation, 2006. Asia and South Pacific Conference on
%24-27 Jan. 2006 Page(s):6 pp.
@InProceedings{mullins06,
  author =       {R. Mullins and A. West and S. Moore},
  title =        {The design and implementation of a low-latency on-chip network},
  booktitle =    {ASP-DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{mullins06b,
  author =       {R. Mullins},
  title =        {Minimising Dynamic Power Consumption in On-Chip Networks},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {119--122},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% S. Murali, G. de Micheli,
%Bandwidth-constrained mapping of cores onto NoC architectures,
%DATE, Paris, France, Feb. 2004, Vol 2, pp. 896-901.
@InProceedings{murali04,
  author =       {Srinivasan Murali and Giovanni de Micheli},
  title =        {Bandwidth-constrained mapping of cores onto {NoC} architectures},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {896--901},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {2},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Paris, France},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems-on-Chips
%S. Murali, P. Meloni, F. Angiolini, D. Atienza, S. Carta, L. Benini, L. Raffo, G. De Micheli
%14th Annual IFIP International Conference on Very Large Scale Integration (VLSI-SoC) (Congress)        2006
@InProceedings{murali06,
  author =       {S. Murali and P. Meloni and F. Angiolini and D. Atienza and S. Carta and L. Benini and L. Raffo and Giovanni de Micheli},
  title =        {Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems-on-Chips},
  booktitle =    {IFIP},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {??},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% NNN
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%C. Neeb, M.J. Thul, N. Wehn,
%Network-on-Chip-Centric Approach to interleaving in high throughput channel decoders,
%ISCAS, May 2005, pp.1766-1769.
@InProceedings{neeb05,
  author =       {C. Neeb and M.J. Thul and N. Wehn},
  title =        {Network-on-Chip-Centric Approach to interleaving in high throughput channel decoders},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1766--1769},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kobe, Japana},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@MastersThesis{nilsson02,
  author =       {Erland Nilsson},
  title =        {Design and implementation of a hot-potato switch in network on chip},
  school =       {Royal Institute of Technology (KTH)},
  year =         {2002},
  OPTkey =       {},
  OPTtype =      {},
  address =      {Stockholm, Sweden},
  month =        {June},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
Erland Nilsson and Johnny �berg.
PANACEA - a case study on the PANACEA NoC - a Nostrum network on chip prototype.
Technical Report TRITA-ICT/ECS R 06:01, School of Information and Communication Technology,
Royal Institute of Technology, Electrum 229, SE-164 40 Kista, Sweden, April 2006.
@TechReport{nilsson06,
  author =       {Erland Nilsson and Johnny \"Oberg},
  title =        {{PANACEA} - a case study on the {PANACEA NoC} - a {Nostrum} network on chip prototype},
  institution =  {Royal Institute of Technology},
  year =         {2006},
  OPTkey =       {},
  OPTtype =      {},
  number =       {229},
  OPTaddress =   {},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Misc{nocbw06,
  OPTkey =       {},
  OPTauthor =    {C.S. Grecu and P.P. Pance and A. Ivanov  and R. Marculescu and E. Salminen and A. Jantsch},
  author =       {{NoC Benchmark Workgroup}},
  title =        {An initiatie towards open Network-on-Chip benchmarks},
  howpublished = {white paper, OCP-IP, [Online]. Available: http://www.ocpip.org/socket/whitepapers/NoC-Benchmarks-WhitePaper-15.pdf},
  OPTmonth =     {},
  year =         {2007},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Book{nurmi04,
  ALTauthor =    {},
  editor =       {J. Nurmi and H. Tenhunen and J. Isoaho and A. Jantsch},
  title =        {Interconnect-Centric Design for Advanced SoC and NoC},
  publisher =    kap,
  year =         {2004},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Dordrecht, The Netherlands},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% OOO
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%\bibitem {ocp01} OCP-IP Alliance: Open Core Protocol Specification,
%  Release 1.0, Portland, OR (2001)
@Manual{ocp01,
  title =        {Open Core Protocol Specification, Release 1.0},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {OCP-IP Alliance},
  address =      {Portland, OR},
  OPTedition =   {},
  month =        {},
  year =         {2001},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Manual{ocp03,
  title =        {Open Core Protocol Specification, Release 2.0},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {OCP-IP Alliance},
  address =      {Portland, OR},
  OPTedition =   {},
  month =        {},
  year =         {2003},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%S. Ogg, E. Valli, C. D'Alessandro, A. Yakovlev, B. Al-Hashimi, L. Benini,
%Reducing Interconnect Cost in NoC through Serialized Asynchronous Links,
%First International Symposium on Networks-on-Chip (NOCS), 7-9 May 2007, pp. 219 - 219.
@InProceedings{ogg07,
  author =       {S. Ogg and E. Valli and C. D'Alessandro and A. Yakovlev and B. Al-Hashimi and L. Benini},
  title =        {Reducing Interconnect Cost in {NoC} through Serialized Asynchronous Links},
  booktitle =    {NOCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {219--219},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Umit Y. Ogras, Jingcao Hu, Radu Marculescu,
%Key research problems in NoC design: a holistic perspective,
%CODES 2005, pp .69-75.
@InProceedings{ogras05,
  author =       {Umit Y. Ogras and Jingcao Hu and Radu Marculescu},
  title =        {Key research problems in {NoC} design: a holistic perspective},
  booktitle =    {CODES},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {69--75},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
%Ogras, U.Y.; Marculescu, R.; Hyung Gyu Lee; Naehyuck Chang;
%Communication architecture optimization: making the shortest path shorter in regular networks-on-chip
%Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
%Volume 1,  6-10 March 2006 Page(s):6 pp.
@InProceedings{ogras06a,
  author =       {U.Y. Ogras and R. Marculescu and Hyung Gyu Lee and Naehyuck Chang},
  title =        {Communication architecture optimization: making the shortest path shorter in regular networks-on-chip},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {6--10},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {1},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{orsila07,
  author =       {Heikki Orsila and Erno Salminen and Marko H\"annik\"ainen and Timo D. H\"am\"al\"ainen},
  title =        {Optimal Subset Mapping And Convergence Evaluation of Mapping Algorithms for Distributing Task Graphs on Multiprocessor {SoC}},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InBook{orsila08,
  author =       {Heikki Orsila and Erno Salminen and Timo D. H\"am\"al\"ainen},
  ALTeditor =    {},
  title =        {Global optimization: Focus on Simulated annealing},
  chapter =      {Best Practices for Simulated Annealing in Multiprocessor Task Distribution Problems},
  publisher =    {ITECH},
  year =         {2008},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTtype =      {},
  OPTaddress =   {},
  OPTedition =   {},
  OPTmonth =     {},
  OPTpages =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%bibitem{owens07} J.D. Owens, W.J. Dally, R. Ho, D.N. Jayasimha,
% S.W. Keckler, Li-Shiuan Peh, Research Challenges for On-Chip
% Interconnection Networks, IEEE Micro, Vol. 27, Iss. 5, Sept.-Oct.
% 2007, pp. 96 - 108.
@Article{owens07,
  author =       {J.D. Owens and W.J. Dally and R. Ho and D.N. Jayasimha and S.W. Keckler and Li-Shiuan Peh},
  title =        {Research Challenges for On-Chip Interconnection Networks},
  journal =      {IEEE Micro},
  year =         {2007},
  OPTkey =       {},
  volume =       {27},
  number =       {5},
  pages =        {96--108},
  month =        {Sep-Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% PPP
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
@Misc{ptm06,
  OPTkey =       {},
  author =       {{Nanoscale Integration and Modeling Group}},
  title =        {Predictive Technology Model},
  howpublished = {Arizona State University, [online], http://www.eas.asu.edu/~ptm/},
  OPTmonth =     {},
  year =         {2006},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%J.C.S. Palma, L.S. Indrusiak, F.G. Moraes, A.G Ortiz, M.Glesner, R.A.L. Reis,
%Evaluating the impact of data encoding techniques on the power consumption in networks-on-chip,
%Emerging VLSI Technologies and Architectures, March 2006, pp.2-3 .
@InProceedings{palma06,
  author =       {J.C.S. Palma and L.S. Indrusiak and F.G. Moraes and A.G Ortiz and M.Glesner and R.A.L. Reis},
  title =        {Evaluating the impact of data encoding techniques on the power consumption in networks-on-chip},
  booktitle =    {Emerging VLSI Technologies and Architectures},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {2--3},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Pamunuwa, J. �berg, L. R. Zheng, M. Millberg, A. Jantsch, and H. Tenhunen.
%Layout, performance and power trade-offs in mesh-based network-on-chip architectures.
%In IFIP International Conference on Very Large Scale Integration (VLSI-SOC), Darmstadt, Germany, December 2003, pp. 362-367.
@InProceedings{pamunuwa03,
  author =       {D. Pamunuwa and J. \"Oberg and L. R. Zheng and M. Millberg and A. Jantsch and H. Tenhunen},
  title =        {Layout, performance and power trade-offs in mesh-based network-on-chip architectures},
  booktitle =    {VLSI-SOC},
  OPTbooktitle =         {IFIP International Conference on Very Large Scale Integration (VLSI-SOC)},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {362--267},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Darmstadt, Germany},
  month =        {Dec.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
%Partha Pratim Pande, Cristian Grecu*, Andr� Ivanov and Res Saleh,
%"Switch-Based Interconnect Architecture for Future Systems on Chip,"
%Proceedings of SPIE, VLSI Circuits and Systems,
%Vol. 5117, pp. 228-237, 2003, Maspalomas, Gran Canaria, Spain
@InProceedings{pande03,
  author =       {Partha Pratim Pande and Cristian Grecu and Andr� Ivanov and Res Saleh},
  title =        {Switch-Based Interconnect Architecture for Future Systems on Chip},
  booktitle =    {SPIE, VLSI Circuits and Systems},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {228--237},
  year =         {2003},
  OPTeditor =    {},
  volume =       {5117},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Maspalomas, Gran Canaria, Spain},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Partha Pratim Pande, Cristian Grecu, Andr� Ivanov, Res Saleh, iscas 2003
%Design of a Switch for Network on Chip Applications
% iscas 2003
@InProceedings{pande03b,
  author =       {Partha Pratim Pande and Cristian Grecu and Andr� Ivanov and Res Saleh},
  title =        {Design of a Switch for Network on Chip Applications},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {217--220},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{pande05a,
  author =       {P.P. Pande and C. Grecu and  M. Jones and  A. Ivanov and R. Saleh},
  title =        {Effect of traffic localization on energy dissipation in {NoC-based} interconnect},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1774--1777},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kobe, Japan},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%P.P. Pande, C. Grecu, M. Jones, A. Ivanov, R. Saleh,
%Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures, IEEE Transactions on Computers, Vol. 54,  Iss. 8,  Aug. 2005, pp. 1025 - 1040.
@Article{pande05b,
  author =       {P.P. Pande and  C. Grecu and M. Jones and A. Ivanov and R. Saleh},
  title =        {Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures},
  journal =      {IEEE Trans. Computers},
  year =         {2005},
  OPTkey =       {},
  volume =       {54},
  number =       {8},
  pages =        {1025--1040},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Article{pande05c,
  author =       {Partha P. Pande and others},
  title =        {Design, synthesis, and test of networks on chips},
  journal =      {IEEE Des. Test Comput},
  year =         {2005},
  OPTkey =       {},
  volume =       {22},
  number =       {5},
  pages =        {404--413},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {park01} Park, J.H., \emph{et al.}: MPEG-4 video codec on an ARM and
%  AMBA. In proc.  Workshop and Exhibition on MPEG-4 (2001) 95-98
@InProceedings{park01,
  author =       {J.H. Park and  I.K. Kim and S.M. Kim and  S.M. Park and B.T. Koo and K.S. Shin and K.B. Seo and J.J. Cha},
  title =        {{MPEG-4} video codec on an {ARM} and {AMBA}},
  booktitle =    {Workshop and Exhibition on MPEG-4},
  pages =        {95--98},
  year =         2001,
  address =      {San Jose, CA},
  month =        {June}
}
 
 
 
% J.M. Paul, D.E. Thomas, A. Bobrek,
%Benchmark-based design strategies for single chip heterogeneous multiprocessors,
%Proceedings of international conference on Hardware/software codesign and system synthesis '(CODES),
%Stockholm, Sweden, 8-10 September 2004, pp. 54-59.
@InProceedings{paul04,
  author =       {J.M. Paul and D.E. Thomas and A. Bobrek},
  title =        {Benchmark-based design strategies for single chip heterogeneous multiprocessors},
  booktitle =    {CODES+ISSS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {54--59},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Stockholm, Sweden},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
%Scenario-oriented design for single-chip heterogeneous multiprocessors
%Paul, J.M.; Thomas, D.E.; Bobrek, A.;
%Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
%Volume 14,  Issue 8,  Aug. 2006 Page(s):868 - 880
%Digital Object Identifier 10.1109/TVLSI.2006.878474
@Article{paul06,
  author =       {J.M. Paul and D.E. Thomas and A. Bobrek},
  title =        {Scenario-oriented design for single-chip heterogeneous multiprocessors},
  journal =      t-vlsi,
  year =         {2006},
  OPTkey =       {},
  volume =       {14},
  number =       {8},
  pages =        {868--880},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%3-D Topologies for Networks-on-Chip
%Pavlidis, V. F.; Friedman, E. G.;
%Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
%Volume 15,  Issue 10,  Oct. 2007 Page(s):1081 - 1090
@Article{pavlidis07,
  author =       {V. F. Pavlidis and E. G. Friedman},
  title =        {{3-D} Topologies for Networks-on-Chip},
  journal =      t-vlsi,
  year =         {2007},
  OPTkey =       {},
  volume =       {15},
  number =       {10},
  pages =        {1081--1090},
  month =        {Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Li-Shiuan Peh and William J. Dally,
%"A Delay Model for Router Micro-architectures.", In IEEE Micro, Jan/Feb 2001.
@Article{peh01,
  author =       {Li-Shiuan Peh and William J. Dally},
  title =        {A Delay Model for Router Micro-architectures},
  journal =      {IEEE Micro},
  year =         {2001},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  pages =        {26--34},
  month =        {Jan/Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Sandro Penolazzi and Axel Jantsch.
%A high level power model for the Nostrum NoC.
%In 9th Euromicro Conference on Digital System Design (DSD 2006), August 2006.
@InProceedings{penolazzi06,
  author =       {Sandro Penolazzi and Axel Jantsch},
  title =        {A high level power model for the {Nostrum NoC}},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {673--676},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% \bibitem {pimentel02}
%A. D. Pimentel, S. Polstra, F. Terpstra, A.W. van Halderen, J. E. Coffland, and
% L. O. Hertzberger,
%Towards efficient design space exploration of heterogeneous embedded media systems,
%in LNCS, vol. 2268, 2002, pp. 57-73.
 
@InProceedings{pimentel02,
  author =       {A. D. Pimentel and S. Polstra and F. Terpstra and A.W. van Halderen and J. E. Coffland and  L. O. Hertzberger},
  title =        {Towards efficient design space exploration of heterogeneous embedded media systems},
  booktitle =    {SAMOS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {57--63},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@ARTICLE{pimentel05,
  author = {A. D. Pimentel},
  title = {The {Artemis} Workbench for System-level Performance Evaluation of Embedded Systems},
  journal = "Int. Journal of Embedded Systems",
  volume = "1",
  number = "7",
  year = "2005"
}
 
@ARTICLE{pimentel07,
  author = {A. D. Pimentel and M. Thompson and S. Polstra and C. Erbas},
  title = {Calibration of Abstract Performance Models for System-Level Design Space Exploration},
  journal = "Journal of VLSI Sig. Process. Systems for Signal, Image, and Video Technology",
  year = "2007"
}
 
 
 
%Poletti, Francesco; Poggiali, Antonio; Bertozzi, Davide; Benini, Luca; Marchal, Pol; Loghi, Mirko; Poncino, Massimo;
%Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support
%Transactions on Computers
%Volume 56,  Issue 5,  May 2007 Page(s):606 - 621
 
@Article{poletti07,
  author =       {F. Poletti and A. Poggiali and D. Antonio and L. Benini and P. Marchal and M. Loghi and M. Poncino},
  title =        {Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support},
  journal =      t-comp,
  year =         {2007},
  OPTkey =       {},
  volume =       {56},
  number =       {5},
  pages =        {606--621},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Juha Plosila, Tiberiu Seceleanu, and Pasi Liljeberg
%Implementation of a Self-Timed Segmented Bus
%Volume 20,  Issue 6,  Nov.-Dec. 2003, pp. 44-50.
@Article{plosila03,
  author =       {Juha Plosila and Tiberiu Seceleanu and Pasi Liljeberg},
  title =        {Implementation of a Self-Timed Segmented Bus},
  journal =      {IEEE Des. Test Comput.},
  year =         {2003},
  OPTkey =       {},
  volume =       {20},
  number =       {6},
  pages =        {44--50},
  month =        {Nov.-Dec.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Bringing NoCs to 65 nm
%Pullini, A.; Angiolini, F.; Murali, S.; Atienza, D.; De Micheli, G.; Benini, L.;
%Micro, IEEE
%Volume 27,  Issue 5,  Sept.-Oct. 2007 Page(s):75 - 85
@Article{pullini07,
  author =       {A. Pullini and  F.Angiolini and  S. Murali D. Atienza and G. {De Micheli} and L. Benini},
  title =        {Bringing {NoCs} to 65 nm},
  journal =      {IEEE Micro},
  year =         {2007},
  OPTkey =       {},
  volume =       {27},
  number =       {5},
  pages =        {75--85},
  month =        {Sep.-Oct},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% RRR
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
%Rolf Rabenseifner, Sunil R. Tiyyagura, and Matthias Muller
%Network Bandwidth Measurements and Ratio Analysis with the HPC Challenge Benchmark Suite (HPCC)
%Proceedings, EuroPVM/MPI 2005, Sep. 18-21, Sorrento, Italy, LNCS 3666, pp. 368--378Springer-Verlag, 2005.
%Springer-Verlag, http://www.springer.de/comp/lncs/index.html
@InProceedings{rabenseifner05,
  author =       {Rolf Rabenseifner and Sunil R. Tiyyagura and Matthias M\"uller},
  title =        {Network Bandwidth Measurements and Ratio Analysis with the {HPC} Challenge Benchmark Suite {(HPCC)}},
  booktitle =    {EuroPVM/MPI, LNCS 3666},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {368 -- 378},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%A. Radulescu, J. Dielissen, S.G. Pestana, O.P. Gangwal, E. Rijpkema, P. Wielage, K. Goossens,
%An Efficient On-Chip NI Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration,
%IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
%Vol. 24, Iss. 1, Jan. 2005, pp. 4 - 17
@Article{radulescu05,
  author =       {A. Radulescu and J. Dielissen and S.G. Pestana and O.P. Gangwal and E. Rijpkema and P. Wielage and K. Goossens},
  title =        {An Efficient On-Chip {NI} Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration},
  journal =      t-cadics,
  year =         {2005},
  OPTkey =       {},
  volume =       {24},
  number =       {1},
  pages =        {4--17},
  month =        {Jan.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{rasmus07,
  author =       {Antti Rasmus and Ari Kulmala and Erno Salminen and Timo D. H\"am\"al\"ainen},
  title =        {{IP} Integration Overhead Analysis in System-on-Chip Video Encoder},
  booktitle =    {DDECS},
  OPTbooktitle =         {IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS)},
  OPTbooktitle = {DDECS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {333--336},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Krakow, Poland},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Richardson, T.D.; Nicopoulos, C.; Park, D.; Narayanan, V.; Yuan Xie; Das, C.; Degalahal, V.;
%A hybrid SoC interconnect with dynamic TDMA-based transaction-less buses and on-chip networks
%VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
%3-7 Jan. 2006 Page(s):8 pp.
@InProceedings{richardson06,
  author =       {T.D. Richardson and C. Nicopoulos and D. Park and V. Narayanan and Yuan Xie and C. Das and V. Degalahal},
  title =        {A hybrid {SoC} interconnect with dynamic {TDMA-based} transaction-less buses and on-chip networks},
  booktitle =    {VLSI design},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Jouni Riihim�ki, Erno Salminen, Kimmo Kuusilinna, Timo D. H�m�l�inen,
%Parameter optimization tool for Enhancing On-Chip Network Performance
%ISCAS, Scottsdale, Arizona, May 26-29, 2002, Vol.IV, pp. 61-64, IEEE.
@InProceedings{riihimaki02,
  author =       {Jouni Riihim\"aki and Erno Salminen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {Parameter optimization tool for Enhancing On-Chip Network Performance},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {61--64},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   { Scottsdale, AZ, USA},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Practical Distributed Simulation of a Network of Wireless Terminals [pdf]
%Jouni Riihim�ki, Petri Kukkala, Erno Salminen, M. H�nnik�nen, Kimmo Kuusilinna, and Timo D. H�m�l�inen,
%International Symposium on System-on-Chip, Tampere, Finland, November 16-18 2004, pp. 49-52.
@InProceedings{riihimaki04,
  author =       {Jouni Riihim\"aki and Petri Kukkala and Erno Salminen and M. H\"annik\"ainen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {Practical Distributed Simulation of a Network of Wireless Terminals},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {49--52},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%T. Rintaluoma, O. Silven and J. Raekallio,
%Interface Overheads in Embedded Multimedia Software,
%SAMOS 2006, pp.5-14.
@InProceedings{rintaluoma06,
  author =       {T. Rintaluoma and O. Silven and J. Raekallio},
  title =        {Interface Overheads in Embedded Multimedia Software},
  booktitle =    {SAMOS VI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {5--14},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {rijpkema03} Rijpkema, E., \emph{et al.}: Trade Offs in the Design of
%  a Router with Both Guaranteed and Best-Effort Services for Network
%  on Chip (Extended version). IEEE Proc. Computers and Digital
%  Techniques, vol 150, issue 5 (2003) 294-302
@Article{rijpkema03,
  author =       {E. Rijpkema and Kees Goossens and A. Radulescu and J. Dielisen and J. van Meerbergen and P. Wielage and E. Waterlander},
  title =        {Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Network on Chip (Extended version)},
  journal =      {IEE Proc. Computers and Digital Techniques},
  year =         {2003},
  OPTkey =       {},
  volume =       {150},
  number =       {5},
  pages =        {294--302},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%S. Rixner, W.J. Dally, B. Khailany, P. Mattson, U.J. Kapasi, J.D. Owens,
%Register organization for media processing,
%Sixth International Symposium on High-Performance Computer Architecture (HPCA-6)
%8-12 Jan. 2000, pp. 375 - 386.
 
 
@InProceedings{rixner00,
  author =       {S. Rixner and W.J. Dally and B. Khailany and P. Mattson and U.J. Kapasi and J.D. Owens},
  title =        {Register organization for media processing},
  booktitle =    {HPCA-6},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {375--386},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Why CPU Frequency Stalled
% Ross, P.E. IEEE Spectrum,
% Page(s): 72-72
@Article{ross08,
  author =       {P.E. Ross},
  title =        {Why {CPU }Frequency Stalled},
  journal =      {IEEE Spectrum},
  year =         {2008},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  pages =        {72},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Rostislav, V. Vishnyakov, E. Friedman,  Ran Ginosar,
%An Asynchronous Router for Multiple Service Levels Networks on Chip,
%Proceedings of IEEE International Symposium on Asynchronous Circuits and Systems(ASYNC),
%New York City, NY, USA, 14-16 March 2005, pp. 224-229.
@InProceedings{rostislav05,
  author =       {D. Rostislav and V. Vishnyakov and E. Friedman and  Ran Ginosar},
  title =        {An Asynchronous Router for Multiple Service Levels Networks on Chip},
  booktitle =    {ASYNC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {224--229},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InBook{rowen04,
  author =       {Chris Rowen},
  ALTeditor =    {},
  title =        {Engineering the Complex {SoC}},
  chapter =      {},
  publisher =    {Prentice Hall PTR},
  year =         {2004},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTtype =      {},
  address =      {Upper Saddle River, NJ, USA},
  edition =      {1st},
  OPTmonth =     {},
  OPTpages =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
%Chris Rowen, Ashish Dixit, Steve Leibson,
%Low Power SoC Design Using Configurable Processors - The Non-Nuclear Option,
%Symposium on System-On-Chip, Tampere, Finland, 15-17 November 2005.
@InProceedings{rowen05,
  author =       {Chris Rowen and Ashish Dixit and Steve Leibson},
  title =        {Low Power {SoC} Design Using Configurable Processors - The Non-Nuclear Option},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {8--13},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {rowson97} Rowson, J.A., Sangiovanni-Vincentelli A.:
%  Interface-Based Design. In proc. DAC (1997) 178-183
@InProceedings{rowson97,
  author =       {James A. Rowson and  Alberto Sangiovanni-Vincentelli},
  title =        {Interface-Based Design},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {178--183},
  year =         {1997},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Anaheim, CA},
  month =        {June},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{ryu04,
  author =       {Kyeong Keol Ryu and Vincent J. {Mooney III}},
  title =        {Automated Bus Generation for Multiprocessor {SoC} Design},
  journal =      t-cadics,
  year =         {2004},
  OPTkey =       {},
  volume =       {23},
  number =       {11},
  pages =        {1531--1549},
  month =        {Nov.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@Misc{ramanathan06,
  OPTkey =       {},
  author =       {R. M. Ramanathan},
  title =        {Intel Multi-Core Processors Making the Move to Quad-Core and Beyond},
  howpublished = {Intel Corporation, white paper},
  month =        {Oct.},
  year =         {2006},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% SSS
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
 
%\bibitem {saastamoinen03} Saastamoinen, I. et al.:
%Buffer implementation for Proteo network-on-chip.
%In: Proc. of ISCAS (2003) 113-116
@InProceedings{saastamoinen03,
  author =       {Ilkka Saastamoinen and Mikko Alho and Jari Nurmi},
  title =        {Buffer implementation for {Proteo} network-on-chip},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {113--116},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Bangkok, Thailand},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Manuel Salda�a, Lesley Shannon, Paul Chow,
%The routability of multiprocessor network topologies in FPGAs,
%Proceedings of the 2006 international workshop on System-level interconnect prediction, Munich, Germany, 2006, pp. 49 - 56
@InProceedings{saldana06,
  author =       {Manuel Salda�a and Lesley Shannon and Paul Chow},
  title =        {The routability of multiprocessor network topologies in {FPGAs}},
  booktitle =    {SLIP},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {49--56},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Munich, Germany},
  month =        {Mar.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% Erno Salminen, "Interface Design for Multiple Processors in a System-on-Chip Video Encoder", Tampere, Finland, 2001, 88 pages, Tampere University of Technology.
@MastersThesis{salminen01,
  author =       {Erno Salminen},
  title =        {Interface Design for Multiple Processors in a System-on-Chip Video Encode},
  school =       {Tampere University of Technology},
  year =         {2001},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {salminen02} Salminen, E., \emph{et al.}: Overview of Bus-based
%  System-On-Chip Interconnections. In proc. ISCAS (2002) II-372 -
%  II-375.
@InProceedings{salminen02_pois,
  author =       {Erno Salminen and Vesa Lahtinen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {Overview of Bus-based System-On-Chip Interconnections},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {372--375},
  year =         {2002},
  OPTeditor =    {},
  volume =       {2},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Scottsdale, AZ},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%T. Salminen and J.-P. Soininen,
%Evaluating application mapping using network simulation,
%Intl. Symposium on System-on-Chip, Tampere,
%Finland, Nov. 2003, pp.27-30.
@InProceedings{salminen03,
  author =       {T. Salminen and J.-P. Soininen},
  title =        {Evaluating application mapping using network simulation},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {27--30},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
@InProceedings{salminen04,
  author =       {Erno Salminen and Kimmo Kuusilinna and Timo H\"am\"al\"ainen},
  title =        {Comparison of Hardware {IP} components for System-on-Chip},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {69-73},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{salminen05_pois,
  author =       {Erno Salminen and Ari Kulmala and Timo H\"am\"al\"ainen},
  title =        {{HIBI}-based Multiprocessor {SoC} on {FPGA}},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {3351--3354},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Kobe, Japan},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Erno Salminen, Tero Kangas, Timo D. H�m�l�inen, Jouni Riihim�ki,
%"Requirements for Network-on-Chip Benchmarking",
%Norchip, Oulu, Finland, November 21-22, 2005, pp. 82-85.
@InProceedings{salminen05b_pois,
  author =       {Erno Salminen and Tero Kangas and Timo D. H\"am\"al\"ainen and Jouni Riihim\"aki},
  title =        {Requirements for Network-on-Chip Benchmarking},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {82--85},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Oulu, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{salminen05b_pois,
  author =       {Erno Salminen and Tero Kangas and Jouni Riihim\"aki and Vesa Lahtinen and Kimmo Kuusilinna and Timo D. H\"am\"al\"ainen},
  title =        {Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context},
  booktitle =    {SAMOS, accepted for publication},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Erno Salminen, Tero Kangas, Jouni Riihim�ki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. H�m�l�inen,
%"HIBI Communication Network for System-on-Chip",
%Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology,
%Heidelberg, Berlin, June 1-1, 2005, Springer-Verlag, Submitted
@Article{salminen06_pois,
  author =       {Erno Salminen and Tero Kangas and Jouni Riihim\"aki and Vesa Lahtinen and Kimmo Kuusilinna  and Timo D. H\"am\"al\"ainen},
  title =        {HIBI Communication Network for System-on-Chip},
  journal =      {Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology},
  year =         {2006},
  OPTkey =       {},
  volume =       {43},
  number =       {2},
  pages =        {185--205},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@InProceedings{salminen06b_pois,
  author =       {Erno Salminen and Tero Kangas and Timo H\"am\"al\"ainen},
  title =        {The impact of communication on the scalability of the data-parallel video encoder on {MPSoC}},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {191--194},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
@Article{salminen07_pois,
  author =       {Erno Salminen and Tero Kangas and Jouni Riihim\"aki and Vesa Lahtinen and Kimmo Kuusilinna and Timo D. H\"am\"al\"ainen},
  title =        {Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context},
  journal =      {Journal of System Architectures},
  year =         {2007},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTpages =     {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@PhdThesis{salminen10,
  author =       {Erno Salminen},
  title =        {On Design and Comparison of On-Chip Networks},
  school =       {Tampere University of Technology},
  year =         {2010},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {},
  Tmonth =       {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Samuelsson, H.; Kumar, S.;
%Ring road NoC architecture
%Norchip Conference, 2004. Proceedings
%8-9 Nov. 2004 Page(s):16 - 19
@InProceedings{samuelsson04,
  author =       {H. Samuelsson and S. Kumar},
  title =        {Ring road {NoC} architecture},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {16--19},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%A. Sangiovanni-Vincentelli,
%Quo Vadis, SLD? Reasoning About the Trends and Challenges of System Level Design
%Proceedings of the IEEE, Vol. 95, Iss. 3, March 2007, pp. 467 - 506.
@Article{sangiovanni_vincentelli07,
  author =       {A. Sangiovanni-Vincentelli},
  title =        {Quo Vadis, {SLD?} Reasoning About the Trends and Challenges of System Level Design},
  journal =      {Proc. IEEE},
  year =         {2007},
  OPTkey =       {},
  volume =       {95},
  number =       {3},
  pages =        {467--506},
  month =        {Mar.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%S. Santi et al.,
%On the Impact of traffic statistics on quality of service for networks on chip,
%ISCAS, May 2005, pp. 2349-2352.
@InProceedings{santi05,
  author =       {Stefano Santi and Bill Lin and Ljupco Kocarev and Gian Mario Maggio and Riccardo Rovatti and Gianluca Setti},
  title =        {On the Impact of traffic statistics on quality of service for networks on chip},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {2349--2352},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kobe ,Japan},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Sathe, S.; Wiklund, D.; Liu, D.;
%Design of a switching node (router) for on-chip networks
%ASIC, 2003. Proceedings. 5th International Conference on
%Volume 1,  21-24 Oct. 2003 Page(s):75 - 78 Vol.1
@InProceedings{sathe03,
  author =       {S. Sathe and D. Wiklund and D. Liu},
  title =        {Design of a switching node (router) for on-chip networks},
  booktitle =    {ASIC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {75--78},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {1},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {scherson94} Scherson, I.D., Youssef A.S.:
%  Interconnection Networks for High-Performance Parallel Computers.
%  IEEE Computer Society Press, Los Alamitos, CA (1994)
@Book{scherson94,
  ALTauthor =    {},
  editor =       {I.D. Scherson and A.S. Youssef},
  title =        {Interconnection Networks for High-Performance Parallel Computers},
  publisher =    {IEEE Computer Society Press},
  year =         {1994},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Los Alamitos, CA},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Dipanjan Sengupta and Resve Saleh,
%Generalized Power-Delay Metrics in Deep Submicron CMOS Designs,
%IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 1, Jan. 2007, pp. 183--189.
@Article{sengupta07,
  author =       {Dipanjan Sengupta and Resve Saleh},
  title =        {Generalized Power-Delay Metrics in Deep Submicron {CMOS} Designs},
  journal =      t-cadics,
  year =         {2007},
  OPTkey =       {},
  volume =       {26},
  number =       {1},
  pages =        {183--189},
  month =        {Jan.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Mikko Set�l�, Petri Kukkala, Tero Arpinen, Marko H�nnik�inen, Timo D. H�m�l�inen,
%Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform,
%Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS VI) - Special Session on System Design and Modeling,
%Samos, Greece, July 17-20, 2006, pp. 27-38.
@InProceedings{setala06,
  author =       {Mikko Set\"al\"a and Petri Kukkala and Tero Arpinen and Marko H\"annik\"ainen and Timo D. H\"am\"al\"ainen},
  title =        {Automated Distribution of {UML 2.0} Designed Applications to a Configurable Multiprocessor Platform},
  booktitle =    {SAMOS VI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {27--38},
  OPTyear =      {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Samos, Greece},
  month =        {Jul.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%M. Sgroi, M. Sheets, A. Mihal, K. Keutzer, S. Malik, J. Rabaey, A. Sangiovanni-Vincentelli ,
%Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design
%Design Automation Conference, 2001. Proceedings , 2001 Page(s): 667 -672
@InProceedings{sgroi01,
  author =       {M. Sgroi and M. Sheets and A. Mihal and K. Keutzer and S. Malik and J. Rabaey and A. Sangiovanni-Vincentelli},
  title =        {Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {667--672},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Jih-Sheng Shen; Kuei-Chung Chang; Tien-Fu Chen;
%On a design of crossroad switches for low-power on-chip communication architectures
%Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
%21-24 May 2006 Page(s):4 pp.
@InProceedings{shen06,
  author =       {Jih-Sheng Shen and Kuei-Chung Chang and Tien-Fu Chen},
  title =        {On a design of crossroad switches for low-power on-chip communication architectures},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Issues in the development of a practical NoC: the Proteo concept,
%D. Sig�enza-Tortosa, T. Ahonen, J. Nurmi,
%Integration, the VLSI Journal,
%Vol. 38, Iss. 1, Oct. 2004, pp. 95-105.
@Article{siguenza04,
  author =       {David Sig\"uenza-Tortosa and Tapani Ahonen and Jari Nurmi},
  title =        {Issues in the development of a practical {NoC}: the {Proteo} concept},
  journal =      {Integration, the VLSI Journal},
  year =         {2004},
  OPTkey =       {},
  volume =       {38},
  number =       {1},
  pages =        {95--105},
  month =        {Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%K. Skadron, M. Martonosi, D.I. August, M.D. Hill, D.J. Lilja, V.S. Pai,
%Challenges in computer architecture evaluation,
%Computer, Vol. 36,  Iss. 8,  Aug. 2003, pp. 30 - 36.
@Article{skadron03,
  author =       {K. Skadron and M. Martonosi and D.I. August and M.D. Hill and D.J. Lilja and V.S. Pai},
  title =        {Challenges in computer architecture evaluation},
  journal =      {IEEE Computer},
  year =         {2003},
  OPTkey =       {},
  volume =       {36},
  number =       {8},
  pages =        {30--36},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Extending platform-based design to network on chip systems
%Soininen, J.-P.; Jantsch, A.; Forsell, M.; Pelkonen, A.; Kreku, J.; Kumar, S.;
%VLSI Design, 2003. Proceedings. 16th International Conference on , 4-8 Jan. 2003
%Page(s): 401 -408
@InProceedings{soininen03,
  author =       {J.-P. Soininen and A. Jantsch and M. Forsell and A. Pelkonen and J. Kreku and S. Kumar},
  title =        {Extending platform-based design to network on chip systems},
  booktitle =    {VLSI Design},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {401--408},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {sonics00} Sonics Inc.: Sonics uNetworks Technical Overview
%  Revision A21-1. (2000)
@Manual{sonics00,
  title =        {Sonics MicroNetworks Technical Overview Revision},
  OPTkey =       {},
  OPTauthor =    {},
  organization = {Sonics Inc.},
  OPTaddress =   {},
  edition =      {{A21-1}},
  month =        {June},
  year =         {2000},
  OPTnote =      {},
  OPTannote =    {}
}
%V. Soteriou,  Hangsheng Wang, L. Peh,
%A Statistical Traffic Model for On-Chip Interconnection Networks,
%14th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS),
%11-14 Sept. 2006, pp. 104 - 116.
@InProceedings{soteriou06,
  author =       {Vassos Soteriou and  Hangsheng Wang and Li-Shiuan Peh},
  title =        {A Statistical Traffic Model for On-Chip Interconnection Networks},
  booktitle =    {MASCOTS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {104--116},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin Li, and Li-Shiuan Peh,
% Polaris: A System-Level Roadmapping Toolchain for On-Chip Interconnection Networks
%
@Article{soteriou07,
  author =       {Vassos Soteriou and Noel Eisley and Hangsheng Wang and Bin Li and Li-Shiuan Peh},
  title =        {Polaris: A System-Level Roadmapping Toolchain for On-Chip Interconnection Networks},
  journal =      t-vlsi,
  year =         {2007},
  OPTkey =       {},
  volume =       {15},
  number =       {8},
  pages =        {855--868},
  month =        {Aug.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%The Standard Performance Evaluation Corporation, OpenMP Benchmark Suite, [online], http://www.spec.org/omp2001/, visited May 2005.
@Misc{spec01,
  OPTkey =       {},
  author =       {{Standard Performance Evaluation Corporation}},
  title =        {{OpenMP} Benchmark Suite},
  howpublished = {[online], http://www.spec.org/omp2001/},
  month =        {May},
  year =         {2005},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%\bibitem {spirit04}SPIRIT Schema Working Group, SPIRIT-User guide
%  v1.0, Dec. 2004, [online] http://www.spiritconsortium.org/.
 
@Misc{spirit04,
  OPTkey =       {},
  author =       {{SPIRIT Schema Working Group}},
  title =        {SPIRIT-User guide v1.0},
  howpublished = {[online] http://www.spiritconsortium.org/},
  month =        {Dec.},
  year =         {2004},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
% Application Specific Network-on-Chip Design with Guaranteed Quality Approximation Algorithms
%Srinivasan, Krishnan; Chatha, Karam S.; Konjevod, Goran;
%Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
%Jan. 2007 Page(s):184 - 190
%Digital Object Identifier 10.1109/ASPDAC.2007.357983
@InProceedings{srinivasan07,
  author =       {Krishnan Srinivasan and Karam S. Chatha and Goran; Konjevod},
  title =        {Application Specific Network-on-Chip Design with Guaranteed Quality Approximation Algorithms},
  booktitle =    {ASP-DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {184--190},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jan.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Stroobandt, P. Verplaetse, J. van Campenhout,
% Generating synthetic benchmark circuits for evaluating CAD tools,
% IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
%Vol. 19,  Iss. 9,  Sept. 2000, pp. 1011 - 1022.
 
@Article{stroobandt00,
  author =       {D. Stroobandt and P. Verplaetse and J. {van Campenhout}},
  title =        {Generating synthetic benchmark circuits for evaluating {CAD} tools},
  journal =      t-cadics,
  year =         {2000},
  OPTkey =       {},
  volume =       {19},
  number =       {9},
  pages =        {1011--1022},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%D. Sylvester, K.Keutzer,
%Impact of small process geometries on microarchitectures in systems on a chip,
%Proceedings of the IEEE,
%Vol. 89, Iss. 4, Apr. 2001, pp. 467 -489.
 
@Article{sylvester01,
  author =       {Dennis Sylvester and Kurt Keutzer},
  title =        {Impact of small process geometries on microarchitectures in systems on a chip},
  journal =      {Proc. IEEE},
  year =         {2001},
  OPTkey =       {},
  volume =       {89},
  number =       {4},
  pages =        {467--489},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% TTT
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%\bibitem {thid03} Thid, R. et al.:
%Evaluating NoC communication backbones with simulation.
%In: Proc. of Norchip, Riga, Latvia, (2003) 27-30
@InProceedings{thid03,
  author =       {Rikard Thid and Mikael Millberg and Axel Jantsch},
  title =        {Evaluating {NoC} communication backbones with simulation},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {27--30},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Riga, Latvia},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% Rikard Thid, Ingo Sander, and Axel Jantsch.
%Flexible bus and NoC performance analysis with configurable synthetic workloads.
%In 9th Euromicro Conference on Digital System Design (DSD 2006), August 2006.
@InProceedings{thid06,
  author =       {Rikard Thid and Ingo Sander and Axel Jantsch},
  title =        {Flexible bus and {NoC} performance analysis with configurable synthetic workloads},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {681--688},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  OPTmonth =     {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Jim Turley, Survey says: software tools more important than chips,
%Embedded Systems Design, 04/11/05,
%[online] http://www.embedded.com/showArticle.jhtml?articleID=160700620.
@Misc{turley05,
  OPTkey =       {},
  author =       {Jim Turley},
  title =        {Survey says: software tools more important than chips},
  howpublished = {Embedded Systems Design, [online], http://www.embedded.com/showArticle.jhtml?articleID=160700620},
  month =        {Nov.},
  year =         {2005},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% UUU
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% VVV, WWW
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
 
%\bibitem {valtonen01} Valtonen, T., \emph{et al.}: An Autonomous
%  Error-tolerant Cell for Scalable Network-on-Chip Architectures. In
%  proc. Norchip (2001) 198-203
@InProceedings{valtonen01,
  author =       {Tuomas Valtonen and Tero Nurmi and Jouni Isoaho and Hannu Tenhunen},
  title =        {An Autonomous Error-tolerant Cell for Scalable Network-on-Chip Architectures},
  booktitle =    {Norchip},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {198--203},
  year =         {2001},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kista, Sweden},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Varadarajan, V.; Mittra, R.;
%Finite-difference time-domain (FDTD) analysis using distributed computing
%Microwave and Guided Wave Letters, IEEE [see also IEEE Microwave and Wireless Components Letters]
%Volume 4,  Issue 5,  May 1994 Page(s):144 - 145
@Article{varadarajan94,
  author =       {V. Varadarajan and R. Mittra},
  title =        {Finite-difference time-domain {(FDTD)} analysis using distributed computing},
  journal =      {IEEE Microwave and Guided Wave Letters},
  year =         {1994},
  OPTkey =       {},
  volume =       {4},
  number =       {5},
  pages =        {144--145},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {}
}
 
%An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS
%Vangal, S.R.; Howard, J.; Ruhl, G.; Dighe, S.; Wilson, H.; Tschanz, J.; Finan, D.; Singh, A.; Jacob, T.; Jain, S.; Erraguntla, V.; Roberts, C.; Hoskote, Y.; Borkar, N.; Borkar, S.;
%Solid-State Circuits, IEEE Journal of
%Volume 43,  Issue 1,  Jan. 2008 Page(s):29 - 41
%Digital Object Identifier 10.1109/JSSC.2007.910957
@Article{vangal07,
  author =       {S.R. Vangal and others},
  title =        {An 80-Tile {Sub-100-W TeraFLOPS} Processor in 65-nm {CMOS}},
  journal =      j-ssc,
  year =         {2008},
  OPTkey =       {},
  volume =       {43},
  number =       {1},
  pages =        {29--41},
  month =        {Jan.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {varma94} Varma, A., Raghavendra, C.S. (eds.):
%  Interconnection Networks for Multiprocessors and Multicomputers
%  Theory and Practice.  IEEE Computer Society Press, Los Alamitos, CA
%  (1994)
@Book{varma94,
  ALTauthor =    {},
  editor =       {A. Varma and C.S. Raghavendra},
  title =        {Interconnection Networks for Multiprocessors and Multicomputers Theory and Practice},
  publisher =    {IEEE Computer Society Press},
  year =         {1994},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Los Alamitos, CA},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@InProceedings{vassiliadis06,
  author =       {Stamatis Vassiliadis and Ioannis Sourdis},
  title =        {Reconfigurable Fabric Interconnects},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {41-44},
  year =         {2006},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
@Article{vellanki05,
  author =       {Praveen Vellanki and Nilanjan Banerjee and Karam S. Chatha},
  title =        {Quality-of-service and error control techniques for mesh-based network-on-chip architectures},
  journal =      {Integration, the VLSI Journal},
  year =         {2005},
  OPTkey =       {},
  volume =       {38},
  number =       {3},
  pages =        {353--382},
  month =        {Jan.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%V. Venkatachalam, M. Franz, Power reduction techniques for microprocessor systems,
%ACM Computing Surveys, Vol. 37, Iss. 3, Sep. 2005, pp. 195 - 237
@Article{venkatachalam05,
  author =       {V. Venkatachalam and M. Franz},
  title =        {Power reduction techniques for microprocessor systems},
  journal =      {ACM Computing Surveys},
  year =         {2005},
  OPTkey =       {},
  volume =       {37},
  number =       {3},
  pages =        {195--237},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Fl�vio R. Wagner, Wander O. Ces�rio, Luigi Carro and Ahmed A. Jerraya,
%Strategies for the integration of hardware and software IP components in embedded systems-on-chip,
%Integration, the VLSI Journal,
%September 2004,
%Vol. 37, Iss. 4, pp. 191-356.
@Article{wagner04,
  author =       {Fl�vio R. Wagner and Wander O. Ces�rio and Luigi Carro and Ahmed A. Jerraya},
  title =        {Strategies for the integration of hardware and software {IP} components in embedded systems-on-chip},
  journal =      {Integration, the VLSI Journal},
  year =         {2004},
  OPTkey =       {},
  volume =       {37},
  number =       {4},
  pages =        {223-252},
  month =        {Sep.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%M. Wang, N. H. Chan, S. Papadimitriou, C. Faloutsos, and T. Madhyastha.
%Data Mining Meets Performance Evaluation: Fast Algorithms for Modeling Bursty Traffic.
%In Proceedings of the 18th International Conference on Data Engineering,
%pages 507-516, February 2002.
@InProceedings{wang02,
  author =       {M. Wang and N. H. Chan and S. Papadimitriou and C. Faloutsos and T. Madhyastha},
  title =        {Data Mining Meets Performance Evaluation: Fast Algorithms for Modeling Bursty Traffic},
  booktitle =    {International Conference on Data Engineering},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {507--516},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%PMCNOC: A Pipelining Multi-Channel Central Caching Network-on-Chip Communication Architecture Design
%Wang, Nan; Sanusi, Azeez; Zhao, Peiyi; Mohamed, Shaheen; Bayoumi, Magdy A.;
%Signal Processing Systems, 2007 IEEE Workshop on
%17-19 Oct. 2007 Page(s):487 - 492
@InProceedings{wang07,
  author =       {Nan Wang and Azeez Sanusi and Peiyi Zhao and Shaheen Mohamed and Magdy A. Bayoumi},
  title =        {{PMCNOC}: A Pipelining Multi-Channel Central Caching Network-on-Chip Communication Architecture Design},
  booktitle =    {SiPS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {487--492},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%A.R. Weiss,
% Dhrystone Benchmark - History, analysis, "scores" and recommendations,
%white paper, EEMBC Certification Laboratories, Austin, TX, Nov. 2002.
@Misc{weiss02,
  OPTkey =       {},
  author =       {A.R. Weiss},
  title =        {Dhrystone Benchmark - History, analysis, "scores" and recommendations},
  howpublished = {EEMBC Certification Laboratories, white paper},
  month =        {Nov.},
  year =         {2002},
  OPTnote =      {},
  OPTannote =    {}
}
 
%R.P. Weicker,
%An overview of common benchmarks,
%Computer, Vol. 23, Iss. 12, Dec. 1990, pp. 65-75.
@Article{Weicker90,
  author =       {R.P. Weicker},
  title =        {An overview of common benchmarks},
  journal =      {IEEE Computer},
  year =         {1990},
  OPTkey =       {},
  volume =       {23},
  number =       {12},
  pages =        {65--75},
  month =        {Dec.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%P.Wielage,  K. Goossens,
%Networks on silicon: blessing or nightmare?,
%Digital System Design, 2002. Proceedings. Euromicro Symposium on
%4-6 Sept. 2002, pp. 196 - 200.
@InProceedings{wielage02,
  author =       {P. Wielage and  K. Goossens},
  title =        {Networks on silicon: blessing or nightmare?},
  booktitle =    {Euromicro DSD},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {196--200},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%Daniel Wiklund and Dake Liu
%Switched interconnect for system-on-a-chip designs
%Proc of the IP2000 Europe conference, Edinburgh, Scotland, Oct 2000
@InProceedings{wiklund00,
  author =       {Daniel Wiklund and Dake Liu},
  title =        {Switched interconnect for system-on-a-chip designs},
  booktitle =    {IP2000},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {198--192},
  year =         {2000},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Edinburgh, Scotland},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Daniel Wiklund and Dake Liu
%SoCBUS: Switched Network on Chip for Hard Real Time Systems
%Proc of the International Parallel and Distributed Processing Symposium (IPDPS), Nice, France, Apr 2003
@InProceedings{wiklund03,
  author =       {Daniel Wiklund and Dake Liu},
  title =        {SoCBUS: Switched Network on Chip for Hard Real Time Systems},
  booktitle =    {IPDPS},
  OPTcrossref =  {},
  OPTkey =       {},
  OPTpages =     {},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {wiklund04} Wiklund, D. et al.:
%Network on chip simulations for benchmarking.
%In: Proc. of IWSOC (2004) 269-274
@InProceedings{wiklund04,
  author =       {Daniel Wiklund and Sumant Sathe and Dake Liu},
  title =        {Network on chip simulations for benchmarking},
  booktitle =    {IWSOC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {269--274},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Banff, Canada},
  OPTmonth =     {},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%D. Wiklund,
%Development and performance evaluation of networks on chip,
%PhD thesis, No. 932, Link�pings universitet, Apr. 2005.
@PhdThesis{wiklund05,
  author =       {Daniel Wiklund},
  title =        {Development and performance evaluation of networks on chip},
  school =       {Link\"oping university},
  year =         {2005},
  OPTkey =       {},
  OPTtype =      {},
  OPTaddress =   {Link\"oping, Sweden},
  month =        {Apr.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Article{wolf08,
  author =       {W. Wolf and A.A. Jerraya and G. Martin},
  title =        {Multiprocessor System-on-Chip{(MPSoC)} Technology},
  journal =      t-cadics,
  year =         {2008},
  OPTkey =       {},
  volume =       {27},
  number =       {10},
  pages =        {1701--1713},
  month =        {Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
%S.C. Woo, M. Ohara, E. Torrie, J.P. Singh, A. Gupta,
% The SPLASH-2 programs: characterization and methodological considerations,
%International Symposium on Computer Architecture (ISCA),
%Santa Margherita Ligure, Italy, 22-24 Jun 1995, pp. 24 - 36.
@InProceedings{woo95,
  author =       {S.C. Woo and M. Ohara and E. Torrie and J.P. Singh and A. Gupta},
  title =        {The {SPLASH-2} programs: characterization and methodological considerations},
  booktitle =    {ISCA},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {24--36},
  year =         {1995},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Santa Margherita Ligure, Italy},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
% KORVAA XU05 tuolla lehtijutulla!
 
%Jiang Xu, W. Wolf, J. Henkel, S. Chakradhar,
%Methodology for design, modeling, and analysis of networks-on-chip,
%ISCAS, May 2005, pp. 1778-1781.
@InProceedings{xu05,
  author =       {Jiang Xu and W. Wolf and J. Henkel and S. Chakradhar},
  title =        {Methodology for design, modeling, and analysis of networks-on-chip},
  booktitle =    {ISCAS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {1778--1781},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Kobe, Japan},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
@Article{xu06,
  author =       {Jiang Xu and W. Wolf and J. Henkel and S. Chakradhar},
  title =        {A Design Methodology for Application-Specific Networks-on-Chip},
  journal =      {ACM Trans. Embedded Computing Systems},
  year =         {2006},
  OPTkey =       {},
  volume =       {5},
  number =       {2},
  pages =        {262--280},
  month =        {May},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Walter, I.; Cidon, I.; Ginosar, R.; Kolodny, A.
%Access Regulation to Hot-Modules in Wormhole NoCs ,
%NOCS, May 2007, Page(s): 137-148
 
@InProceedings{walter07,
  author =       {I. Walter and I. Cidon and  R. Ginosar and A. Kolodny},
  title =        {Access Regulation to Hot-Modules in Wormhole {NoCs}},
  booktitle =    {NOCS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {137--148},
  year =         {2007},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {May},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%P.T. Wolkotte,  G.J.M. Smit, G.K. Rauwerda, L.T. Smit,
%An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip,
%Proceedings of IEEE International Parallel and Distributed Processing Symposium (IPDPS),
%Denver, CA, USA, 04-08 April 2005, pp. 155a - 155a.
@InProceedings{wolkotte05,
  author =       {P.T. Wolkotte and  G.J.M. Smit and G.K. Rauwerda and L.T. Smit},
  title =        {An Energy-Efficient Reconfigurable Circuit-Switched Network-on-Chip},
  booktitle =    {IPDPS},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {155a},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Denver, CA, USA},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%Wolkotte, P.; Smit, G.; Becker, J.;
%Energy efficient NoC for best effort communication
%Field Programmable Logic and Applications, 2005. International Conference on
%24-26 Aug. 2005 Page(s):197 - 202
@InProceedings{wolkotte05b,
  author =       {P. Wolkotte and G. Smit and J. Becker},
  title =        {Energy efficient {NoC} for best effort communication},
  booktitle =    {FPL},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {197--202},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Tampere, Finland},
  month =        {Aug.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%Wolkotte, P.T.; Smit, G.J.M.; Kavaldjiev, N.; Becker, J.E.; Becker, J.;
%Energy Model of Networks-on-Chip and a Bus System-on-Chip,
%2005. Proceedings. 2005 International Symposium on
%15-17 Nov. 2005 Page(s):82 - 85
@InProceedings{wolkotte05c,
  author =       {P.T. Wolkotte and G.J.M. Smit and N. Kavaldjiev and J.E. Becker and  J. Becker},
  title =        {Energy Model of Networks-on-Chip and a Bus System-on-Chip},
  booktitle =    tresoc,
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {82--85},
  year =         {2005},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Tampere, Finland},
  month =        {Nov.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%
%% XXX, YYY, ZZZ
%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
%Applying CDMA Technique to Network-on-Chip,
%Xin Wang; Tapani Ahonen; Jari Nurmi,
%Very Large Scale Integration (VLSI) Systems, IEEE Transactions on,
%Volume 15,  Issue 10,  Oct. 2007 Page(s):1091 - 1100
@Article{xinwang07,
  author =       {{Xin Wang} and Tapani Ahonen and Jari Nurmi},
  title =        {Applying {CDMA} Technique to Network-on-Chip},
  journal =      t-vlsi,
  year =         {2007},
  OPTkey =       {},
  volume =       {15},
  number =       {10},
  pages =        {1091--1100},
  month =        {Oct.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
% Analysis of power consumption on switch fabrics in network routers
%Ye, T.T.   Benini, L.   De Micheli, G.
%This paper appears in: Design Automation Conference, 2002. Proceedings. 39th
%Publication Date: 2002
%On page(s): 524- 529
@InProceedings{ye02,
  author =       {T.T. Ye and  L. Benini and G. {de Micheli}},
  title =        {Analysis of power consumption on switch fabrics in network routers},
  booktitle =    {DAC},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {524--529},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Jun.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%T. Ye, L. Benini and G. De Micheli,
%Packetization and Routing Analysis of On-Chip Multiprocessor
%Networks,� JSA - Journal of System Architecture, Vol 50, February 2004, pp. 81-104
@Article{ye04,
  author =       {Terry Ye and Luca Benini and Giovanni de Micheli},
  title =        {Packetization and Routing Analysis of On-Chip Multiprocessor},
  journal =      {Journal of System Architecture},
  year =         {2004},
  OPTkey =       {},
  volume =       {50},
  OPTnumber =    {},
  pages =        {81--104},
  month =        {Feb.},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%\bibitem {zalewski95} Zalewski, J. (ed.): Advanced Multiprocessor Bus
%  Architectures. IEEE Computer Society Press, Los Alamitos, CA (1995)
@Book{zalewski95,
  ALTauthor =    {},
  editor =       {Janusz Zalewski},
  title =        {Interconnection Networks for Multiprocessors and Multicomputers Theory and Practice},
  publisher =    {IEEE Computer Society Press},
  year =         {1995},
  OPTkey =       {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  address =      {Los Alamitos, CA},
  OPTedition =   {},
  OPTmonth =     {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
%\bibitem {zeferino02} Zeferino, C.A., et. al.: A Study on
%  Communication Issues for System-on-Chip. In proc. SBCCI (2002)
%  121-126
@InProceedings{zeferino02,
  author =       {Cesar A. Zeferino and Marcio E. Kreutz and Luigi Carro and  Altamiro A. Susin},
  title =        {A Study on Communication Issues for System-on-Chip},
  booktitle =    {SBCCI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {121--126},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Porto Alegre, Brazil},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
% C. A. Zeferino, M. E. Kreutz, L. Carro, A. A. Susin,
%Models for Communication Tradeoffs on Systems-on-Chip,
%Int. Workshop on IP-based SoC Design 2002, Grenoble, France, Oct. 2002, pp. 394-400.
@InProceedings{zeferino02b,
  author =       {C. A. Zeferino and M. E. Kreutz and L. Carro and A. A. Susin},
  title =        {Models for Communication Tradeoffs on Systems-on-Chip},
  booktitle =    {IP based design},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {394--400},
  year =         {2002},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Grenoble, France},
  month =        {Oct.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%C.A. Zeferino, A.A. Susin,
%SoCIN: a parametric and scalable network-on-chip,
%Proceedings. 16th Symposium on Integrated Circuits and Systems Design (SBCCI)
%Sept. 8-11, 2003, pp. 169 -174.
@InProceedings{zeferino03,
  author =       {C.A. Zeferino and A.A. Susin},
  title =        {SoCIN: a parametric and scalable network-on-chip},
  booktitle =    {SBCCI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {169--174},
  year =         {2003},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%C.A. Zeferino, M.E. Kreutz, A.A. Susin,
%RASoC: a router soft-core for networks-on-chip,
%In Proc. Design, Automation and Test in Europe Conference and Exhibition (DATE),
%16-20 Feb. 2004, Paris, France, Vol. 3, pp. 198 - 203.
@InProceedings{zeferino04a,
  author =       {C.A. Zeferino and M.E. Kreutz and A.A. Susin},
  title =        {{RASoC}: a router soft-core for networks-on-chip},
  booktitle =    {DATE},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {198--203},
  year =         {2004},
  OPTeditor =    {},
  volume =       {3},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Paris, France},
  month =        {Feb.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
%C. A. Zeferino, F. G. M. Espirito Santo, A. A. Susin.
%ParIS: A Parameterizable Interconnect Switch for Networks-on-Chip.
%17th Symposium on Integrated Circuits and Systems (SBCCI�2004),
%Porto de Galinhas, Brazil, ACM Press, Sept. 2004. pp.204-209.
@InProceedings{zeferino04b,
  author =       {C. A. Zeferino and F. G. M. Espirito Santo and A. A. Susin},
  title =        {ParIS: A Parameterizable Interconnect Switch for Networks-on-Chip},
  booktitle =    {SBCCI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {204--209},
  year =         {2004},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Porto de Galinhas, Brazil},
  month =        {Sep.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
%\bibitem {zhang99} Hui Zhang et al.:
%Interconnect architecture exploration for low-energy reconfigurable single-chip DSPs.
%In: Proc. of
%Workshop on VLSI (1999) 2-8
%\end{thebibliography}
@InProceedings{zhang99,
  author =       {Hui Zhang and Marlene Wan and Varghese George and Jan Rabaey},
  title =        {Interconnect architecture exploration for low-energy reconfigurable single-chip {DSP}s},
  booktitle =    {Workshop on VLSI},
  OPTcrossref =  {},
  OPTkey =       {},
  pages =        {2--8},
  year =         {1999},
  OPTeditor =    {},
  OPTvolume =    {},
  OPTnumber =    {},
  OPTseries =    {},
  OPTaddress =   {Orlando, Florida, USA},
  month =        {Apr.},
  OPTorganization = {},
  OPTpublisher = {},
  OPTnote =      {},
  OPTannote =    {}
}
 
 
 
 
Line No.	Rev	Author	Line
1	145	lanttu
2			`% ------------------------------------------`
3			`% List of references`
4			`% Soc Interconnection Research Group`
5			`% Institute of Digital and Computer Systems`
6			`% Tampere University of Technology`
7			`% ------------------------------------------`
8
9			`% ------------------------------------------`
10			`% Created by : Erno Salminen (ES), 07.04.2004`
11			`% Modified :`
12			`% ------------------------------------------`
13
14			`% ------------------------------------------`
15			`% It is best to emacs for editing this file`
16			`% because is has a separate bibtex mode which`
17			`% gives additional menus for adding new refs.`
18			`%`
19			`% Do not ever remove any references or modify their`
20			`% identification!`
21			`% You can still add comments or correct data.`
22			`% Be careful when adding to ref_id! (see below)`
23			`% ------------------------------------------`
24
25			`% --------------------------`
26			`% Example of journal artcile`
27			`% --------------------------`
28			`% In Latex doc, type \cite{ref_id} to add ref to this record.`
29			`% ref_id is of type`
30			`% = last name of first author, e.g. salminen`
31			`% = two numbers, e.g. 03`
32			`% = 'running number' to distinquish several refs of`
33			`% one author on a given year, start with a`
34			`% use only small case letters and no white spaces, e.g. salminen03a`
35			`% Explanations from: http://www.ecst.csuchico.edu/~jacobsd/bib/formats/bibtex.html`
36			`% Article{ref_id,`
37			`% author = {The name(s) of the author(s), in the format`
38			`% described in the LaTeX book. },`
39			`% title = {The work's title, typed as explained in the LaTeX book. },`
40			`% journal = {A journal name. Abbreviations are provided for many journals. },`
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