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[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.communication/] [hibi/] [3.0/] [vhd/] [hibi_segment_6p.vhd] - Blame information for rev 162

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1 158 lanttu
-- ***************************************************
2
-- File: hibi_segment_6p.vhd
3 162 lanttu
-- Creation date: 28.02.2013
4
-- Creation time: 13:35:47
5 158 lanttu
-- Description: 
6
-- Created by: matilail
7
-- This file was generated with Kactus2 vhdl generator.
8
-- ***************************************************
9
library IEEE;
10
library hibi;
11
library work;
12
use hibi.all;
13
use work.all;
14
use IEEE.std_logic_1164.all;
15
 
16
entity hibi_segment_6p is
17
 
18
        generic (
19
                ip_mslave_0_addr_end : integer := 2; -- HIBI end address for interface 0
20
                ip_mslave_0_addr_start : integer := 1; -- HIBI address for interface 0
21
                ip_mslave_1_addr_end : integer := 4; -- HIBI end address for interface 1
22
                ip_mslave_1_addr_start : integer := 3; -- HIBI address for interface 1
23
                ip_mslave_2_addr_end : integer := 6; -- HIBI end address for interface 2
24
                ip_mslave_2_addr_start : integer := 5; -- HIBI address for interface 2
25
                ip_mslave_3_addr_end : integer := 8; -- HIBI end address for interface 3
26 162 lanttu
                ip_mslave_3_addr_start : integer := 7; -- HIBI address for interface 3
27
                ip_mslave_4_addr_end : integer := 10; -- HIBI end address for interface 3
28
                ip_mslave_4_addr_start : integer := 9; -- HIBI address for interface 3
29
                ip_mslave_5_addr_end : integer := 12; -- HIBI end address for interface 3
30
                ip_mslave_5_addr_start : integer := 11 -- HIBI address for interface 3
31 158 lanttu
        );
32
 
33
        port (
34
 
35
                -- Interface: clocks_0
36
                -- Clock inputs  interface for hibi wrapper_3
37
                agent_clk : in std_logic;
38
                agent_sync_clk : in std_logic;
39
                bus_clk : in std_logic;
40
                bus_sync_clk : in std_logic;
41
 
42
                -- Interface: clocks_1
43
                -- Clock inputs  interface for hibi wrapper_3
44
                agent_clk_1 : in std_logic;
45
                agent_sync_clk_1 : in std_logic;
46
                bus_clk_1 : in std_logic;
47
                bus_sync_clk_1 : in std_logic;
48
 
49
                -- Interface: clocks_2
50
                -- Clock inputs  interface for hibi wrapper_3
51
                agent_clk_2 : in std_logic;
52
                agent_sync_clk_2 : in std_logic;
53
                bus_clk_2 : in std_logic;
54
                bus_sync_clk_2 : in std_logic;
55
 
56
                -- Interface: clocks_3
57
                -- Clock inputs  interface for hibi wrapper_3
58
                agent_clk_3 : in std_logic;
59
                agent_sync_clk_3 : in std_logic;
60
                bus_clk_3 : in std_logic;
61
                bus_sync_clk_3 : in std_logic;
62
 
63
                -- Interface: clocks_4
64
                agent_clk_4 : in std_logic;
65
                agent_sync_clk_4 : in std_logic;
66
                bus_clk_4 : in std_logic;
67
                bus_sync_clk_4 : in std_logic;
68
 
69
                -- Interface: clocks_5
70
                agent_clk_5 : in std_logic;
71
                agent_sync_clk_5 : in std_logic;
72
                bus_clk_5 : in std_logic;
73
                bus_sync_clk_5 : in std_logic;
74
 
75
                -- Interface: ip_mMaster_0
76
                -- HIBI ip mirrored master agent interface 0 (r4 wrapper)
77
                agent_av_in : in std_logic;
78
                agent_comm_in : in std_logic_vector(4 downto 0);
79
                agent_data_in : in std_logic_vector(31 downto 0);
80
                agent_re_in : in std_logic;
81
                agent_we_in : in std_logic;
82
 
83
                -- Interface: ip_mMaster_1
84
                -- HIBI ip mirrored master agent interface 1 (r4 wrapper)
85
                agent_av_in_1 : in std_logic;
86
                agent_comm_in_1 : in std_logic_vector(4 downto 0);
87
                agent_data_in_1 : in std_logic_vector(31 downto 0);
88
                agent_re_in_1 : in std_logic;
89
                agent_we_in_1 : in std_logic;
90
 
91
                -- Interface: ip_mMaster_2
92
                -- HIBI ip mirrored master agent interface 2 (r4 wrapper)
93
                agent_av_in_2 : in std_logic;
94
                agent_comm_in_2 : in std_logic_vector(4 downto 0);
95
                agent_data_in_2 : in std_logic_vector(31 downto 0);
96
                agent_re_in_2 : in std_logic;
97
                agent_we_in_2 : in std_logic;
98
 
99
                -- Interface: ip_mMaster_3
100
                -- HIBI ip mirrored master agent interface 3 (r4 wrapper)
101
                agent_av_in_3 : in std_logic;
102
                agent_comm_in_3 : in std_logic_vector(4 downto 0);
103
                agent_data_in_3 : in std_logic_vector(31 downto 0);
104
                agent_re_in_3 : in std_logic;
105
                agent_we_in_3 : in std_logic;
106
 
107
                -- Interface: ip_mMaster_4
108
                agent_av_in_4 : in std_logic;
109
                agent_comm_in_4 : in std_logic_vector(4 downto 0);
110
                agent_data_in_4 : in std_logic_vector(31 downto 0);
111
                agent_re_in_4 : in std_logic;
112
                agent_we_in_4 : in std_logic;
113
 
114
                -- Interface: ip_mMaster_5
115
                agent_av_in_5 : in std_logic;
116
                agent_comm_in_5 : in std_logic_vector(4 downto 0);
117
                agent_data_in_5 : in std_logic_vector(31 downto 0);
118
                agent_re_in_5 : in std_logic;
119
                agent_we_in_5 : in std_logic;
120
 
121
                -- Interface: ip_mSlave_0
122
                -- HIBI ip mirrored slave agent interface 0 (r4 wrapper)
123
                agent_av_out : out std_logic;
124
                agent_comm_out : out std_logic_vector(4 downto 0);
125
                agent_data_out : out std_logic_vector(31 downto 0);
126
                agent_empty_out : out std_logic;
127
                agent_full_out : out std_logic;
128
                agent_one_d_out : out std_logic;
129
                agent_one_p_out : out std_logic;
130
 
131
                -- Interface: ip_mSlave_1
132
                -- HIBI ip mirrored slave agent interface 1  (r4 wrapper)
133
                agent_av_out_1 : out std_logic;
134
                agent_comm_out_1 : out std_logic_vector(4 downto 0);
135
                agent_data_out_1 : out std_logic_vector(31 downto 0);
136
                agent_empty_out_1 : out std_logic;
137
                agent_full_out_1 : out std_logic;
138
                agent_one_d_out_1 : out std_logic;
139
                agent_one_p_out_1 : out std_logic;
140
 
141
                -- Interface: ip_mSlave_2
142
                -- HIBI ip mirrored slave agent interface 2 (r4 wrapper)
143
                agent_av_out_2 : out std_logic;
144
                agent_comm_out_2 : out std_logic_vector(4 downto 0);
145
                agent_data_out_2 : out std_logic_vector(31 downto 0);
146
                agent_empty_out_2 : out std_logic;
147
                agent_full_out_2 : out std_logic;
148
                agent_one_d_out_2 : out std_logic;
149
                agent_one_p_out_2 : out std_logic;
150
 
151
                -- Interface: ip_mSlave_3
152
                -- HIBI ip mirrored slave agent interface_3 (r4 wrapper)
153
                agent_av_out_3 : out std_logic;
154
                agent_comm_out_3 : out std_logic_vector(4 downto 0);
155
                agent_data_out_3 : out std_logic_vector(31 downto 0);
156
                agent_empty_out_3 : out std_logic;
157
                agent_full_out_3 : out std_logic;
158
                agent_one_d_out_3 : out std_logic;
159
                agent_one_p_out_3 : out std_logic;
160
 
161
                -- Interface: ip_mSlave_4
162
                agent_av_out_4 : out std_logic;
163
                agent_comm_out_4 : out std_logic_vector(4 downto 0);
164
                agent_data_out_4 : out std_logic_vector(31 downto 0);
165
                agent_empty_out_4 : out std_logic;
166
                agent_full_out_4 : out std_logic;
167
                agent_one_d_out_4 : out std_logic;
168
                agent_one_p_out_4 : out std_logic;
169
 
170
                -- Interface: ip_mSlave_5
171
                agent_av_out_5 : out std_logic;
172
                agent_comm_out_5 : out std_logic_vector(4 downto 0);
173
                agent_data_out_5 : out std_logic_vector(31 downto 0);
174
                agent_empty_out_5 : out std_logic;
175
                agent_full_out_5 : out std_logic;
176
                agent_one_d_out_5 : out std_logic;
177
                agent_one_p_out_5 : out std_logic;
178
 
179
                -- Interface: rst_n
180
                -- Active low reset interface.
181
                rst_n : in std_logic
182
        );
183
 
184
end hibi_segment_6p;
185
 
186
 
187
architecture structural of hibi_segment_6p is
188
 
189
        signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV : std_logic;
190
        signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV : std_logic;
191
        signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV : std_logic;
192
        signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV : std_logic;
193 162 lanttu
        signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV : std_logic;
194
        signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV : std_logic;
195 158 lanttu
        signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV : std_logic;
196
        signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
197
        signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
198
        signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
199
        signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
200 162 lanttu
        signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
201
        signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM : std_logic_vector(4 downto 0);
202 158 lanttu
        signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM : std_logic_vector(4 downto 0);
203
        signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA : std_logic_vector(31 downto 0);
204
        signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA : std_logic_vector(31 downto 0);
205
        signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA : std_logic_vector(31 downto 0);
206
        signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA : std_logic_vector(31 downto 0);
207 162 lanttu
        signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA : std_logic_vector(31 downto 0);
208
        signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA : std_logic_vector(31 downto 0);
209 158 lanttu
        signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA : std_logic_vector(31 downto 0);
210
        signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL : std_logic;
211
        signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL : std_logic;
212
        signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL : std_logic;
213
        signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL : std_logic;
214 162 lanttu
        signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL : std_logic;
215
        signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL : std_logic;
216 158 lanttu
        signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL : std_logic;
217
        signal hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK : std_logic;
218
        signal hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK : std_logic;
219
        signal hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK : std_logic;
220
        signal hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK : std_logic;
221 162 lanttu
        signal hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK : std_logic;
222
        signal hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK : std_logic;
223 158 lanttu
        signal hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK : std_logic;
224
 
225
        component hibi_orbus_6p
226
                generic (
227
                        comm_width_g : integer := 5; -- HIBI command width
228
                        data_width_g : integer := 32 -- HIBI data width
229
 
230
                );
231
                port (
232
 
233
                        -- Interface: master
234
                        -- HIBI bus <---> wrapper master interface
235
                        bus_av_out : out std_logic;
236
                        bus_comm_out : out std_logic_vector(4 downto 0);
237
                        bus_data_out : out std_logic_vector(31 downto 0);
238
                        bus_full_out : out std_logic;
239
                        bus_lock_out : out std_logic;
240
 
241
                        -- Interface: slave_0
242
                        -- HIBI bus <---> wrapper slave interface
243
                        bus_av_0_in : in std_logic;
244
                        bus_comm_0_in : in std_logic_vector(4 downto 0);
245
                        bus_data_0_in : in std_logic_vector(31 downto 0);
246
                        bus_full_0_in : in std_logic;
247
                        bus_lock_0_in : in std_logic;
248
 
249
                        -- Interface: slave_1
250
                        -- HIBI bus <---> wrapper slave interface
251
                        bus_av_1_in : in std_logic;
252
                        bus_comm_1_in : in std_logic_vector(4 downto 0);
253
                        bus_data_1_in : in std_logic_vector(31 downto 0);
254
                        bus_full_1_in : in std_logic;
255
                        bus_lock_1_in : in std_logic;
256
 
257
                        -- Interface: slave_2
258
                        -- HIBI bus <---> wrapper slave interface
259
                        bus_av_2_in : in std_logic;
260
                        bus_comm_2_in : in std_logic_vector(4 downto 0);
261
                        bus_data_2_in : in std_logic_vector(31 downto 0);
262
                        bus_full_2_in : in std_logic;
263
                        bus_lock_2_in : in std_logic;
264
 
265
                        -- Interface: slave_3
266
                        -- HIBI bus <---> wrapper slave interface
267
                        bus_av_3_in : in std_logic;
268
                        bus_comm_3_in : in std_logic_vector(4 downto 0);
269
                        bus_data_3_in : in std_logic_vector(31 downto 0);
270
                        bus_full_3_in : in std_logic;
271 162 lanttu
                        bus_lock_3_in : in std_logic;
272 158 lanttu
 
273 162 lanttu
                        -- Interface: slave_4
274
                        -- HIBI bus <---> wrapper slave interface
275
                        bus_av_4_in : in std_logic;
276
                        bus_comm_4_in : in std_logic_vector(4 downto 0);
277
                        bus_data_4_in : in std_logic_vector(31 downto 0);
278
                        bus_full_4_in : in std_logic;
279
                        bus_lock_4_in : in std_logic;
280
 
281
                        -- Interface: slave_5
282
                        -- HIBI bus <---> wrapper slave interface
283
                        bus_av_5_in : in std_logic;
284
                        bus_comm_5_in : in std_logic_vector(4 downto 0);
285
                        bus_data_5_in : in std_logic_vector(31 downto 0);
286
                        bus_full_5_in : in std_logic;
287
                        bus_lock_5_in : in std_logic
288
 
289 158 lanttu
                );
290
        end component;
291
 
292
        -- HIBI bus wrapper, interface revision 4 
293
        component hibi_wrapper_r4
294
                generic (
295
                        addr_g : integer := 46; -- addressing settings: unique for each wrapper
296
                        addr_limit_g : integer := 0; -- Upper address boundary
297
                        addr_width_g : integer := 32; -- HIBI address width
298
                        arb_type_g : integer := 0; -- Arbitration type 0 round-robin, 1 priority, 2 combined, 3 DAA. Ensure that all wrappers in a segment agree on arb_type
299
                        cfg_re_g : integer := 0; --  enable reading config
300
                        cfg_we_g : integer := 0; -- enable writing config
301
                        comm_width_g : integer := 5; -- HIBI communication width (HIBI v.2=3, v.3 = 5 bits)
302
                        counter_width_g : integer := 7; -- greater than or equal (n_agents, max_send...) 
303
                        data_width_g : integer := 32; -- HIBI data width (less than or equal)
304
                        debug_width_g : integer := 2; -- For special monitors
305
                        fifo_sel_g : integer := 0; -- fifo_sel: 0 synch multiclk, 1 basic GALS,  2 Gray FIFO (depth=2^n!), 3 mixed clock pausible ( use 0 for synchronous systems)
306
                        id_g : integer := 5; --  used instead of addr in recfg
307
                        id_max_g : integer := 0; -- Only for bridges+cfg, zero for others!
308
                        id_min_g : integer := 0; -- Only for bridges+cfg, zero for others!
309
                        id_width_g : integer := 4; -- gte(log2(id_g))
310
                        inv_addr_en_g : integer := 0; -- Only for bridges
311
                        keep_slot_g : integer := 0; -- for TDMA
312
                        max_send_g : integer := 50; -- in words. Max_send can be wrapper-specific.
313
                        n_agents_g : integer := 4; -- Number of agents within one segment. Ensure that all wrappers in a segment agree on n_agents
314
                        n_cfg_pages_g : integer := 1; -- Having multiple pages allows fast reconfig. Note that cfg memory initialization is done with separate package if you have many time slots or configuration pages
315
                        n_extra_params_g : integer := 0; -- app-specific registers
316
                        n_time_slots_g : integer := 0; -- TDMA is enabled by setting n_time_slots > 0
317
                        prior_g : integer := 2; -- lte n_agents
318
                        rel_agent_freq_g : integer := 1; -- Synch_multiclk FIFOs must know the ratio of frequencies
319
                        rel_bus_freq_g : integer := 1; -- Synch_multiclk FIFOs must know the ratio of frequencies
320
                        rx_fifo_depth_g : integer := 5; -- All FIFO depths are given in words. Allowed values 0,2,3... words.
321
                        rx_msg_fifo_depth_g : integer := 5; -- All FIFO depths are given in words. Allowed values 0,2,3... words.Prefix msg refers to hi-prior data
322
                        separate_addr_g : integer := 0; -- Transmits addr in parallel with data
323
                        tx_fifo_depth_g : integer := 5; -- All FIFO depths are given in words. Allowed values 0,2,3... words.
324
                        tx_msg_fifo_depth_g : integer := 5 -- All FIFO depths are given in words. Allowed values 0,2,3... words.Prefix msg refers to hi-prior data
325
 
326
                );
327
                port (
328
 
329
                        -- Interface: bus_mMaster
330
                        -- HIBI bus interface
331
                        bus_av_in : in std_logic;
332
                        bus_comm_in : in std_logic_vector(4 downto 0);
333
                        bus_data_in : in std_logic_vector(31 downto 0);
334
                        bus_full_in : in std_logic;
335
                        bus_lock_in : in std_logic;
336
 
337
                        -- Interface: bus_mSlave
338
                        bus_av_out : out std_logic;
339
                        bus_comm_out : out std_logic_vector(4 downto 0);
340
                        bus_data_out : out std_logic_vector(31 downto 0);
341
                        bus_full_out : out std_logic;
342
                        bus_lock_out : out std_logic;
343
 
344
                        -- Interface: clocks
345
                        -- HIBI clock input
346
                        agent_clk : in std_logic;
347
                        agent_sync_clk : in std_logic;
348
                        bus_clk : in std_logic;
349
                        bus_sync_clk : in std_logic;
350
 
351
                        -- Interface: ip_mMaster
352
                        -- HIBI IP  mirrored master interface revision 4.
353
                        agent_av_in : in std_logic;
354
                        agent_comm_in : in std_logic_vector(4 downto 0);
355
                        agent_data_in : in std_logic_vector(31 downto 0);
356
                        agent_re_in : in std_logic;
357
                        agent_we_in : in std_logic;
358
 
359
                        -- Interface: ip_mSlave
360
                        -- HIBI IP  mirrored slave interface revision 4.
361
                        agent_av_out : out std_logic;
362
                        agent_comm_out : out std_logic_vector(4 downto 0);
363
                        agent_data_out : out std_logic_vector(31 downto 0);
364
                        agent_empty_out : out std_logic;
365
                        agent_full_out : out std_logic;
366
                        agent_one_d_out : out std_logic;
367
                        agent_one_p_out : out std_logic;
368
 
369
                        -- These ports are not in any interface
370
                        -- debug_out : out std_logic_vector(0 downto 0);
371
 
372
                        -- Interface: rst_n
373
                        rst_n : in std_logic
374
 
375
                );
376
        end component;
377
 
378
        -- You can write vhdl code after this tag and it is saved through the generator.
379
        -- ##KACTUS2_BLACK_BOX_DECLARATIONS_BEGIN##
380
        -- ##KACTUS2_BLACK_BOX_DECLARATIONS_END##
381
        -- Stop writing your code after this tag.
382
 
383
 
384
begin
385
 
386
        -- You can write vhdl code after this tag and it is saved through the generator.
387
        -- ##KACTUS2_BLACK_BOX_ASSIGNMENTS_BEGIN##
388
        -- ##KACTUS2_BLACK_BOX_ASSIGNMENTS_END##
389
        -- Stop writing your code after this tag.
390
 
391
        hibi_orbus_6p_0 : hibi_orbus_6p
392
                port map (
393
                        bus_av_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV,
394
                        bus_av_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV,
395
                        bus_av_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV,
396
                        bus_av_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV,
397 162 lanttu
                        bus_av_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV,
398
                        bus_av_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV,
399 158 lanttu
                        bus_av_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
400
                        bus_comm_0_in(4 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM(4 downto 0),
401
                        bus_comm_1_in(4 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM(4 downto 0),
402
                        bus_comm_2_in(4 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM(4 downto 0),
403
                        bus_comm_3_in(4 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM(4 downto 0),
404 162 lanttu
                        bus_comm_4_in(4 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM(4 downto 0),
405
                        bus_comm_5_in(4 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM(4 downto 0),
406 158 lanttu
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
407
                        bus_data_0_in(31 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA(31 downto 0),
408
                        bus_data_1_in(31 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA(31 downto 0),
409
                        bus_data_2_in(31 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA(31 downto 0),
410
                        bus_data_3_in(31 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA(31 downto 0),
411 162 lanttu
                        bus_data_4_in(31 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA(31 downto 0),
412
                        bus_data_5_in(31 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA(31 downto 0),
413 158 lanttu
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
414
                        bus_full_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL,
415
                        bus_full_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL,
416
                        bus_full_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL,
417
                        bus_full_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL,
418 162 lanttu
                        bus_full_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL,
419
                        bus_full_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL,
420 158 lanttu
                        bus_full_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
421
                        bus_lock_0_in => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK,
422
                        bus_lock_1_in => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK,
423
                        bus_lock_2_in => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK,
424
                        bus_lock_3_in => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK,
425 162 lanttu
                        bus_lock_4_in => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK,
426
                        bus_lock_5_in => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK,
427 158 lanttu
                        bus_lock_out => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK
428
                );
429
 
430
        hibi_wrapper_r4_0 : hibi_wrapper_r4
431
                generic map (
432
                        addr_g => ip_mSlave_0_addr_start,
433
                        addr_limit_g => ip_mSlave_0_addr_end
434
                )
435
                port map (
436
                        agent_av_in => agent_av_in,
437
                        agent_av_out => agent_av_out,
438
                        agent_clk => agent_clk,
439
                        agent_comm_in(4 downto 0) => agent_comm_in(4 downto 0),
440
                        agent_comm_out(4 downto 0) => agent_comm_out(4 downto 0),
441
                        agent_data_in(31 downto 0) => agent_data_in(31 downto 0),
442
                        agent_data_out(31 downto 0) => agent_data_out(31 downto 0),
443
                        agent_empty_out => agent_empty_out,
444
                        agent_full_out => agent_full_out,
445
                        agent_one_d_out => agent_one_d_out,
446
                        agent_one_p_out => agent_one_p_out,
447
                        agent_re_in => agent_re_in,
448
                        agent_sync_clk => agent_sync_clk,
449
                        agent_we_in => agent_we_in,
450
                        bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
451
                        bus_av_out => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveAV,
452
                        bus_clk => bus_clk,
453
                        bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
454
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveCOMM(4 downto 0),
455
                        bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
456
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveDATA(31 downto 0),
457
                        bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
458
                        bus_full_out => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveFULL,
459
                        bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
460
                        bus_lock_out => hibi_orbus_6p_0_slave_0_to_hibi_wrapper_r4_0_bus_mSlaveLOCK,
461
                        bus_sync_clk => bus_sync_clk,
462
                        rst_n => rst_n
463
                );
464
 
465
        hibi_wrapper_r4_1 : hibi_wrapper_r4
466
                generic map (
467
                        addr_g => ip_mSlave_1_addr_start,
468
                        addr_limit_g => ip_mSlave_1_addr_end
469
                )
470
                port map (
471
                        agent_av_in => agent_av_in_1,
472
                        agent_av_out => agent_av_out_1,
473
                        agent_clk => agent_clk_1,
474
                        agent_comm_in(4 downto 0) => agent_comm_in_1(4 downto 0),
475
                        agent_comm_out(4 downto 0) => agent_comm_out_1(4 downto 0),
476
                        agent_data_in(31 downto 0) => agent_data_in_1(31 downto 0),
477
                        agent_data_out(31 downto 0) => agent_data_out_1(31 downto 0),
478
                        agent_empty_out => agent_empty_out_1,
479
                        agent_full_out => agent_full_out_1,
480
                        agent_one_d_out => agent_one_d_out_1,
481
                        agent_one_p_out => agent_one_p_out_1,
482
                        agent_re_in => agent_re_in_1,
483
                        agent_sync_clk => agent_sync_clk_1,
484
                        agent_we_in => agent_we_in_1,
485
                        bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
486
                        bus_av_out => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveAV,
487
                        bus_clk => bus_clk_1,
488
                        bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
489
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveCOMM(4 downto 0),
490
                        bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
491
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveDATA(31 downto 0),
492
                        bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
493
                        bus_full_out => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveFULL,
494
                        bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
495
                        bus_lock_out => hibi_orbus_6p_0_slave_1_to_hibi_wrapper_r4_1_bus_mSlaveLOCK,
496
                        bus_sync_clk => bus_sync_clk_1,
497
                        rst_n => rst_n
498
                );
499
 
500
        hibi_wrapper_r4_2 : hibi_wrapper_r4
501
                generic map (
502
                        addr_g => ip_mSlave_2_addr_start,
503
                        addr_limit_g => ip_mSlave_2_addr_end
504
                )
505
                port map (
506
                        agent_av_in => agent_av_in_2,
507
                        agent_av_out => agent_av_out_2,
508
                        agent_clk => agent_clk_2,
509
                        agent_comm_in(4 downto 0) => agent_comm_in_2(4 downto 0),
510
                        agent_comm_out(4 downto 0) => agent_comm_out_2(4 downto 0),
511
                        agent_data_in(31 downto 0) => agent_data_in_2(31 downto 0),
512
                        agent_data_out(31 downto 0) => agent_data_out_2(31 downto 0),
513
                        agent_empty_out => agent_empty_out_2,
514
                        agent_full_out => agent_full_out_2,
515
                        agent_one_d_out => agent_one_d_out_2,
516
                        agent_one_p_out => agent_one_p_out_2,
517
                        agent_re_in => agent_re_in_2,
518
                        agent_sync_clk => agent_sync_clk_2,
519
                        agent_we_in => agent_we_in_2,
520
                        bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
521
                        bus_av_out => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveAV,
522
                        bus_clk => bus_clk_2,
523
                        bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
524
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveCOMM(4 downto 0),
525
                        bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
526
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveDATA(31 downto 0),
527
                        bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
528
                        bus_full_out => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveFULL,
529
                        bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
530
                        bus_lock_out => hibi_orbus_6p_0_slave_2_to_hibi_wrapper_r4_2_bus_mSlaveLOCK,
531
                        bus_sync_clk => bus_sync_clk_2,
532
                        rst_n => rst_n
533
                );
534
 
535
        hibi_wrapper_r4_3 : hibi_wrapper_r4
536
                generic map (
537
                        addr_g => ip_mSlave_3_addr_start,
538
                        addr_limit_g => ip_mSlave_3_addr_end
539
                )
540
                port map (
541
                        agent_av_in => agent_av_in_3,
542
                        agent_av_out => agent_av_out_3,
543
                        agent_clk => agent_clk_3,
544
                        agent_comm_in(4 downto 0) => agent_comm_in_3(4 downto 0),
545
                        agent_comm_out(4 downto 0) => agent_comm_out_3(4 downto 0),
546
                        agent_data_in(31 downto 0) => agent_data_in_3(31 downto 0),
547
                        agent_data_out(31 downto 0) => agent_data_out_3(31 downto 0),
548
                        agent_empty_out => agent_empty_out_3,
549
                        agent_full_out => agent_full_out_3,
550
                        agent_one_d_out => agent_one_d_out_3,
551
                        agent_one_p_out => agent_one_p_out_3,
552
                        agent_re_in => agent_re_in_3,
553
                        agent_sync_clk => agent_sync_clk_3,
554
                        agent_we_in => agent_we_in_3,
555
                        bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
556
                        bus_av_out => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveAV,
557
                        bus_clk => bus_clk_3,
558
                        bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
559
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveCOMM(4 downto 0),
560
                        bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
561
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveDATA(31 downto 0),
562
                        bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
563
                        bus_full_out => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveFULL,
564
                        bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
565
                        bus_lock_out => hibi_orbus_6p_0_slave_3_to_hibi_wrapper_r4_3_bus_mSlaveLOCK,
566
                        bus_sync_clk => bus_sync_clk_3,
567
                        rst_n => rst_n
568
                );
569
 
570
        hibi_wrapper_r4_4 : hibi_wrapper_r4
571 162 lanttu
                generic map (
572
                        addr_g => ip_mSlave_4_addr_start,
573
                        addr_limit_g => ip_mSlave_4_addr_end
574
                )
575 158 lanttu
                port map (
576
                        agent_av_in => agent_av_in_4,
577
                        agent_av_out => agent_av_out_4,
578
                        agent_clk => agent_clk_4,
579
                        agent_comm_in(4 downto 0) => agent_comm_in_4(4 downto 0),
580
                        agent_comm_out(4 downto 0) => agent_comm_out_4(4 downto 0),
581
                        agent_data_in(31 downto 0) => agent_data_in_4(31 downto 0),
582
                        agent_data_out(31 downto 0) => agent_data_out_4(31 downto 0),
583
                        agent_empty_out => agent_empty_out_4,
584
                        agent_full_out => agent_full_out_4,
585
                        agent_one_d_out => agent_one_d_out_4,
586
                        agent_one_p_out => agent_one_p_out_4,
587
                        agent_re_in => agent_re_in_4,
588
                        agent_sync_clk => agent_sync_clk_4,
589
                        agent_we_in => agent_we_in_4,
590
                        bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
591 162 lanttu
                        bus_av_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveAV,
592 158 lanttu
                        bus_clk => bus_clk_4,
593
                        bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
594 162 lanttu
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveCOMM(4 downto 0),
595 158 lanttu
                        bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
596 162 lanttu
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveDATA(31 downto 0),
597 158 lanttu
                        bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
598 162 lanttu
                        bus_full_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveFULL,
599 158 lanttu
                        bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
600 162 lanttu
                        bus_lock_out => hibi_orbus_6p_0_slave_4_to_hibi_wrapper_r4_4_bus_mSlaveLOCK,
601 158 lanttu
                        bus_sync_clk => bus_sync_clk_4,
602
                        rst_n => rst_n
603
                );
604
 
605
        hibi_wrapper_r4_5 : hibi_wrapper_r4
606 162 lanttu
                generic map (
607
                        addr_g => ip_mSlave_5_addr_start,
608
                        addr_limit_g => ip_mSlave_5_addr_end
609
                )
610 158 lanttu
                port map (
611
                        agent_av_in => agent_av_in_5,
612
                        agent_av_out => agent_av_out_5,
613
                        agent_clk => agent_clk_5,
614
                        agent_comm_in(4 downto 0) => agent_comm_in_5(4 downto 0),
615
                        agent_comm_out(4 downto 0) => agent_comm_out_5(4 downto 0),
616
                        agent_data_in(31 downto 0) => agent_data_in_5(31 downto 0),
617
                        agent_data_out(31 downto 0) => agent_data_out_5(31 downto 0),
618
                        agent_empty_out => agent_empty_out_5,
619
                        agent_full_out => agent_full_out_5,
620
                        agent_one_d_out => agent_one_d_out_5,
621
                        agent_one_p_out => agent_one_p_out_5,
622
                        agent_re_in => agent_re_in_5,
623
                        agent_sync_clk => agent_sync_clk_5,
624
                        agent_we_in => agent_we_in_5,
625
                        bus_av_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterAV,
626 162 lanttu
                        bus_av_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveAV,
627 158 lanttu
                        bus_clk => bus_clk_5,
628
                        bus_comm_in(4 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterCOMM(4 downto 0),
629 162 lanttu
                        bus_comm_out(4 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveCOMM(4 downto 0),
630 158 lanttu
                        bus_data_in(31 downto 0) => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterDATA(31 downto 0),
631 162 lanttu
                        bus_data_out(31 downto 0) => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveDATA(31 downto 0),
632 158 lanttu
                        bus_full_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterFULL,
633 162 lanttu
                        bus_full_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveFULL,
634 158 lanttu
                        bus_lock_in => hibi_orbus_6p_0_master_to_hibi_wrapper_r4_5_bus_mMasterLOCK,
635 162 lanttu
                        bus_lock_out => hibi_orbus_6p_0_slave_5_to_hibi_wrapper_r4_5_bus_mSlaveLOCK,
636 158 lanttu
                        bus_sync_clk => bus_sync_clk_5,
637
                        rst_n => rst_n
638
                );
639
 
640
end structural;
641
 

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