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-------------------------------------------------------------------------------
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-- Funbase IP library Copyright (C) 2011 TUT Department of Computer Systems
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--
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-- This source file may be used and distributed without
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-- restriction provided that this copyright statement is not
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-- removed from the file and that any derivative work contains
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-- the original copyright notice and the associated disclaimer.
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--
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-- This source file is free software; you can redistribute it
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-- and/or modify it under the terms of the GNU Lesser General
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-- Public License as published by the Free Software Foundation;
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-- either version 2.1 of the License, or (at your option) any
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-- later version.
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--
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-- This source is distributed in the hope that it will be
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-- useful, but WITHOUT ANY WARRANTY; without even the implied
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-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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-- PURPOSE. See the GNU Lesser General Public License for more
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-- details.
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--
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-- You should have received a copy of the GNU Lesser General
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-- Public License along with this source; if not, download it
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-- from http://www.opencores.org/lgpl.shtml
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- Title : Hibi toplevel using r4 wrappers
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-- Project :
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-------------------------------------------------------------------------------
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-- File : hibiv3_r4.vhd
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-- Author : Lasse Lehtonen, modified from Jussi Nieminen's HWTG hibi
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-- top level
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-- : Lauri Matilainen, merged r3 and r4 wrappers to the same top level
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-- Company :
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-- Last update: 2012-02-07
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-- Platform :
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-------------------------------------------------------------------------------
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-- Description: Semi-generic toplevel, add as many agents as you like. Just
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-- be sure to create enough addresses in the tables (scroll down).
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-- Every segment has equal number of wrappers and are connected
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-- as a chain.
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-------------------------------------------------------------------------------
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-- Revisions :
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-- Date Version Author Description
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-- 2009/06/23 1.0 niemin95 Created
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-- (missing revisions)
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-- 2012/02/07 2.0 alhonena First, there are revision listings missing.
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-- This is NOT Nieminen's original. Second, this
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-- was completely broken. Didn't even compile.
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-- It tried to create multiple drivers. I made a quick
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-- fix. I hope it is as originally intended now.
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use work.hibiv3_pkg.all;
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entity hibi_segment_v3 is
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generic (
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-- HIBI generics
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id_width_g : integer := 4;
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addr_width_g : integer := 32;
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data_width_g : integer := 32;
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comm_width_g : integer := 5;
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counter_width_g : integer := 8;
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rel_agent_freq_g : integer := 1;
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rel_bus_freq_g : integer := 1;
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arb_type_g : integer := 3;
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fifo_sel_g : integer := 0;
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rx_fifo_depth_g : integer := 4;
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rx_msg_fifo_depth_g : integer := 4;
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tx_fifo_depth_g : integer := 4;
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tx_msg_fifo_depth_g : integer := 4;
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max_send_g : integer := 20;
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n_cfg_pages_g : integer := 1;
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n_time_slots_g : integer := 0;
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keep_slot_g : integer := 0;
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n_extra_params_g : integer := 1;
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cfg_re_g : integer := 1;
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cfg_we_g : integer := 1;
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debug_width_g : integer := 0;
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n_r3_agents_g : integer := 3;
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n_r4_agents_g : integer := 1;
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n_segments_g : integer := 1;
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separate_addr_g : integer := 0
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);
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port (
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clk_in : in std_logic;
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-- clk_noc : in std_logic;
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rst_n : in std_logic;
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-- r4_wrapper ip ports
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r4_agent_comm_in : in std_logic_vector(n_r4_agents_g*comm_width_g-1 downto 0);
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r4_agent_data_in : in std_logic_vector(n_r4_agents_g*data_width_g-1 downto 0);
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r4_agent_av_in : in std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_we_in : in std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_re_in : in std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_comm_out : out std_logic_vector(n_r4_agents_g*comm_width_g-1 downto 0);
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r4_agent_data_out : out std_logic_vector(n_r4_agents_g*data_width_g-1 downto 0);
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r4_agent_av_out : out std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_full_out : out std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_one_p_out : out std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_empty_out : out std_logic_vector(n_r4_agents_g-1 downto 0);
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r4_agent_one_d_out : out std_logic_vector(n_r4_agents_g-1 downto 0);
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-- r3_wrapper ip ports
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r3_agent_comm_in : in std_logic_vector(n_r3_agents_g*comm_width_g-1 downto 0);
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r3_agent_data_in : in std_logic_vector(n_r3_agents_g*data_width_g-1 downto 0);
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r3_agent_addr_in : in std_logic_vector(n_r3_agents_g*addr_width_g-1 downto 0);
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r3_agent_we_in : in std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_re_in : in std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_comm_out : out std_logic_vector(n_r3_agents_g*comm_width_g-1 downto 0);
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r3_agent_data_out : out std_logic_vector(n_r3_agents_g*data_width_g-1 downto 0);
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r3_agent_addr_out : out std_logic_vector(n_r3_agents_g*addr_width_g-1 downto 0);
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r3_agent_full_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_one_p_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_empty_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_one_d_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_msg_comm_in : in std_logic_vector(n_r3_agents_g*comm_width_g-1 downto 0);
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r3_agent_msg_data_in : in std_logic_vector(n_r3_agents_g*data_width_g-1 downto 0);
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r3_agent_msg_addr_in : in std_logic_vector(n_r3_agents_g*addr_width_g-1 downto 0);
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r3_agent_msg_we_in : in std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_msg_re_in : in std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_msg_comm_out : out std_logic_vector(n_r3_agents_g*comm_width_g-1 downto 0);
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r3_agent_msg_data_out : out std_logic_vector(n_r3_agents_g*data_width_g-1 downto 0);
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r3_agent_msg_addr_out : out std_logic_vector(n_r3_agents_g*addr_width_g-1 downto 0);
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r3_agent_msg_full_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_msg_one_p_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_msg_empty_out : out std_logic_vector(n_r3_agents_g-1 downto 0);
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r3_agent_msg_one_d_out : out std_logic_vector(n_r3_agents_g-1 downto 0)
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);
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end hibi_segment_v3;
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architecture structural of hibi_segment_v3 is
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-----------------------------------------------------------------------------
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-- HIBI ADDRESSES
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-----------------------------------------------------------------------------
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constant n_agents_c : integer := n_r3_agents_g + n_r4_agents_g;
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type gen_addr_array_type is array (1 to 4) of integer;
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type gen_addr_array_3d_type is array (0 to 2) of gen_addr_array_type;
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type gen_bridge_addr_array is array (0 to 1) of integer;
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-- addresses_c(segment index)(wrapper index in the segment)
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constant addresses_c : gen_addr_array_3d_type :=
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((16#00000010#, 16#00000030#, 16#00000050#, 16#00000070#),
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(16#00000110#, 16#00000130#, 16#00000150#, 16#00000170#),
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(16#00000310#, 16#00000330#, 16#00000350#, 16#00000370#));
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constant bridge_a_addr_base_c : gen_bridge_addr_array :=
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(16#00000000#, 16#00000000#);
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constant bridge_a_addr_limit_c : gen_bridge_addr_array :=
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(16#000000FF#, 16#000001FF#);
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constant bridge_b_addr_base_c : gen_bridge_addr_array :=
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(16#00000000#, 16#00000000#);
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constant bridge_b_addr_limit_c : gen_bridge_addr_array :=
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(16#000000FF#, 16#000001FF#);
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constant bridge_a_id_min_c : gen_bridge_addr_array :=
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(1, 1);
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constant bridge_a_id_max_c : gen_bridge_addr_array :=
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(5, 11);
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constant bridge_b_id_min_c : gen_bridge_addr_array :=
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(1, 1);
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constant bridge_b_id_max_c : gen_bridge_addr_array :=
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(5, 11);
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constant bridge_a_inv_addr_c : gen_bridge_addr_array :=
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(1, 1);
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constant bridge_b_inv_addr_c : gen_bridge_addr_array :=
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(0, 0);
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-----------------------------------------------------------------------------
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--
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-----------------------------------------------------------------------------
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-- purpose: to resolve the number of agents in each segment
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function n_agents_in_segment (
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constant segment, n_segments, wrappers_per_seg : integer)
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return integer is
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begin -- n_agents_in_segment
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if n_segments = 1 then
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return wrappers_per_seg;
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elsif segment = 0 or segment = n_segments - 1 then
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-- end segment, only one bridge
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return wrappers_per_seg + 1;
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else
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-- middle segment
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return wrappers_per_seg + 2;
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end if;
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end n_agents_in_segment;
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function priority_a (
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constant segment, n_segments, wrappers_per_seg : integer)
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return integer is
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begin
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if n_segments = 1 then
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return 0;
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elsif segment = 0 or segment = n_segments - 1 then
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-- end segment, only one bridge
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return wrappers_per_seg + 1;
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else
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-- middle segment
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return wrappers_per_seg + 2;
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end if;
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end priority_a;
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function priority_b (
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constant segment, n_segments, wrappers_per_seg : integer)
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return integer is
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begin
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if n_segments = 1 then
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return 0;
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elsif segment = 0 or segment = n_segments - 1 then
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-- end segment, only one bridge
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return wrappers_per_seg + 1;
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else
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-- middle segment
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return wrappers_per_seg + 1;
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end if;
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end priority_b;
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function id_agent (
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constant segment, n_segments, wrappers_per_seg : integer)
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return integer is
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begin
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if n_segments = 1 then
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return 1;
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elsif segment = 0 then
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-- first segment
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return 1;
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elsif segment = n_segments - 1 then
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-- last segment
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return segment*(wrappers_per_seg+2);
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else
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-- middle segment
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return segment*(wrappers_per_seg+2);
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end if;
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end id_agent;
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function id_a (
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constant segment, n_segments, wrappers_per_seg : integer)
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return integer is
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begin
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if n_segments = 1 then
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return 0;
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elsif segment = 0 then
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-- first segment
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return wrappers_per_seg + 1;
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elsif segment = n_segments - 1 then
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-- last segment
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return 0;
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else
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-- middle segment
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return segment*(wrappers_per_seg+2)+wrappers_per_seg;
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end if;
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end id_a;
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function id_b (
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constant segment, n_segments, wrappers_per_seg : integer)
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return integer is
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begin
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if n_segments = 1 then
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return 0;
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elsif segment = 0 then
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-- first segment
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return 0;
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elsif segment = n_segments - 1 then
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return segment*(wrappers_per_seg+2)+wrappers_per_seg;
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else
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-- middle segment
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return segment*(wrappers_per_seg+2)+wrappers_per_seg+1;
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end if;
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end id_b;
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-- count wrappers per segemnt
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constant r4_wrappers_per_segment_c : integer := n_r4_agents_g / n_segments_g;
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constant r3_wrappers_per_segment_c : integer := n_r3_agents_g / n_segments_g;
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constant wrappers_per_segment_c : integer := r3_wrappers_per_segment_c + r4_wrappers_per_segment_c;
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type bus_data_segments_array is array (0 to n_segments_g-1) of
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std_logic_vector(data_width_g-1 downto 0);
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type bus_comm_segments_array is array (0 to n_segments_g-1) of
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std_logic_vector(comm_width_c-1 downto 0);
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signal bus_wra_data : bus_data_segments_array;
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signal bus_wra_comm : bus_comm_segments_array;
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signal bus_wra_av : std_logic_vector(n_segments_g-1 downto 0);
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|
signal bus_wra_full : std_logic_vector(n_segments_g-1 downto 0);
|
325 |
|
|
signal bus_wra_lock : std_logic_vector(n_segments_g-1 downto 0);
|
326 |
|
|
|
327 |
|
|
-- +1, because there might be bridges in the segment.
|
328 |
|
|
-- extra signals should be optimized away in synthesis
|
329 |
|
|
type data_to_bus_type is array (0 to wrappers_per_segment_c+1) of
|
330 |
|
|
std_logic_vector(data_width_g-1 downto 0);
|
331 |
|
|
type comm_to_bus_type is array (0 to wrappers_per_segment_c+1) of
|
332 |
|
|
std_logic_vector(comm_width_c-1 downto 0);
|
333 |
|
|
|
334 |
|
|
type data_segments_array is array (0 to n_segments_g-1) of data_to_bus_type;
|
335 |
|
|
type comm_segments_array is array (0 to n_segments_g-1) of comm_to_bus_type;
|
336 |
|
|
type cntr_segments_array is array (0 to n_segments_g-1) of std_logic_vector
|
337 |
|
|
(wrappers_per_segment_c + 1 downto 0);
|
338 |
|
|
|
339 |
|
|
signal wra_bus_data : data_segments_array;
|
340 |
|
|
signal wra_bus_comm : comm_segments_array;
|
341 |
|
|
signal wra_bus_av : cntr_segments_array;
|
342 |
|
|
signal wra_bus_full : cntr_segments_array;
|
343 |
|
|
signal wra_bus_lock : cntr_segments_array;
|
344 |
|
|
|
345 |
|
|
-------------------------------------------------------------------------------
|
346 |
|
|
begin -- structural
|
347 |
|
|
-------------------------------------------------------------------------------
|
348 |
|
|
|
349 |
|
|
-- if there is more than 1 segment, wrappers must distribute evenly
|
350 |
|
|
assert n_segments_g = 1 or n_agents_c mod n_segments_g = 0
|
351 |
|
|
report "With more than one segment wrappers distribute evenly"
|
352 |
|
|
severity failure;
|
353 |
|
|
|
354 |
|
|
|
355 |
|
|
segments : for seg in 0 to n_segments_g-1 generate
|
356 |
|
|
|
357 |
|
|
r4_wrappers : for wra in 0 to r4_wrappers_per_segment_c-1 generate
|
358 |
|
|
|
359 |
|
|
|
360 |
|
|
r4_wrapper : entity work.hibi_wrapper_r4
|
361 |
|
|
generic map (
|
362 |
|
|
id_g => id_agent
|
363 |
|
|
(seg, n_segments_g, wrappers_per_segment_c) + wra,
|
364 |
|
|
addr_g => addresses_c(seg)(wra + 1),
|
365 |
|
|
inv_addr_en_g => 0,
|
366 |
|
|
id_width_g => id_width_g,
|
367 |
|
|
addr_width_g => addr_width_g,
|
368 |
|
|
data_width_g => data_width_g,
|
369 |
|
|
separate_addr_g => separate_addr_g,
|
370 |
|
|
comm_width_g => comm_width_g,
|
371 |
|
|
counter_width_g => counter_width_g,
|
372 |
|
|
rel_agent_freq_g => rel_agent_freq_g,
|
373 |
|
|
rel_bus_freq_g => rel_bus_freq_g,
|
374 |
|
|
arb_type_g => arb_type_g,
|
375 |
|
|
fifo_sel_g => fifo_sel_g,
|
376 |
|
|
rx_fifo_depth_g => rx_fifo_depth_g,
|
377 |
|
|
rx_msg_fifo_depth_g => rx_msg_fifo_depth_g,
|
378 |
|
|
tx_fifo_depth_g => tx_fifo_depth_g,
|
379 |
|
|
tx_msg_fifo_depth_g => tx_msg_fifo_depth_g,
|
380 |
|
|
prior_g => wra + 1,
|
381 |
|
|
max_send_g => max_send_g,
|
382 |
|
|
-- n_agents_g should be num of ips + num of bridges in the segment
|
383 |
|
|
n_agents_g => n_agents_in_segment
|
384 |
|
|
(seg, n_segments_g, wrappers_per_segment_c),
|
385 |
|
|
n_cfg_pages_g => n_cfg_pages_g,
|
386 |
|
|
n_time_slots_g => n_time_slots_g,
|
387 |
|
|
keep_slot_g => keep_slot_g,
|
388 |
|
|
n_extra_params_g => n_extra_params_g,
|
389 |
|
|
|
390 |
|
|
cfg_re_g => cfg_re_g,
|
391 |
|
|
cfg_we_g => cfg_we_g,
|
392 |
|
|
debug_width_g => debug_width_g
|
393 |
|
|
)
|
394 |
|
|
port map (
|
395 |
|
|
bus_clk => clk_in,
|
396 |
|
|
agent_clk => clk_in,
|
397 |
|
|
bus_sync_clk => clk_in,
|
398 |
|
|
agent_sync_clk => clk_in,
|
399 |
|
|
rst_n => rst_n,
|
400 |
|
|
bus_comm_in => bus_wra_comm(seg),
|
401 |
|
|
bus_data_in => bus_wra_data(seg),
|
402 |
|
|
bus_full_in => bus_wra_full(seg),
|
403 |
|
|
bus_lock_in => bus_wra_lock(seg),
|
404 |
|
|
bus_av_in => bus_wra_av(seg),
|
405 |
|
|
agent_comm_in => r4_agent_comm_in((seg*wrappers_per_segment_c+wra+1)*
|
406 |
|
|
comm_width_g-1 downto
|
407 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
408 |
|
|
comm_width_g),
|
409 |
|
|
agent_data_in => r4_agent_data_in((seg*wrappers_per_segment_c+wra+1)*
|
410 |
|
|
data_width_g-1 downto
|
411 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
412 |
|
|
data_width_g),
|
413 |
|
|
agent_av_in => r4_agent_av_in(seg*wrappers_per_segment_c+wra),
|
414 |
|
|
agent_we_in => r4_agent_we_in(seg*wrappers_per_segment_c+wra),
|
415 |
|
|
agent_re_in => r4_agent_re_in(seg*wrappers_per_segment_c+wra),
|
416 |
|
|
bus_comm_out => wra_bus_comm(seg)(wra),
|
417 |
|
|
bus_data_out => wra_bus_data(seg)(wra),
|
418 |
|
|
bus_full_out => wra_bus_full(seg)(wra),
|
419 |
|
|
bus_lock_out => wra_bus_lock(seg)(wra),
|
420 |
|
|
bus_av_out => wra_bus_av(seg)(wra),
|
421 |
|
|
agent_comm_out => r4_agent_comm_out((seg*wrappers_per_segment_c+wra+1)*
|
422 |
|
|
comm_width_g-1 downto
|
423 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
424 |
|
|
comm_width_g),
|
425 |
|
|
agent_data_out => r4_agent_data_out((seg*wrappers_per_segment_c+wra+1)*
|
426 |
|
|
data_width_g-1 downto
|
427 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
428 |
|
|
data_width_g),
|
429 |
|
|
agent_av_out => r4_agent_av_out(seg*wrappers_per_segment_c+wra),
|
430 |
|
|
agent_full_out => r4_agent_full_out(seg*wrappers_per_segment_c+wra),
|
431 |
|
|
agent_one_p_out => r4_agent_one_p_out(seg*wrappers_per_segment_c+wra),
|
432 |
|
|
agent_empty_out => r4_agent_empty_out(seg*wrappers_per_segment_c+wra),
|
433 |
|
|
agent_one_d_out => r4_agent_one_d_out(seg*wrappers_per_segment_c+wra)
|
434 |
|
|
-- synthesis translate_off
|
435 |
|
|
,
|
436 |
|
|
debug_out => open,
|
437 |
|
|
debug_in => (others => '0')
|
438 |
|
|
-- synthesis translate_on
|
439 |
|
|
);
|
440 |
|
|
|
441 |
|
|
|
442 |
|
|
end generate r4_wrappers;
|
443 |
|
|
|
444 |
|
|
|
445 |
|
|
r3_wrappers : for wra in 0 to r3_wrappers_per_segment_c-1 generate
|
446 |
|
|
|
447 |
|
|
r3_wrapper : entity work.hibi_wrapper_r3
|
448 |
|
|
generic map (
|
449 |
|
|
id_g => id_agent
|
450 |
|
|
(seg, n_segments_g, wrappers_per_segment_c) + wra + r4_wrappers_per_segment_c,
|
451 |
|
|
addr_g => addresses_c(seg)(wra + r4_wrappers_per_segment_c + 1),
|
452 |
|
|
inv_addr_en_g => 0,
|
453 |
|
|
id_width_g => id_width_g,
|
454 |
|
|
addr_width_g => addr_width_g,
|
455 |
|
|
data_width_g => data_width_g,
|
456 |
|
|
separate_addr_g => separate_addr_g,
|
457 |
|
|
comm_width_g => comm_width_g,
|
458 |
|
|
counter_width_g => counter_width_g,
|
459 |
|
|
rel_agent_freq_g => rel_agent_freq_g,
|
460 |
|
|
rel_bus_freq_g => rel_bus_freq_g,
|
461 |
|
|
arb_type_g => arb_type_g,
|
462 |
|
|
fifo_sel_g => fifo_sel_g,
|
463 |
|
|
rx_fifo_depth_g => rx_fifo_depth_g,
|
464 |
|
|
rx_msg_fifo_depth_g => rx_msg_fifo_depth_g,
|
465 |
|
|
tx_fifo_depth_g => tx_fifo_depth_g,
|
466 |
|
|
tx_msg_fifo_depth_g => tx_msg_fifo_depth_g,
|
467 |
|
|
prior_g => wra + r4_wrappers_per_segment_c + 1,
|
468 |
|
|
max_send_g => max_send_g,
|
469 |
|
|
-- n_agents_g should be num of ips + num of bridges in the segment
|
470 |
|
|
n_agents_g => n_agents_in_segment
|
471 |
|
|
(seg, n_segments_g, wrappers_per_segment_c),
|
472 |
|
|
n_cfg_pages_g => n_cfg_pages_g,
|
473 |
|
|
n_time_slots_g => n_time_slots_g,
|
474 |
|
|
keep_slot_g => keep_slot_g,
|
475 |
|
|
n_extra_params_g => n_extra_params_g,
|
476 |
|
|
|
477 |
|
|
cfg_re_g => cfg_re_g,
|
478 |
|
|
cfg_we_g => cfg_we_g,
|
479 |
|
|
debug_width_g => debug_width_g
|
480 |
|
|
)
|
481 |
|
|
port map (
|
482 |
|
|
bus_clk => clk_in,
|
483 |
|
|
agent_clk => clk_in,
|
484 |
|
|
bus_sync_clk => clk_in,
|
485 |
|
|
agent_sync_clk => clk_in,
|
486 |
|
|
rst_n => rst_n,
|
487 |
|
|
bus_comm_in => bus_wra_comm(seg),
|
488 |
|
|
bus_data_in => bus_wra_data(seg),
|
489 |
|
|
bus_full_in => bus_wra_full(seg),
|
490 |
|
|
bus_lock_in => bus_wra_lock(seg),
|
491 |
|
|
bus_av_in => bus_wra_av(seg),
|
492 |
|
|
agent_comm_in => r3_agent_comm_in((seg*wrappers_per_segment_c+wra+1)*
|
493 |
|
|
comm_width_g-1 downto
|
494 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
495 |
|
|
comm_width_g),
|
496 |
|
|
agent_data_in => r3_agent_data_in((seg*wrappers_per_segment_c+wra+1)*
|
497 |
|
|
data_width_g-1 downto
|
498 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
499 |
|
|
data_width_g),
|
500 |
|
|
agent_addr_in => r3_agent_addr_in((seg*wrappers_per_segment_c+wra+1)*
|
501 |
|
|
addr_width_g-1 downto
|
502 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
503 |
|
|
addr_width_g),
|
504 |
|
|
agent_we_in => r3_agent_we_in(seg*wrappers_per_segment_c+wra),
|
505 |
|
|
agent_re_in => r3_agent_re_in(seg*wrappers_per_segment_c+wra),
|
506 |
|
|
agent_msg_comm_in => r3_agent_msg_comm_in((seg*wrappers_per_segment_c+wra+1)*
|
507 |
|
|
comm_width_g-1 downto
|
508 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
509 |
|
|
comm_width_g),
|
510 |
|
|
agent_msg_data_in => r3_agent_msg_data_in((seg*wrappers_per_segment_c+wra+1)*
|
511 |
|
|
data_width_g-1 downto
|
512 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
513 |
|
|
data_width_g),
|
514 |
|
|
agent_msg_addr_in => r3_agent_msg_addr_in((seg*wrappers_per_segment_c+wra+1)*
|
515 |
|
|
addr_width_g-1 downto
|
516 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
517 |
|
|
addr_width_g),
|
518 |
|
|
agent_msg_we_in => r3_agent_msg_we_in(seg*wrappers_per_segment_c+wra),
|
519 |
|
|
agent_msg_re_in => r3_agent_msg_re_in(seg*wrappers_per_segment_c+wra),
|
520 |
|
|
bus_comm_out => wra_bus_comm(seg)(wra+r4_wrappers_per_segment_c),
|
521 |
|
|
bus_data_out => wra_bus_data(seg)(wra+r4_wrappers_per_segment_c),
|
522 |
|
|
bus_full_out => wra_bus_full(seg)(wra+r4_wrappers_per_segment_c),
|
523 |
|
|
bus_lock_out => wra_bus_lock(seg)(wra+r4_wrappers_per_segment_c),
|
524 |
|
|
bus_av_out => wra_bus_av(seg)(wra+r4_wrappers_per_segment_c),
|
525 |
|
|
agent_comm_out => r3_agent_comm_out((seg*wrappers_per_segment_c+wra+1)*
|
526 |
|
|
comm_width_g-1 downto
|
527 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
528 |
|
|
comm_width_g),
|
529 |
|
|
agent_data_out => r3_agent_data_out((seg*wrappers_per_segment_c+wra+1)*
|
530 |
|
|
data_width_g-1 downto
|
531 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
532 |
|
|
data_width_g),
|
533 |
|
|
agent_addr_out => r3_agent_addr_out((seg*wrappers_per_segment_c+wra+1)*
|
534 |
|
|
addr_width_g-1 downto
|
535 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
536 |
|
|
addr_width_g),
|
537 |
|
|
agent_full_out => r3_agent_full_out(seg*wrappers_per_segment_c+wra),
|
538 |
|
|
agent_one_p_out => r3_agent_one_p_out(seg*wrappers_per_segment_c+wra),
|
539 |
|
|
agent_empty_out => r3_agent_empty_out(seg*wrappers_per_segment_c+wra),
|
540 |
|
|
agent_one_d_out => r3_agent_one_d_out(seg*wrappers_per_segment_c+wra),
|
541 |
|
|
agent_msg_comm_out => r3_agent_msg_comm_out((seg*wrappers_per_segment_c+wra+1)*
|
542 |
|
|
comm_width_g-1 downto
|
543 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
544 |
|
|
comm_width_g),
|
545 |
|
|
agent_msg_data_out => r3_agent_msg_data_out((seg*wrappers_per_segment_c+wra+1)*
|
546 |
|
|
data_width_g-1 downto
|
547 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
548 |
|
|
data_width_g),
|
549 |
|
|
agent_msg_addr_out => r3_agent_msg_addr_out((seg*wrappers_per_segment_c+wra+1)*
|
550 |
|
|
addr_width_g-1 downto
|
551 |
|
|
(seg*wrappers_per_segment_c+wra)*
|
552 |
|
|
addr_width_g),
|
553 |
|
|
agent_msg_full_out => r3_agent_msg_full_out(seg*wrappers_per_segment_c+wra),
|
554 |
|
|
agent_msg_one_p_out => r3_agent_msg_one_p_out(seg*wrappers_per_segment_c+wra),
|
555 |
|
|
agent_msg_empty_out => r3_agent_msg_empty_out(seg*wrappers_per_segment_c+wra),
|
556 |
|
|
agent_msg_one_d_out => r3_agent_msg_one_d_out(seg*wrappers_per_segment_c+wra)
|
557 |
|
|
-- synthesis translate_off
|
558 |
|
|
,
|
559 |
|
|
debug_out => open,
|
560 |
|
|
debug_in => (others => '0')
|
561 |
|
|
-- synthesis translate_on
|
562 |
|
|
);
|
563 |
|
|
|
564 |
|
|
|
565 |
|
|
end generate r3_wrappers;
|
566 |
|
|
|
567 |
|
|
|
568 |
|
|
|
569 |
|
|
-- bridge_needed : if seg > 0 generate
|
570 |
|
|
|
571 |
|
|
-- i_bridge : entity work.hibi_bridge
|
572 |
|
|
-- generic map (
|
573 |
|
|
-- a_id_g =>
|
574 |
|
|
-- id_a(seg-1, n_segments_g, wrappers_per_segment_c),
|
575 |
|
|
-- a_addr_g => bridge_a_addr_base_c(seg-1),
|
576 |
|
|
-- a_inv_addr_en_g => bridge_a_inv_addr_c(seg-1),
|
577 |
|
|
-- a_id_width_g => id_width_g,
|
578 |
|
|
-- a_addr_width_g => addr_width_g,
|
579 |
|
|
-- a_data_width_g => data_width_g,
|
580 |
|
|
-- a_separate_addr_g => separate_addr_g,
|
581 |
|
|
-- a_comm_width_g => comm_width_g,
|
582 |
|
|
-- a_counter_width_g => counter_width_g,
|
583 |
|
|
-- a_rx_fifo_depth_g => rx_fifo_depth_g,
|
584 |
|
|
-- a_tx_fifo_depth_g => tx_fifo_depth_g,
|
585 |
|
|
-- a_rx_msg_fifo_depth_g => rx_msg_fifo_depth_g,
|
586 |
|
|
-- a_tx_msg_fifo_depth_g => tx_msg_fifo_depth_g,
|
587 |
|
|
-- a_arb_type_g => arb_type_g,
|
588 |
|
|
-- a_fifo_sel_g => fifo_sel_g,
|
589 |
|
|
|
590 |
|
|
-- a_debug_width_g => debug_width_g,
|
591 |
|
|
-- a_prior_g =>
|
592 |
|
|
-- priority_a(seg-1, n_segments_g, wrappers_per_segment_c),
|
593 |
|
|
-- a_max_send_g => max_send_g,
|
594 |
|
|
-- a_n_agents_g =>
|
595 |
|
|
-- n_agents_in_segment(seg-1, n_segments_g, wrappers_per_segment_c),
|
596 |
|
|
-- a_n_cfg_pages_g => n_cfg_pages_g,
|
597 |
|
|
-- a_n_time_slots_g => n_time_slots_g,
|
598 |
|
|
-- a_n_extra_params_g => n_extra_params_g,
|
599 |
|
|
-- a_cfg_re_g => cfg_re_g,
|
600 |
|
|
-- a_cfg_we_g => cfg_we_g,
|
601 |
|
|
|
602 |
|
|
-- b_id_g =>
|
603 |
|
|
-- id_b(seg, n_segments_g, wrappers_per_segment_c),
|
604 |
|
|
-- b_addr_g => bridge_b_addr_base_c(seg-1),
|
605 |
|
|
-- b_inv_addr_en_g => bridge_b_inv_addr_c(seg-1),
|
606 |
|
|
-- b_id_width_g => id_width_g,
|
607 |
|
|
-- b_addr_width_g => addr_width_g,
|
608 |
|
|
-- b_data_width_g => data_width_g,
|
609 |
|
|
-- b_separate_addr_g => separate_addr_g,
|
610 |
|
|
-- b_comm_width_g => comm_width_g,
|
611 |
|
|
-- b_counter_width_g => counter_width_g,
|
612 |
|
|
-- b_rx_fifo_depth_g => rx_fifo_depth_g,
|
613 |
|
|
-- b_tx_fifo_depth_g => tx_fifo_depth_g,
|
614 |
|
|
-- b_rx_msg_fifo_depth_g => rx_msg_fifo_depth_g,
|
615 |
|
|
-- b_tx_msg_fifo_depth_g => tx_msg_fifo_depth_g,
|
616 |
|
|
-- b_arb_type_g => arb_type_g,
|
617 |
|
|
-- b_fifo_sel_g => fifo_sel_g,
|
618 |
|
|
|
619 |
|
|
-- b_debug_width_g => debug_width_g,
|
620 |
|
|
-- b_prior_g =>
|
621 |
|
|
-- priority_b(seg, n_segments_g, wrappers_per_segment_c),
|
622 |
|
|
-- b_max_send_g => max_send_g,
|
623 |
|
|
-- b_n_agents_g =>
|
624 |
|
|
-- n_agents_in_segment(seg, n_segments_g, wrappers_per_segment_c),
|
625 |
|
|
-- b_n_cfg_pages_g => n_cfg_pages_g,
|
626 |
|
|
-- b_n_time_slots_g => n_time_slots_g,
|
627 |
|
|
-- b_n_extra_params_g => n_extra_params_g,
|
628 |
|
|
-- b_cfg_re_g => cfg_re_g,
|
629 |
|
|
-- b_cfg_we_g => cfg_we_g,
|
630 |
|
|
|
631 |
|
|
-- a_id_min_g => bridge_a_id_min_c(seg-1),
|
632 |
|
|
-- a_id_max_g => bridge_a_id_max_c(seg-1),
|
633 |
|
|
-- a_addr_limit_g => bridge_a_addr_limit_c(seg-1),
|
634 |
|
|
|
635 |
|
|
-- b_id_min_g => bridge_b_id_min_c(seg-1),
|
636 |
|
|
-- b_id_max_g => bridge_b_id_max_c(seg-1),
|
637 |
|
|
-- b_addr_limit_g => bridge_b_addr_limit_c(seg-1)
|
638 |
|
|
|
639 |
|
|
-- )
|
640 |
|
|
-- port map (
|
641 |
|
|
-- a_clk => clk_noc,
|
642 |
|
|
-- a_rst_n => rst_n,
|
643 |
|
|
-- b_clk => clk_noc,
|
644 |
|
|
-- b_rst_n => rst_n,
|
645 |
|
|
-- a_bus_av_in => bus_wra_av(seg-1),
|
646 |
|
|
-- a_bus_data_in => bus_wra_data(seg-1),
|
647 |
|
|
-- a_bus_comm_in => bus_wra_comm(seg-1),
|
648 |
|
|
-- a_bus_full_in => bus_wra_full(seg-1),
|
649 |
|
|
-- a_bus_lock_in => bus_wra_lock(seg-1),
|
650 |
|
|
-- b_bus_av_in => bus_wra_av(seg),
|
651 |
|
|
-- b_bus_data_in => bus_wra_data(seg),
|
652 |
|
|
-- b_bus_comm_in => bus_wra_comm(seg),
|
653 |
|
|
-- b_bus_full_in => bus_wra_full(seg),
|
654 |
|
|
-- b_bus_lock_in => bus_wra_lock(seg),
|
655 |
|
|
-- a_bus_av_out => wra_bus_av(seg-1)(wrappers_per_segment_c),
|
656 |
|
|
-- a_bus_data_out => wra_bus_data(seg-1)(wrappers_per_segment_c),
|
657 |
|
|
-- a_bus_comm_out => wra_bus_comm(seg-1)(wrappers_per_segment_c),
|
658 |
|
|
-- a_bus_lock_out => wra_bus_lock(seg-1)(wrappers_per_segment_c),
|
659 |
|
|
-- a_bus_full_out => wra_bus_full(seg-1)(wrappers_per_segment_c),
|
660 |
|
|
-- b_bus_av_out => wra_bus_av(seg)(wrappers_per_segment_c+1),
|
661 |
|
|
-- b_bus_data_out => wra_bus_data(seg)(wrappers_per_segment_c+1),
|
662 |
|
|
-- b_bus_comm_out => wra_bus_comm(seg)(wrappers_per_segment_c+1),
|
663 |
|
|
-- b_bus_lock_out => wra_bus_lock(seg)(wrappers_per_segment_c+1),
|
664 |
|
|
-- b_bus_full_out => wra_bus_full(seg)(wrappers_per_segment_c+1)
|
665 |
|
|
-- -- synthesis translate_off
|
666 |
|
|
-- ,
|
667 |
|
|
-- a_debug_out => open,
|
668 |
|
|
-- a_debug_in => (others => '0'),
|
669 |
|
|
-- b_debug_out => open,
|
670 |
|
|
-- b_debug_in => (others => '0')
|
671 |
|
|
-- -- synthesis translate_on
|
672 |
|
|
-- );
|
673 |
|
|
|
674 |
|
|
-- -- nullify extra signals
|
675 |
|
|
-- nullify_first_seg : if seg = 1 generate
|
676 |
|
|
-- -- no b-side on the first segment
|
677 |
|
|
-- wra_bus_av(seg-1)(wrappers_per_segment_c+1) <= '0';
|
678 |
|
|
-- wra_bus_full(seg-1)(wrappers_per_segment_c+1) <= '0';
|
679 |
|
|
-- wra_bus_lock(seg-1)(wrappers_per_segment_c+1) <= '0';
|
680 |
|
|
-- wra_bus_comm(seg-1)(wrappers_per_segment_c+1) <= (others => '0');
|
681 |
|
|
-- wra_bus_data(seg-1)(wrappers_per_segment_c+1) <= (others => '0');
|
682 |
|
|
-- end generate nullify_first_seg;
|
683 |
|
|
|
684 |
|
|
-- nullify_last_seg : if seg = n_segments_g-1 generate
|
685 |
|
|
-- -- no a-side here
|
686 |
|
|
-- wra_bus_av(seg)(wrappers_per_segment_c) <= '0';
|
687 |
|
|
-- wra_bus_full(seg)(wrappers_per_segment_c) <= '0';
|
688 |
|
|
-- wra_bus_lock(seg)(wrappers_per_segment_c) <= '0';
|
689 |
|
|
-- wra_bus_comm(seg)(wrappers_per_segment_c) <= (others => '0');
|
690 |
|
|
-- wra_bus_data(seg)(wrappers_per_segment_c) <= (others => '0');
|
691 |
|
|
-- end generate nullify_last_seg;
|
692 |
|
|
|
693 |
|
|
-- end generate bridge_needed;
|
694 |
|
|
|
695 |
|
|
|
696 |
|
|
no_bridges : if n_segments_g = 1 generate
|
697 |
|
|
|
698 |
|
|
-- no bridges, nullify extra all signals
|
699 |
|
|
wra_bus_av(seg)(wrappers_per_segment_c) <= '0';
|
700 |
|
|
wra_bus_full(seg)(wrappers_per_segment_c) <= '0';
|
701 |
|
|
wra_bus_lock(seg)(wrappers_per_segment_c) <= '0';
|
702 |
|
|
wra_bus_comm(seg)(wrappers_per_segment_c) <= (others => '0');
|
703 |
|
|
wra_bus_data(seg)(wrappers_per_segment_c) <= (others => '0');
|
704 |
|
|
wra_bus_av(seg)(wrappers_per_segment_c+1) <= '0';
|
705 |
|
|
wra_bus_full(seg)(wrappers_per_segment_c+1) <= '0';
|
706 |
|
|
wra_bus_lock(seg)(wrappers_per_segment_c+1) <= '0';
|
707 |
|
|
wra_bus_comm(seg)(wrappers_per_segment_c+1) <= (others => '0');
|
708 |
|
|
wra_bus_data(seg)(wrappers_per_segment_c+1) <= (others => '0');
|
709 |
|
|
|
710 |
|
|
end generate no_bridges;
|
711 |
|
|
|
712 |
|
|
|
713 |
|
|
end generate segments;
|
714 |
|
|
|
715 |
|
|
|
716 |
|
|
-- making the bus
|
717 |
|
|
form_bus : process (wra_bus_data, wra_bus_comm, wra_bus_av,
|
718 |
|
|
wra_bus_full, wra_bus_lock)
|
719 |
|
|
variable tmp_data_v : bus_data_segments_array;
|
720 |
|
|
variable tmp_comm_v : bus_comm_segments_array;
|
721 |
|
|
variable tmp_av_v : std_logic_vector(n_segments_g-1 downto 0);
|
722 |
|
|
variable tmp_full_v : std_logic_vector(n_segments_g-1 downto 0);
|
723 |
|
|
variable tmp_lock_v : std_logic_vector(n_segments_g-1 downto 0);
|
724 |
|
|
begin -- process form_bus
|
725 |
|
|
|
726 |
|
|
for seg in 0 to n_segments_g-1 loop
|
727 |
|
|
|
728 |
|
|
tmp_data_v(seg) := wra_bus_data(seg)(0);
|
729 |
|
|
tmp_comm_v(seg) := wra_bus_comm(seg)(0);
|
730 |
|
|
tmp_av_v(seg) := wra_bus_av(seg)(0);
|
731 |
|
|
tmp_full_v(seg) := wra_bus_full(seg)(0);
|
732 |
|
|
tmp_lock_v(seg) := wra_bus_lock(seg)(0);
|
733 |
|
|
|
734 |
|
|
for n in 1 to wrappers_per_segment_c+1 loop
|
735 |
|
|
|
736 |
|
|
tmp_data_v(seg) := wra_bus_data(seg)(n) or tmp_data_v(seg);
|
737 |
|
|
tmp_comm_v(seg) := wra_bus_comm(seg)(n) or tmp_comm_v(seg);
|
738 |
|
|
tmp_av_v(seg) := wra_bus_av(seg)(n) or tmp_av_v(seg);
|
739 |
|
|
tmp_full_v(seg) := wra_bus_full(seg)(n) or tmp_full_v(seg);
|
740 |
|
|
tmp_lock_v(seg) := wra_bus_lock(seg)(n) or tmp_lock_v(seg);
|
741 |
|
|
|
742 |
|
|
end loop; -- n
|
743 |
|
|
|
744 |
|
|
bus_wra_data(seg) <= tmp_data_v(seg);
|
745 |
|
|
bus_wra_comm(seg) <= tmp_comm_v(seg);
|
746 |
|
|
bus_wra_av(seg) <= tmp_av_v(seg);
|
747 |
|
|
bus_wra_full(seg) <= tmp_full_v(seg);
|
748 |
|
|
bus_wra_lock(seg) <= tmp_lock_v(seg);
|
749 |
|
|
|
750 |
|
|
end loop; -- seg
|
751 |
|
|
|
752 |
|
|
end process form_bus;
|
753 |
|
|
|
754 |
|
|
end structural;
|