OpenCores
URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.communication/] [n2h2/] [1.0/] [tb/] [blocks/] [wave_tb_n2h2_tx.do] - Blame information for rev 145

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 145 lanttu
onerror {resume}
2
quietly WaveActivateNextPane {} 0
3
add wave -noupdate -divider {TB top}
4
add wave -noupdate -format Logic /tb_n2h2_tx/clk
5
add wave -noupdate -format Logic /tb_n2h2_tx/clk2
6
add wave -noupdate -format Logic /tb_n2h2_tx/rst_n
7
add wave -noupdate -format Literal /tb_n2h2_tx/main_ctrl_r
8
add wave -noupdate -format Literal /tb_n2h2_tx/amount_r
9
add wave -noupdate -format Literal /tb_n2h2_tx/mem_addr_r
10
add wave -noupdate -format Literal /tb_n2h2_tx/avalon_addr_from_tx
11
add wave -noupdate -format Logic /tb_n2h2_tx/avalon_re_from_tx
12
add wave -noupdate -format Literal /tb_n2h2_tx/avalon_readdata_to_tx
13
add wave -noupdate -format Logic /tb_n2h2_tx/avalon_waitrequest_to_tx
14
add wave -noupdate -format Logic /tb_n2h2_tx/avalon_waitrequest_to_tx2
15
add wave -noupdate -format Logic /tb_n2h2_tx/avalon_readdatavalid_to_tx
16
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_data_from_tx
17
add wave -noupdate -format Logic /tb_n2h2_tx/hibi_av_from_tx
18
add wave -noupdate -format Logic /tb_n2h2_tx/hibi_full_to_tx
19
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_comm_from_tx
20
add wave -noupdate -format Logic /tb_n2h2_tx/hibi_we_from_tx
21
add wave -noupdate -format Logic /tb_n2h2_tx/tx_start_to_tx
22
add wave -noupdate -format Logic /tb_n2h2_tx/tx_status_done_from_tx
23
add wave -noupdate -format Literal /tb_n2h2_tx/tx_comm_to_tx
24
add wave -noupdate -format Literal /tb_n2h2_tx/tx_hibi_addr_to_tx
25
add wave -noupdate -format Literal /tb_n2h2_tx/tx_ram_addr_to_tx
26
add wave -noupdate -format Literal /tb_n2h2_tx/tx_amount_to_tx
27
add wave -noupdate -format Logic /tb_n2h2_tx/cs1_n_to_ram
28
add wave -noupdate -format Logic /tb_n2h2_tx/cs2_to_ram
29
add wave -noupdate -format Literal /tb_n2h2_tx/addr_to_ram
30
add wave -noupdate -format Literal /tb_n2h2_tx/data_inout_ram
31
add wave -noupdate -format Logic /tb_n2h2_tx/we_n_to_ram
32
add wave -noupdate -format Logic /tb_n2h2_tx/oe_n_to_ram
33
add wave -noupdate -format Literal /tb_n2h2_tx/delayed_data_from_ram_r
34
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_addr_r
35
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_amount_r
36
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_data_r
37
add wave -noupdate -format Literal /tb_n2h2_tx/wait_cnt_r
38
add wave -noupdate -format Literal /tb_n2h2_tx/avalon_waitr_cnt_r
39
add wave -noupdate -format Logic /tb_n2h2_tx/hibi_we_was_up_r
40
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_full_cnt_r
41
add wave -noupdate -format Literal /tb_n2h2_tx/hibi_full_up_cc
42
add wave -noupdate -divider {DUT rx}
43
add wave -noupdate -format Logic /tb_n2h2_tx/dut/clk
44
add wave -noupdate -format Logic /tb_n2h2_tx/dut/rst_n
45
add wave -noupdate -format Literal /tb_n2h2_tx/dut/avalon_addr_out
46
add wave -noupdate -format Logic /tb_n2h2_tx/dut/avalon_re_out
47
add wave -noupdate -format Literal /tb_n2h2_tx/dut/avalon_readdata_in
48
add wave -noupdate -format Logic /tb_n2h2_tx/dut/avalon_waitrequest_in
49
add wave -noupdate -format Logic /tb_n2h2_tx/dut/avalon_readdatavalid_in
50
add wave -noupdate -format Literal /tb_n2h2_tx/dut/hibi_data_out
51
add wave -noupdate -format Logic /tb_n2h2_tx/dut/hibi_av_out
52
add wave -noupdate -format Logic /tb_n2h2_tx/dut/hibi_full_in
53
add wave -noupdate -format Literal /tb_n2h2_tx/dut/hibi_comm_out
54
add wave -noupdate -format Logic /tb_n2h2_tx/dut/hibi_we_out
55
add wave -noupdate -format Logic /tb_n2h2_tx/dut/tx_start_in
56
add wave -noupdate -format Logic /tb_n2h2_tx/dut/tx_status_done_out
57
add wave -noupdate -format Literal /tb_n2h2_tx/dut/tx_comm_in
58
add wave -noupdate -format Literal /tb_n2h2_tx/dut/tx_hibi_addr_in
59
add wave -noupdate -format Literal /tb_n2h2_tx/dut/tx_ram_addr_in
60
add wave -noupdate -format Literal /tb_n2h2_tx/dut/tx_amount_in
61
add wave -noupdate -format Literal /tb_n2h2_tx/dut/control_r
62
add wave -noupdate -format Logic /tb_n2h2_tx/dut/addr_cnt_en_r
63
add wave -noupdate -format Literal /tb_n2h2_tx/dut/addr_cnt_value_r
64
add wave -noupdate -format Logic /tb_n2h2_tx/dut/addr_cnt_load_r
65
add wave -noupdate -format Literal /tb_n2h2_tx/dut/addr_r
66
add wave -noupdate -format Logic /tb_n2h2_tx/dut/amount_cnt_en_r
67
add wave -noupdate -format Literal /tb_n2h2_tx/dut/amount_cnt_value_r
68
add wave -noupdate -format Logic /tb_n2h2_tx/dut/amount_cnt_load_r
69
add wave -noupdate -format Literal /tb_n2h2_tx/dut/amount_r
70
add wave -noupdate -format Logic /tb_n2h2_tx/dut/addr_amount_eq
71
add wave -noupdate -format Literal /tb_n2h2_tx/dut/addr_to_stop_r
72
add wave -noupdate -format Logic /tb_n2h2_tx/dut/avalon_re_r
73
add wave -noupdate -format Logic /tb_n2h2_tx/dut/start_re_r
74
add wave -noupdate -format Logic /tb_n2h2_tx/dut/hibi_write_addr_r
75
add wave -noupdate -format Logic /tb_n2h2_tx/dut/data_src_sel
76
add wave -noupdate -format Logic /tb_n2h2_tx/dut/hibi_we_r
77
add wave -noupdate -format Logic /tb_n2h2_tx/dut/hibi_stop_we_r
78
TreeUpdate [SetDefaultTree]
79
WaveRestoreCursors {{Cursor 1} {1191 ns} 0}
80
configure wave -namecolwidth 211
81
configure wave -valuecolwidth 100
82
configure wave -justifyvalue left
83
configure wave -signalnamewidth 1
84
configure wave -snapdistance 10
85
configure wave -datasetprefix 0
86
configure wave -rowmargin 4
87
configure wave -childrowmargin 2
88
configure wave -gridoffset 0
89
configure wave -gridperiod 1
90
configure wave -griddelta 40
91
configure wave -timeline 0
92
configure wave -timelineunits ms
93
update
94
WaveRestoreZoom {0 ns} {2052 ns}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.