Subversion Repositories funbase_ip_library

#

# Skripti kaantaa kaikki vhdl-tiedostot ja tekee niista makefilen

# Ymparistomuuttjat

#       MEM_DATA_DIR    kertoo mihin hakemistoon kaannetyt fiilut laitetaan.

#       MEM_WORK_DIR    kertoo minkä hakemiston alta lähdekoodit haetaan

#

clear

# Omia VHDL-koodeja varten

#Poistetaan vanha codelib ja tehdaan ja mapataan uusi

echo "\nRemoving old vhdl library \n"

rm -rf $MEM_DATA_DIR/codelib

echo; echo "\nCreating a new library at"

echo $MEM_DATA_DIR; echo

mkdir $MEM_DATA_DIR

vlib $MEM_DATA_DIR/codelib

vmap work $MEM_DATA_DIR/codelib

# Alteran solukirjastojen simulointimallit

#vlib $MEM_DATA_DIR/altera_mf

#vlib $MEM_DATA_DIR/lpm

#vlib $MEM_DATA_DIR/stratix

vlib $MEM_DATA_DIR/altera_vhdl_support

vmap altera_vhdl_support $MEM_DATA_DIR/altera_vhdl_support

vcom -work altera_vhdl_support ../Vhdl/altera_vhdl_support.vhd

#vmap altera_mf $MEM_DATA_DIR/altera_mf

#vmap lpm $MEM_DATA_DIR/lpm

#vmap stratix $MEM_DATA_DIR/stratix

#vcom -work lpm ../../Interconnections/Hibi/Hibi_v2/TryOutCodes/sim_lib/220pack.vhd

#vcom -work lpm ../../Interconnections/Hibi/Hibi_v2/TryOutCodes/sim_lib/220model.vhd

#vcom -work stratix ../../Interconnections/Hibi/Hibi_v2/TryOutCodes/sim_lib/stratix_atoms.vhd

#vcom -work stratix ../../Interconnections/Hibi/Hibi_v2/TryOutCodes/sim_lib/stratix_components.vhd

#vcom -work ../../Interconnections/Hibi/Hibi_v2/TryOutCodes/sim_lib/altera_mf_components.vhd

#vcom -work ../../Interconnections/Hibi/Hibi_v2/TryOutCodes/sim_lib/altera_mf.vhd

# Hibi-koodit v2

echo; echo "\nCompiling vhdl codes\n"; echo

vcom -cover bcest ../Fifos/fifo.vhdl

vcom -cover bcest ../Vhdl/sram_scalable_v2.vhdl

vcom -cover bcest ../Vhdl/sdram50Mhz_cas3.vhd

vcom -cover bcest ../Vhdl/sdram_ctrl.vhdl

# Testipenkit

echo; echo "\nCompiling vhdl testbenches\n";echo

vcom -cover bcest ../Testbench/tb_sram_scalable.vhdl

vcom -cover bcest ../Testbench/sdram_test_component.vhd

vcom../Testbench/tb_sdram_ctrl.vhdl

vcom ../Testbench/tb_sdramctrl_sdram50mhz.vhdl

vcom ../Testbench/tb_sdram_test_component.vhdl

echo;echo "\nCreating a new makefile"

rm -f $MEM_WORK_DIR/makefile

vmake $MEM_DATA_DIR/codelib > $MEM_WORK_DIR/makefile

echo " --------Create_Makefile done------------- \n"