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/*
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* Copyright (c) 2010, Mentor Graphics Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the <ORGANIZATION> nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include "mcomm.h"
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#include "mcomm_dev.h"
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/* extracted from the bowels of Marvell's arch/arm/mach-feroceon-mv78xx0 */
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/* XXX add these to appropriate Linux headers */
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#define CPU_IF_BASE(cpu) (0xF1020000 + ((cpu) << 14))
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#define AHB_TO_MBUS_BASE CPU_IF_BASE
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#define INBOUND_DOORBELL(cpu) (AHB_TO_MBUS_BASE(cpu) + 0x400)
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#define INBOUND_DOORBELL_MASK(cpu) (AHB_TO_MBUS_BASE(cpu) + 0x404)
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#define DOORBELL_NR 0
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#define DOORBELL_VAL (1<<DOORBELL_NR)
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static struct mcomm_mv78xx0_data {
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void __iomem *dbell[2]; /* "inbound" doorbells */
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void __iomem *dbell_mask;
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unsigned int cpu_nr;
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} mcomm_mv78xx0_data;
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/* MV78xx0 is a dual-core ARMv5 processor. It does not provide implicit data
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* cache coherence between the two cores, so to simplify software we map the
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* shared memory non-cacheable in both user and kernel space. */
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static pgprot_t mcomm_mv78xx0_mmap_pgprot(struct vm_area_struct *vma)
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{
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return pgprot_noncached(vma->vm_page_prot);
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}
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static void __iomem *mcomm_mv78xx0_ioremap(unsigned long phys_addr, size_t size)
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{
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return ioremap_nocache(phys_addr, size);
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}
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static void mcomm_mv78xx0_notify(u32 core_nr)
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{
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BUG_ON(core_nr > 1);
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/* set the other core's inbound doorbell */
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writel(DOORBELL_VAL, mcomm_mv78xx0_data.dbell[core_nr]);
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}
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static void mcomm_mv78xx0_ack(void)
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{
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/* clear this core's inbound doorbell */
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writel(0x0, mcomm_mv78xx0_data.dbell[mcomm_mv78xx0_data.cpu_nr]);
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}
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static unsigned long mcomm_mv78xx0_cpuid(void)
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{
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return mcomm_mv78xx0_data.cpu_nr;
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}
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static struct mcomm_platform_ops mcomm_mv78xx0_ops = {
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.mmap_pgprot = mcomm_mv78xx0_mmap_pgprot,
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.map = mcomm_mv78xx0_ioremap,
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.notify = mcomm_mv78xx0_notify,
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.ack = mcomm_mv78xx0_ack,
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.cpuid = mcomm_mv78xx0_cpuid,
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};
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static void mcomm_mv78xx0_hwinit(void)
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{
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unsigned int cpu_nr;
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u32 reg;
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__asm__ __volatile__ (
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"mrc p15, 1, %0, c15, c1, 0 @ read control reg\n"
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: "=r" (reg)
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);
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cpu_nr = (reg >> 14) & 0x1;
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mcomm_mv78xx0_data.cpu_nr = cpu_nr;
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mcomm_mv78xx0_data.dbell[0] = ioremap(INBOUND_DOORBELL(0), 4);
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mcomm_mv78xx0_data.dbell[1] = ioremap(INBOUND_DOORBELL(1), 4);
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mcomm_mv78xx0_data.dbell_mask = ioremap(INBOUND_DOORBELL_MASK(cpu_nr), 4);
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/* Clear any pending interrupts. */
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writel(0x0, mcomm_mv78xx0_data.dbell[cpu_nr]);
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/* Enable IRQs for our doorbell bits. */
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writel(DOORBELL_VAL, mcomm_mv78xx0_data.dbell_mask);
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}
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static int __devinit mcomm_probe(struct platform_device *pdev)
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{
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struct resource *mem;
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struct resource *irq;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem)
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return -EINVAL;
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irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!irq)
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return -EINVAL;
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mcomm_mv78xx0_hwinit();
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return mcomm_new_region(&pdev->dev, mem, irq);
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}
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static void mcomm_mv78xx0_hwuninit(void)
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{
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iounmap(mcomm_mv78xx0_data.dbell[0]);
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iounmap(mcomm_mv78xx0_data.dbell[1]);
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/* Disable doorbell IRQ again. */
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writel(0x0, mcomm_mv78xx0_data.dbell_mask);
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iounmap(mcomm_mv78xx0_data.dbell_mask);
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}
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static int mcomm_remove(struct platform_device *pdev)
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{
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mcomm_remove_region(&pdev->dev);
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mcomm_mv78xx0_hwuninit();
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return 0;
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}
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static struct platform_driver mcomm_driver = {
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.probe = mcomm_probe,
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.remove = mcomm_remove,
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.driver = {
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.name = "mcomm",
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}
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};
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static int __init mcomm_mv78xx0_modinit(void)
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{
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int rc;
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rc = mcomm_init(&mcomm_mv78xx0_ops, THIS_MODULE);
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if (rc) {
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printk(KERN_ERR "%s: Failed to initialize mcomm driver.\n", __func__);
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goto out1;
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}
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rc = platform_driver_register(&mcomm_driver);
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if (rc) {
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printk(KERN_ERR "%s: Failed to register platform driver.\n", __func__);
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goto out2;
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}
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/* Finally, register an mcomm device. We can only have one, so if there's
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* an error we should just give up. */
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rc = mcomm_pdev_add();
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if (rc)
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goto out3;
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return 0;
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out3:
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platform_driver_unregister(&mcomm_driver);
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out2:
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mcomm_exit();
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out1:
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return rc;
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}
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module_init(mcomm_mv78xx0_modinit);
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static void mcomm_mv78xx0_modexit(void)
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{
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mcomm_pdev_release();
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platform_driver_unregister(&mcomm_driver);
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mcomm_exit();
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}
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module_exit(mcomm_mv78xx0_modexit);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Hollis Blanchard <hollis_blanchard@mentor.com>");
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MODULE_DESCRIPTION("Marvell 78xx0 platform support for multi-core shared memory channel");
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