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mballance |
2018-10-11 Simon Davidmann
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* Ported github riscv/riscv-tests for RV32 processors to this compliance env
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* rv32ua rv32uc rv32ud rv32uf rv32ud rv32ui
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2018-09-10 Lee Moore
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* Added tests to RV32I to improve coverage, usage of Imperas Mutating Fault Simulator to
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identify untested usage cases
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* Macro renames to support GPR, (S)FPR, (D)FPR
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* Added test suite RV32IM to test 32 bit Multiply and Divide instructions
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* Added test suite RV32IMC to test 32 bit Compressed instructions
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* Added test suite RV64I to test 64 bit Integer instructions
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* Added test suite RV64IM to test 64 bit Multiply and Divide instructions
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2018-06-15 Radek Hajek
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Modifications to support Codasip simulator.
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The simulator is renamed as Codasip-simulator (was
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Codasip-IA-simulator), compliance_test.h has been moved to target
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directories and a COMPILE_TARGET has been added to Makefile to
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allow use of LLVM.
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* Makefile: Include Codasip simulator target.
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* riscv-target/codasip-IA-simulator/compliance_io.h: Renamed as
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riscv-target/Codasip-simulator/compliance_io.h.
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* riscv-target/Codasip-simulator/compliance_io.h: Renamed from
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riscv-target/codasip-IA-simulator/compliance_io.
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* riscv-target/Codasip-simulator/compliance_test.h: Created.
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* riscv-target/codasip-IA-simulator/device/rv32i/Makefile.include:
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Renamed as
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riscv-target/Codasip-simulator/device/rv32i/Makefile.include
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* riscv-target/Codasip-simulator/device/rv32i/Makefile.include:
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Renamed from
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riscv-target/codasip-IA-simulator/device/rv32i/Makefile.include.
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* riscv-test-env/compliance_test.h: Renamed as
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riscv-target/riscvOVPsim/compliance_test.h.
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* riscv-target/riscvOVPsim/compliance_test.h: Renamed from
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riscv-test-env/compliance_test.h.
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* riscv-target/riscvOVPsim/device/rv32i/Makefile.include: Updated
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for new environment.
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* riscv-target/spike/compliance_test.h: Created.
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* riscv-target/spike/device/rv32i/Makefile.include: Updated for
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new environment.
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* riscv-test-suite/rv32i/Makefile: Likewise.
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2018-06-10 Jeremy Bennett
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Put placeholders in empty directories to make sure they show in
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the GitHub hierarchy.
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* riscv-test-suite/rv32i/.gitignore: Created.
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* riscv-test-suite/rv32m/.gitignore: Created.
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2018-06-10 Jeremy Bennett
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* README.md: Make references to files in the repo into links.
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2018-06-09 Jeremy Bennett
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* .gitignore: Ignore editor backup files.
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2018-06-09 Jeremy Bennett
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* README.md: Add better link to documentation README.md.
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2018-06-08 Jeremy Bennett
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* README.md: Move AsciiDoc details into new README.md in the doc
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directory.
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2018-06-08 Jeremy Bennett
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* README.md: Fix typo in link to AsciiDoc cheat sheet
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2018-06-08 Jeremy Bennett
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* COPYING.BSD: Created.
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* COPYING.CC: Created.
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* README.md: Add git process, licensing and engineering process.
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2018-06-08 Jeremy Bennett
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* README.md: Correct details for running the compliance tests and
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directory for OVPsim.
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2018-06-08 Jeremy Bennett
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Clean restructuring to just the work of interest.
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* thought-experiments: Directory removed.
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* .gitignore: Merged with TestStructure/.gitignore
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* Makefile: Renamed from TestStructure/Makefile.
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* TestStructure/Makefile: Renamed as Makefile.
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* README.md: Merged with TestStructure/README.md.
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* TestStructure/.gitignore: Deleted and contents moved into
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.gitignore.
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* TestStructure/README.md: Deleted and contents moved into
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README.md.
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* TestStructure/doc: Directory deleted.
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* TestStructure/riscv-target: Directory moved to riscv-target.
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* riscv-target: Directory moved from TestStructure/riscv-target
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* TestStructure/riscv-test-env: Directory moved to riscv-test-env.
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* riscv-test-env: Directory moved from
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TestStructure/riscv-test-env.
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* TestStructure/riscv-test-suite: Directory moved to
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riscv-test-suite.
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* riscv-test-suite: Directory moved from
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TestStructure/riscv-test-suite.
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* thought-experiments: Directory deleted.
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2018-05-21 Jeremy Bennett
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Initial commit to populate the repository.
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* ChangeLog: Created.
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* README.md: Created.
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