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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-env/] [v/] [entry.S] - Blame information for rev 2

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1 2 mballance 
#include "riscv_test.h"
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#if __riscv_xlen == 64
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# define STORE    sd
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# define LOAD     ld
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# define REGBYTES 8
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#else
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# define STORE    sw
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# define LOAD     lw
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# define REGBYTES 4
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#endif
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#define STACK_TOP (_end + 4096)
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  .section ".text.init","ax",@progbits
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  .globl _start
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_start:
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  j handle_reset
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  /* NMI vector */
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nmi_vector:
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  j wtf
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trap_vector:
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  j wtf
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handle_reset:
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  la t0, trap_vector
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  csrw mtvec, t0
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  la sp, STACK_TOP - SIZEOF_TRAPFRAME_T
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  csrr t0, mhartid
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  slli t0, t0, 12
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  add sp, sp, t0
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  csrw mscratch, sp
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  la a0, userstart
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  j vm_boot
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  .globl  pop_tf
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pop_tf:
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  LOAD  t0,33*REGBYTES(a0)
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  csrw  sepc,t0
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  LOAD  x1,1*REGBYTES(a0)
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  LOAD  x2,2*REGBYTES(a0)
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  LOAD  x3,3*REGBYTES(a0)
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  LOAD  x4,4*REGBYTES(a0)
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  LOAD  x5,5*REGBYTES(a0)
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  LOAD  x6,6*REGBYTES(a0)
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  LOAD  x7,7*REGBYTES(a0)
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  LOAD  x8,8*REGBYTES(a0)
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  LOAD  x9,9*REGBYTES(a0)
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  LOAD  x11,11*REGBYTES(a0)
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  LOAD  x12,12*REGBYTES(a0)
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  LOAD  x13,13*REGBYTES(a0)
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  LOAD  x14,14*REGBYTES(a0)
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  LOAD  x15,15*REGBYTES(a0)
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  LOAD  x16,16*REGBYTES(a0)
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  LOAD  x17,17*REGBYTES(a0)
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  LOAD  x18,18*REGBYTES(a0)
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  LOAD  x19,19*REGBYTES(a0)
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  LOAD  x20,20*REGBYTES(a0)
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  LOAD  x21,21*REGBYTES(a0)
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  LOAD  x22,22*REGBYTES(a0)
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  LOAD  x23,23*REGBYTES(a0)
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  LOAD  x24,24*REGBYTES(a0)
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  LOAD  x25,25*REGBYTES(a0)
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  LOAD  x26,26*REGBYTES(a0)
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  LOAD  x27,27*REGBYTES(a0)
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  LOAD  x28,28*REGBYTES(a0)
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  LOAD  x29,29*REGBYTES(a0)
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  LOAD  x30,30*REGBYTES(a0)
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  LOAD  x31,31*REGBYTES(a0)
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  LOAD  a0,10*REGBYTES(a0)
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  sret
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  .global  trap_entry
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trap_entry:
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  csrrw sp, sscratch, sp
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  # save gprs
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  STORE  x1,1*REGBYTES(sp)
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  STORE  x3,3*REGBYTES(sp)
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  STORE  x4,4*REGBYTES(sp)
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  STORE  x5,5*REGBYTES(sp)
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  STORE  x6,6*REGBYTES(sp)
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  STORE  x7,7*REGBYTES(sp)
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  STORE  x8,8*REGBYTES(sp)
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  STORE  x9,9*REGBYTES(sp)
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  STORE  x10,10*REGBYTES(sp)
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  STORE  x11,11*REGBYTES(sp)
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  STORE  x12,12*REGBYTES(sp)
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  STORE  x13,13*REGBYTES(sp)
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  STORE  x14,14*REGBYTES(sp)
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  STORE  x15,15*REGBYTES(sp)
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  STORE  x16,16*REGBYTES(sp)
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  STORE  x17,17*REGBYTES(sp)
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  STORE  x18,18*REGBYTES(sp)
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  STORE  x19,19*REGBYTES(sp)
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  STORE  x20,20*REGBYTES(sp)
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  STORE  x21,21*REGBYTES(sp)
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  STORE  x22,22*REGBYTES(sp)
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  STORE  x23,23*REGBYTES(sp)
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  STORE  x24,24*REGBYTES(sp)
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  STORE  x25,25*REGBYTES(sp)
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  STORE  x26,26*REGBYTES(sp)
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  STORE  x27,27*REGBYTES(sp)
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  STORE  x28,28*REGBYTES(sp)
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  STORE  x29,29*REGBYTES(sp)
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  STORE  x30,30*REGBYTES(sp)
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  STORE  x31,31*REGBYTES(sp)
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  csrrw  t0,sscratch,sp
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  STORE  t0,2*REGBYTES(sp)
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  # get sr, epc, badvaddr, cause
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  csrr   t0,sstatus
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  STORE  t0,32*REGBYTES(sp)
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  csrr   t0,sepc
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  STORE  t0,33*REGBYTES(sp)
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  csrr   t0,sbadaddr
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  STORE  t0,34*REGBYTES(sp)
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  csrr   t0,scause
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  STORE  t0,35*REGBYTES(sp)
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  move  a0, sp
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  j handle_trap

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