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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-BEQ-01.S] - Blame information for rev 2

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# RISC-V Compliance Test I-BEQ-01
#
# Copyright (c) 2017, Codasip Ltd.
# Copyright (c) 2018, Imperas Software Ltd. Additions
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#      * Redistributions of source code must retain the above copyright
#        notice, this list of conditions and the following disclaimer.
#      * Redistributions in binary form must reproduce the above copyright
#        notice, this list of conditions and the following disclaimer in the
#        documentation and/or other materials provided with the distribution.
#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
#        names of its contributors may be used to endorse or promote products
#        derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Specification: RV32I Base Integer Instruction Set, Version 2.0
# Description: Testing instruction BEQ.
 
#include "compliance_test.h"
#include "compliance_io.h"
#include "test_macros.h"
 
# Test Virtual Machine (TVM) used by program.
RV_COMPLIANCE_RV32M
 
# Test code region
RV_COMPLIANCE_CODE_BEGIN
 
    RVTEST_IO_INIT
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A1 - general test of value 0 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A1_data
    la      x2, test_A1_res
 
    # Load testdata
    lw      x3, 0(x1)
 
    # Register initialization
    li      x4, 0
    li      x5, 1
    li      x6, -1
    li      x7, 0x7FFFFFFF
    li      x8, 0x80000000
    li      x31, 0
 
    # Test
    beq     x3, x4, 1f
    ori     x31, x31, 0x1
1:
    beq     x3, x5, 1f
    ori     x31, x31, 0x2
1:
    beq     x3, x6, 1f
    ori     x31, x31, 0x4
1:
    beq     x3, x7, 1f
    ori     x31, x31, 0x8
1:
    beq     x3, x8, 1f
    ori     x31, x31, 0x10
1:
 
    # Store results
    sw      x3, 0(x2)
    sw      x4, 4(x2)
    sw      x5, 8(x2)
    sw      x6, 12(x2)
    sw      x7, 16(x2)
    sw      x8, 20(x2)
    sw      x31, 24(x2)
 
    //
    // Assert
    //
    RVTEST_IO_CHECK()
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000001E)
 
    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A2 - general test of value 1 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A2_data
    la      x2, test_A2_res
 
    # Load testdata
    lw      x6, 0(x1)
 
    # Register initialization
    li      x7, 0
    li      x8, 1
    li      x9, -1
    li      x10, 0x7FFFFFFF
    li      x11, 0x80000000
    li      x31, 0
 
    # Test
    beq     x6, x7, 1f
    ori     x31, x31, 0x1
1:
    beq     x6, x8, 1f
    ori     x31, x31, 0x2
1:
    beq     x6, x9, 1f
    ori     x31, x31, 0x4
1:
    beq     x6, x10, 1f
    ori     x31, x31, 0x8
1:
    beq     x6, x11, 1f
    ori     x31, x31, 0x10
1:
 
    # Store results
    sw      x6, 0(x2)
    sw      x7, 4(x2)
    sw      x8, 8(x2)
    sw      x9, 12(x2)
    sw      x10, 16(x2)
    sw      x11, 20(x2)
    sw      x31, 24(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x9, 0xFFFFFFFF)
    #RVTEST_IO_ASSERT_GPR_EQ(x10, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x11, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000001D)
 
    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A3 - general test of value -1 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A3_data
    la      x2, test_A3_res
 
    # Load testdata
    lw      x12, 0(x1)
 
    # Register initialization
    li      x13, 0
    li      x14, 1
    li      x15, -1
    li      x16, 0x7FFFFFFF
    li      x17, 0x80000000
    li      x31, 0
 
    # Test
    beq     x12, x13, 1f
    ori     x31, x31, 0x1
1:
    beq     x12, x14, 1f
    ori     x31, x31, 0x2
1:
    beq     x12, x15, 1f
    ori     x31, x31, 0x4
1:
    beq     x12, x16, 1f
    ori     x31, x31, 0x8
1:
    beq     x12, x17, 1f
    ori     x31, x31, 0x10
1:
 
    # Store results
    sw      x12, 0(x2)
    sw      x13, 4(x2)
    sw      x14, 8(x2)
    sw      x15, 12(x2)
    sw      x16, 16(x2)
    sw      x17, 20(x2)
    sw      x31, 24(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x12, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x14, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x15, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x16, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x17, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000001B)
 
    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A4 - general test of value 0x7FFFFFFF with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A4_data
    la      x2, test_A4_res
 
    # Load testdata
    lw      x18, 0(x1)
 
    # Register initialization
    li      x19, 0
    li      x20, 1
    li      x21, -1
    li      x22, 0x7FFFFFFF
    li      x23, 0x80000000
    li      x31, 0
 
    # Test
    beq     x18, x19, 1f
    ori     x31, x31, 0x1
1:
    beq     x18, x20, 1f
    ori     x31, x31, 0x2
1:
    beq     x18, x21, 1f
    ori     x31, x31, 0x4
1:
    beq     x18, x22, 1f
    ori     x31, x31, 0x8
1:
    beq     x18, x23, 1f
    ori     x31, x31, 0x10
1:
 
    # Store results
    sw      x18, 0(x2)
    sw      x19, 4(x2)
    sw      x20, 8(x2)
    sw      x21, 12(x2)
    sw      x22, 16(x2)
    sw      x23, 20(x2)
    sw      x31, 24(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x18, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x19, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x20, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x21, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x22, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x23, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x00000017)
 
    RVTEST_IO_WRITE_STR("# Test part A4  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A5 - general test of value 0x80000000 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A5_data
    la      x2, test_A5_res
 
    # Load testdata
    lw      x24, 0(x1)
 
    # Register initialization
    li      x25, 0
    li      x26, 1
    li      x27, -1
    li      x28, 0x7FFFFFFF
    li      x29, 0x80000000
    li      x31, 0
 
    # Test
    beq     x24, x25, 1f
    ori     x31, x31, 0x1
1:
    beq     x24, x26, 1f
    ori     x31, x31, 0x2
1:
    beq     x24, x27, 1f
    ori     x31, x31, 0x4
1:
    beq     x24, x28, 1f
    ori     x31, x31, 0x8
1:
    beq     x24, x29, 1f
    ori     x31, x31, 0x10
1:
 
    # Store results
    sw      x24, 0(x2)
    sw      x25, 4(x2)
    sw      x26, 8(x2)
    sw      x27, 12(x2)
    sw      x28, 16(x2)
    sw      x29, 20(x2)
    sw      x31, 24(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x24, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x25, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x26, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x27, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x28, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x29, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000000F)
 
    RVTEST_IO_WRITE_STR("# Test part A5  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B - testing compare with x0\n");
 
    # Address for test results
    la      x27, test_B_res
 
    # Register initialization
    li      x1, 0
    li      x2, 1
    li      x3, -1
    li      x4, 0x7FFFFFFF
    li      x5, 0x80000000
    li      x31, 0
 
    # Test
    beq     x1, x0, 1f
    ori     x31, x31, 0x1
1:
    beq     x2, x0, 1f
    ori     x31, x31, 0x2
1:
    beq     x3, x0, 1f
    ori     x31, x31, 0x4
1:
    beq     x4, x0, 1f
    ori     x31, x31, 0x8
1:
    beq     x5, x0, 1f
    ori     x31, x31, 0x10
1:
    beq     x0, x1, 1f
    ori     x31, x31, 0x20
1:
    beq     x0, x2, 1f
    ori     x31, x31, 0x40
1:
    beq     x0, x3, 1f
    ori     x31, x31, 0x80
1:
    beq     x0, x4, 1f
    ori     x31, x31, 0x100
1:
    beq     x0, x5, 1f
    ori     x31, x31, 0x200
1:
 
    # Store results
    sw      x31, 0(x27)
 
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x000003DE)
 
    RVTEST_IO_WRITE_STR("# Test part B  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part C - jumps forward, backward\n");
 
    # Address for test data and results
    la      x21, test_C_data
    la      x22, test_C_res
 
    # Load testdata
    lw      x31, 0(x21)
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0x0FEDCBA9
 
    # Test
    beq     x31, x0, 2f
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
1:
    li      x3, 0x87654321
    beq     x31, x0, 3f
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
2:
    li      x2, 0x9ABCDEF0
    beq     x31, x0, 1b
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
3:
 
    # Store results
    sw      x0, 0(x22)
    sw      x2, 4(x22)
    sw      x3, 8(x22)
    sw      x4, 12(x22)
 
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x9ABCDEF0)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x87654321)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x0FEDCBA9)
 
    RVTEST_IO_WRITE_STR("# Test part C  - Complete\n");
 
    RVTEST_IO_WRITE_STR("# Test End\n")
 
 # ---------------------------------------------------------------------------------------------
    # HALT
    RV_COMPLIANCE_HALT
 
RV_COMPLIANCE_CODE_END
 
# Input data section.
    .data
    .align 4
test_A1_data:
    .word 0
test_A2_data:
    .word 1
test_A3_data:
    .word -1
test_A4_data:
    .word 0x7FFFFFFF
test_A5_data:
    .word 0x80000000
test_C_data:
    .word 0
 
# Output data section.
RV_COMPLIANCE_DATA_BEGIN
    .align 4
 
test_A1_res:
    .fill 7, 4, -1
test_A2_res:
    .fill 7, 4, -1
test_A3_res:
    .fill 7, 4, -1
test_A4_res:
    .fill 7, 4, -1
test_A5_res:
    .fill 7, 4, -1
test_B_res:
    .fill 1, 4, -1
test_C_res:
    .fill 4, 4, -1
 
RV_COMPLIANCE_DATA_END

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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-BEQ-01.S] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	mballance	`# RISC-V Compliance Test I-BEQ-01`
2			`#`
3			`# Copyright (c) 2017, Codasip Ltd.`
4			`# Copyright (c) 2018, Imperas Software Ltd. Additions`
5			`# All rights reserved.`
6			`#`
7			`# Redistribution and use in source and binary forms, with or without`
8			`# modification, are permitted provided that the following conditions are met:`
9			`# * Redistributions of source code must retain the above copyright`
10			`# notice, this list of conditions and the following disclaimer.`
11			`# * Redistributions in binary form must reproduce the above copyright`
12			`# notice, this list of conditions and the following disclaimer in the`
13			`# documentation and/or other materials provided with the distribution.`
14			`# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the`
15			`# names of its contributors may be used to endorse or promote products`
16			`# derived from this software without specific prior written permission.`
17			`#`
18			`# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS`
19			`# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,`
20			`# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR`
21			`# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.`
22			`# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
23			`# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;`
24			`# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND`
25			`# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT`
26			`# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF`
27			`# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`
28			`#`
29			`# Specification: RV32I Base Integer Instruction Set, Version 2.0`
30			`# Description: Testing instruction BEQ.`
31
32			`#include "compliance_test.h"`
33			`#include "compliance_io.h"`
34			`#include "test_macros.h"`
35
36			`# Test Virtual Machine (TVM) used by program.`
37			`RV_COMPLIANCE_RV32M`
38
39			`# Test code region`
40			`RV_COMPLIANCE_CODE_BEGIN`
41
42			`RVTEST_IO_INIT`
43			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
44			`RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")`
45
46			`# ---------------------------------------------------------------------------------------------`
47			`RVTEST_IO_WRITE_STR("# Test part A1 - general test of value 0 with 0, 1, -1, MIN, MAX register values\n");`
48
49			`# Addresses for test data and results`
50			`la x1, test_A1_data`
51			`la x2, test_A1_res`
52
53			`# Load testdata`
54			`lw x3, 0(x1)`
55
56			`# Register initialization`
57			`li x4, 0`
58			`li x5, 1`
59			`li x6, -1`
60			`li x7, 0x7FFFFFFF`
61			`li x8, 0x80000000`
62			`li x31, 0`
63
64			`# Test`
65			`beq x3, x4, 1f`
66			`ori x31, x31, 0x1`
67			`1:`
68			`beq x3, x5, 1f`
69			`ori x31, x31, 0x2`
70			`1:`
71			`beq x3, x6, 1f`
72			`ori x31, x31, 0x4`
73			`1:`
74			`beq x3, x7, 1f`
75			`ori x31, x31, 0x8`
76			`1:`
77			`beq x3, x8, 1f`
78			`ori x31, x31, 0x10`
79			`1:`
80
81			`# Store results`
82			`sw x3, 0(x2)`
83			`sw x4, 4(x2)`
84			`sw x5, 8(x2)`
85			`sw x6, 12(x2)`
86			`sw x7, 16(x2)`
87			`sw x8, 20(x2)`
88			`sw x31, 24(x2)`
89
90			`//`
91			`// Assert`
92			`//`
93			`RVTEST_IO_CHECK()`
94			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x00000000)`
95			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x00000000)`
96			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
97			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0xFFFFFFFF)`
98			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x7FFFFFFF)`
99			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x80000000)`
100			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000001E)`
101
102			`RVTEST_IO_WRITE_STR("# Test part A1 - Complete\n");`
103
104			`# ---------------------------------------------------------------------------------------------`
105			`RVTEST_IO_WRITE_STR("# Test part A2 - general test of value 1 with 0, 1, -1, MIN, MAX register values\n");`
106
107			`# Addresses for test data and results`
108			`la x1, test_A2_data`
109			`la x2, test_A2_res`
110
111			`# Load testdata`
112			`lw x6, 0(x1)`
113
114			`# Register initialization`
115			`li x7, 0`
116			`li x8, 1`
117			`li x9, -1`
118			`li x10, 0x7FFFFFFF`
119			`li x11, 0x80000000`
120			`li x31, 0`
121
122			`# Test`
123			`beq x6, x7, 1f`
124			`ori x31, x31, 0x1`
125			`1:`
126			`beq x6, x8, 1f`
127			`ori x31, x31, 0x2`
128			`1:`
129			`beq x6, x9, 1f`
130			`ori x31, x31, 0x4`
131			`1:`
132			`beq x6, x10, 1f`
133			`ori x31, x31, 0x8`
134			`1:`
135			`beq x6, x11, 1f`
136			`ori x31, x31, 0x10`
137			`1:`
138
139			`# Store results`
140			`sw x6, 0(x2)`
141			`sw x7, 4(x2)`
142			`sw x8, 8(x2)`
143			`sw x9, 12(x2)`
144			`sw x10, 16(x2)`
145			`sw x11, 20(x2)`
146			`sw x31, 24(x2)`
147
148			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000001)`
149			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)`
150			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000001)`
151			`RVTEST_IO_ASSERT_GPR_EQ(x9, 0xFFFFFFFF)`
152			`#RVTEST_IO_ASSERT_GPR_EQ(x10, 0x00000000)`
153			`RVTEST_IO_ASSERT_GPR_EQ(x11, 0x80000000)`
154			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000001D)`
155
156			`RVTEST_IO_WRITE_STR("# Test part A2 - Complete\n");`
157
158			`# ---------------------------------------------------------------------------------------------`
159			`RVTEST_IO_WRITE_STR("# Test part A3 - general test of value -1 with 0, 1, -1, MIN, MAX register values\n");`
160
161			`# Addresses for test data and results`
162			`la x1, test_A3_data`
163			`la x2, test_A3_res`
164
165			`# Load testdata`
166			`lw x12, 0(x1)`
167
168			`# Register initialization`
169			`li x13, 0`
170			`li x14, 1`
171			`li x15, -1`
172			`li x16, 0x7FFFFFFF`
173			`li x17, 0x80000000`
174			`li x31, 0`
175
176			`# Test`
177			`beq x12, x13, 1f`
178			`ori x31, x31, 0x1`
179			`1:`
180			`beq x12, x14, 1f`
181			`ori x31, x31, 0x2`
182			`1:`
183			`beq x12, x15, 1f`
184			`ori x31, x31, 0x4`
185			`1:`
186			`beq x12, x16, 1f`
187			`ori x31, x31, 0x8`
188			`1:`
189			`beq x12, x17, 1f`
190			`ori x31, x31, 0x10`
191			`1:`
192
193			`# Store results`
194			`sw x12, 0(x2)`
195			`sw x13, 4(x2)`
196			`sw x14, 8(x2)`
197			`sw x15, 12(x2)`
198			`sw x16, 16(x2)`
199			`sw x17, 20(x2)`
200			`sw x31, 24(x2)`
201
202			`RVTEST_IO_ASSERT_GPR_EQ(x12, 0xFFFFFFFF)`
203			`RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000000)`
204			`RVTEST_IO_ASSERT_GPR_EQ(x14, 0x00000001)`
205			`RVTEST_IO_ASSERT_GPR_EQ(x15, 0xFFFFFFFF)`
206			`RVTEST_IO_ASSERT_GPR_EQ(x16, 0x7FFFFFFF)`
207			`RVTEST_IO_ASSERT_GPR_EQ(x17, 0x80000000)`
208			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000001B)`
209
210			`RVTEST_IO_WRITE_STR("# Test part A3 - Complete\n");`
211
212			`# ---------------------------------------------------------------------------------------------`
213			`RVTEST_IO_WRITE_STR("# Test part A4 - general test of value 0x7FFFFFFF with 0, 1, -1, MIN, MAX register values\n");`
214
215			`# Addresses for test data and results`
216			`la x1, test_A4_data`
217			`la x2, test_A4_res`
218
219			`# Load testdata`
220			`lw x18, 0(x1)`
221
222			`# Register initialization`
223			`li x19, 0`
224			`li x20, 1`
225			`li x21, -1`
226			`li x22, 0x7FFFFFFF`
227			`li x23, 0x80000000`
228			`li x31, 0`
229
230			`# Test`
231			`beq x18, x19, 1f`
232			`ori x31, x31, 0x1`
233			`1:`
234			`beq x18, x20, 1f`
235			`ori x31, x31, 0x2`
236			`1:`
237			`beq x18, x21, 1f`
238			`ori x31, x31, 0x4`
239			`1:`
240			`beq x18, x22, 1f`
241			`ori x31, x31, 0x8`
242			`1:`
243			`beq x18, x23, 1f`
244			`ori x31, x31, 0x10`
245			`1:`
246
247			`# Store results`
248			`sw x18, 0(x2)`
249			`sw x19, 4(x2)`
250			`sw x20, 8(x2)`
251			`sw x21, 12(x2)`
252			`sw x22, 16(x2)`
253			`sw x23, 20(x2)`
254			`sw x31, 24(x2)`
255
256			`RVTEST_IO_ASSERT_GPR_EQ(x18, 0x7FFFFFFF)`
257			`RVTEST_IO_ASSERT_GPR_EQ(x19, 0x00000000)`
258			`RVTEST_IO_ASSERT_GPR_EQ(x20, 0x00000001)`
259			`RVTEST_IO_ASSERT_GPR_EQ(x21, 0xFFFFFFFF)`
260			`RVTEST_IO_ASSERT_GPR_EQ(x22, 0x7FFFFFFF)`
261			`RVTEST_IO_ASSERT_GPR_EQ(x23, 0x80000000)`
262			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0x00000017)`
263
264			`RVTEST_IO_WRITE_STR("# Test part A4 - Complete\n");`
265
266			`# ---------------------------------------------------------------------------------------------`
267			`RVTEST_IO_WRITE_STR("# Test part A5 - general test of value 0x80000000 with 0, 1, -1, MIN, MAX register values\n");`
268
269			`# Addresses for test data and results`
270			`la x1, test_A5_data`
271			`la x2, test_A5_res`
272
273			`# Load testdata`
274			`lw x24, 0(x1)`
275
276			`# Register initialization`
277			`li x25, 0`
278			`li x26, 1`
279			`li x27, -1`
280			`li x28, 0x7FFFFFFF`
281			`li x29, 0x80000000`
282			`li x31, 0`
283
284			`# Test`
285			`beq x24, x25, 1f`
286			`ori x31, x31, 0x1`
287			`1:`
288			`beq x24, x26, 1f`
289			`ori x31, x31, 0x2`
290			`1:`
291			`beq x24, x27, 1f`
292			`ori x31, x31, 0x4`
293			`1:`
294			`beq x24, x28, 1f`
295			`ori x31, x31, 0x8`
296			`1:`
297			`beq x24, x29, 1f`
298			`ori x31, x31, 0x10`
299			`1:`
300
301			`# Store results`
302			`sw x24, 0(x2)`
303			`sw x25, 4(x2)`
304			`sw x26, 8(x2)`
305			`sw x27, 12(x2)`
306			`sw x28, 16(x2)`
307			`sw x29, 20(x2)`
308			`sw x31, 24(x2)`
309
310			`RVTEST_IO_ASSERT_GPR_EQ(x24, 0x80000000)`
311			`RVTEST_IO_ASSERT_GPR_EQ(x25, 0x00000000)`
312			`RVTEST_IO_ASSERT_GPR_EQ(x26, 0x00000001)`
313			`RVTEST_IO_ASSERT_GPR_EQ(x27, 0xFFFFFFFF)`
314			`RVTEST_IO_ASSERT_GPR_EQ(x28, 0x7FFFFFFF)`
315			`RVTEST_IO_ASSERT_GPR_EQ(x29, 0x80000000)`
316			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0x0000000F)`
317
318			`RVTEST_IO_WRITE_STR("# Test part A5 - Complete\n");`
319
320			`# ---------------------------------------------------------------------------------------------`
321			`RVTEST_IO_WRITE_STR("# Test part B - testing compare with x0\n");`
322
323			`# Address for test results`
324			`la x27, test_B_res`
325
326			`# Register initialization`
327			`li x1, 0`
328			`li x2, 1`
329			`li x3, -1`
330			`li x4, 0x7FFFFFFF`
331			`li x5, 0x80000000`
332			`li x31, 0`
333
334			`# Test`
335			`beq x1, x0, 1f`
336			`ori x31, x31, 0x1`
337			`1:`
338			`beq x2, x0, 1f`
339			`ori x31, x31, 0x2`
340			`1:`
341			`beq x3, x0, 1f`
342			`ori x31, x31, 0x4`
343			`1:`
344			`beq x4, x0, 1f`
345			`ori x31, x31, 0x8`
346			`1:`
347			`beq x5, x0, 1f`
348			`ori x31, x31, 0x10`
349			`1:`
350			`beq x0, x1, 1f`
351			`ori x31, x31, 0x20`
352			`1:`
353			`beq x0, x2, 1f`
354			`ori x31, x31, 0x40`
355			`1:`
356			`beq x0, x3, 1f`
357			`ori x31, x31, 0x80`
358			`1:`
359			`beq x0, x4, 1f`
360			`ori x31, x31, 0x100`
361			`1:`
362			`beq x0, x5, 1f`
363			`ori x31, x31, 0x200`
364			`1:`
365
366			`# Store results`
367			`sw x31, 0(x27)`
368
369			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0x000003DE)`
370
371			`RVTEST_IO_WRITE_STR("# Test part B - Complete\n");`
372
373			`# ---------------------------------------------------------------------------------------------`
374			`RVTEST_IO_WRITE_STR("# Test part C - jumps forward, backward\n");`
375
376			`# Address for test data and results`
377			`la x21, test_C_data`
378			`la x22, test_C_res`
379
380			`# Load testdata`
381			`lw x31, 0(x21)`
382
383			`# Register initialization`
384			`li x2, 0xFFFFFFFF`
385			`li x3, 0xFFFFFFFF`
386			`li x4, 0x0FEDCBA9`
387
388			`# Test`
389			`beq x31, x0, 2f`
390			`li x2, 0`
391			`li x3, 0`
392			`li x4, 0`
393
394			`1:`
395			`li x3, 0x87654321`
396			`beq x31, x0, 3f`
397			`li x2, 0`
398			`li x3, 0`
399			`li x4, 0`
400
401			`2:`
402			`li x2, 0x9ABCDEF0`
403			`beq x31, x0, 1b`
404			`li x2, 0`
405			`li x3, 0`
406			`li x4, 0`
407
408			`3:`
409
410			`# Store results`
411			`sw x0, 0(x22)`
412			`sw x2, 4(x22)`
413			`sw x3, 8(x22)`
414			`sw x4, 12(x22)`
415
416			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
417			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x9ABCDEF0)`
418			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x87654321)`
419			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x0FEDCBA9)`
420
421			`RVTEST_IO_WRITE_STR("# Test part C - Complete\n");`
422
423			`RVTEST_IO_WRITE_STR("# Test End\n")`
424
425			`# ---------------------------------------------------------------------------------------------`
426			`# HALT`
427			`RV_COMPLIANCE_HALT`
428
429			`RV_COMPLIANCE_CODE_END`
430
431			`# Input data section.`
432			`.data`
433			`.align 4`
434			`test_A1_data:`
435			`.word 0`
436			`test_A2_data:`
437			`.word 1`
438			`test_A3_data:`
439			`.word -1`
440			`test_A4_data:`
441			`.word 0x7FFFFFFF`
442			`test_A5_data:`
443			`.word 0x80000000`
444			`test_C_data:`
445			`.word 0`
446
447			`# Output data section.`
448			`RV_COMPLIANCE_DATA_BEGIN`
449			`.align 4`
450
451			`test_A1_res:`
452			`.fill 7, 4, -1`
453			`test_A2_res:`
454			`.fill 7, 4, -1`
455			`test_A3_res:`
456			`.fill 7, 4, -1`
457			`test_A4_res:`
458			`.fill 7, 4, -1`
459			`test_A5_res:`
460			`.fill 7, 4, -1`
461			`test_B_res:`
462			`.fill 1, 4, -1`
463			`test_C_res:`
464			`.fill 4, 4, -1`
465
466			`RV_COMPLIANCE_DATA_END`