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# RISC-V Compliance Test I-SLT-01
#
# Copyright (c) 2017, Codasip Ltd.
# Copyright (c) 2018, Imperas Software Ltd. Additions
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#      * Redistributions of source code must retain the above copyright
#        notice, this list of conditions and the following disclaimer.
#      * Redistributions in binary form must reproduce the above copyright
#        notice, this list of conditions and the following disclaimer in the
#        documentation and/or other materials provided with the distribution.
#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
#        names of its contributors may be used to endorse or promote products
#        derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.SE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Specification: RV32I Base Integer Instruction Set, Version 2.0
# Description: Testing instruction SLT.
 
#include "compliance_test.h"
#include "compliance_io.h"
#include "test_macros.h"
 
# Test Virtual Machine (TVM) used by program.
RV_COMPLIANCE_RV32M
 
# Test code region
RV_COMPLIANCE_CODE_BEGIN
 
    RVTEST_IO_INIT
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A1 - general test of value 0 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A1_data
    la      x2, test_A1_res
 
    # Load testdata
    lw      x3, 0(x1)
 
    # Register initialization
    li      x4, 1
    li      x5, 0x7FFFFFFF
    li      x6, 0xFFFFFFFF
    li      x7, 0
    li      x8, 0x80000000
 
    # Test
    slt    x4, x3, x4
    slt    x5, x3, x5
    slt    x6, x3, x6
    slt    x7, x3, x7
    slt    x8, x3, x8
 
    # Store results
    sw      x3, 0(x2)
    sw      x4, 4(x2)
    sw      x5, 8(x2)
    sw      x6, 12(x2)
    sw      x7, 16(x2)
    sw      x8, 20(x2)
 
    //
    // Assert
    //
    RVTEST_IO_CHECK()
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A2 - general test of value 1 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A2_data
    la      x2, test_A2_res
 
    # Load testdata
    lw      x8, 0(x1)
 
    # Register initialization
    li      x9, 1
    li      x10, 0x7FFFFFFF
    li      x11, 0xFFFFFFFF
    li      x12, 0
    li      x13, 0x80000000
 
    # Test
    slt    x9, x8, x9
    slt    x10, x8, x10
    slt    x11, x8, x11
    slt    x12, x8, x12
    slt    x13, x8, x13
 
    # Store results
    sw      x8, 0(x2)
    sw      x9, 4(x2)
    sw      x10, 8(x2)
    sw      x11, 12(x2)
    sw      x12, 16(x2)
    sw      x13, 20(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x9, 0x00000000)
    #RVTEST_IO_ASSERT_GPR_EQ(x10, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x11, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x12, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A3 - general test of value -1 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A3_data
    la      x2, test_A3_res
 
    # Load testdata
    lw      x13, 0(x1)
 
    # Register initialization
    li      x14, 1
    li      x15, 0x7FFFFFFF
    li      x16, 0xFFFFFFFF
    li      x17, 0
    li      x18, 0x80000000
 
    # Test
    slt    x14, x13, x14
    slt    x15, x13, x15
    slt    x16, x13, x16
    slt    x17, x13, x17
    slt    x18, x13, x18
 
    # Store results
    sw      x13, 0(x2)
    sw      x14, 4(x2)
    sw      x15, 8(x2)
    sw      x16, 12(x2)
    sw      x17, 16(x2)
    sw      x18, 20(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x13, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x14, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x15, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x16, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x17, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x18, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A4 - general test of value 0x7FFFFFFF with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A4_data
    la      x2, test_A4_res
 
    # Load testdata
    lw      x18, 0(x1)
 
    # Register initialization
    li      x19, 1
    li      x20, 0x7FFFFFFF
    li      x21, 0xFFFFFFFF
    li      x22, 0
    li      x23, 0x80000000
 
    # Test
    slt    x19, x18, x19
    slt    x20, x18, x20
    slt    x21, x18, x21
    slt    x22, x18, x22
    slt    x23, x18, x23
 
    # Store results
    sw      x18, 0(x2)
    sw      x19, 4(x2)
    sw      x20, 8(x2)
    sw      x21, 12(x2)
    sw      x22, 16(x2)
    sw      x23, 20(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x18, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x19, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x20, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x21, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x22, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x23, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A4  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A5 - general test of value 0x80000000 with 0, 1, -1, MIN, MAX register values\n");
 
    # Addresses for test data and results
    la      x1, test_A5_data
    la      x2, test_A5_res
 
    # Load testdata
    lw      x23, 0(x1)
 
    # Register initialization
    li      x24, 1
    li      x25, 0x7FFFFFFF
    li      x26, 0xFFFFFFFF
    li      x27, 0
    li      x28, 0x80000000
 
    # Test
    slt    x24, x23, x24
    slt    x25, x23, x25
    slt    x26, x23, x26
    slt    x27, x23, x27
    slt    x28, x23, x28
 
    # Store results
    sw      x23, 0(x2)
    sw      x24, 4(x2)
    sw      x25, 8(x2)
    sw      x26, 12(x2)
    sw      x27, 16(x2)
    sw      x28, 20(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x23, 0x80000000)
    RVTEST_IO_ASSERT_GPR_EQ(x24, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x25, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x26, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x27, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x28, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A5  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B - testing writing to x0\n");
 
    # Addresses for test data and results
    la      x26, test_B_data
    la      x27, test_B_res
 
    # Load testdata
    lw      x1, 0(x26)
 
    # Register initialization
    li      x2, 1
 
    # Test
    slt     x0, x1, x2
 
    # Store results
    sw      x0, 0(x27)
    sw      x1, 4(x27)
    sw      x2, 8(x27)
 
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    #RVTEST_IO_ASSERT_GPR_EQ(x1, 0x8000173C)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x00000001)
 
    RVTEST_IO_WRITE_STR("# Test part B  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part C - testing compare x0\n");
 
    # Addresses for test data and results
    la      x31, test_C_res
 
    # Register initialization
    li      x1, 1
    li      x2, 0x7FF
    li      x3, 0xFFFFFFFF
    li      x4, 0
    li      x5, 0xFFFFF800
 
    # Test
    slt    x6, x0, x1
    slt    x7, x0, x2
    slt    x8, x0, x3
    slt    x9, x0, x4
    slt    x10, x0, x5
    slt    x11, x1, x0
    slt    x12, x2, x0
    slt    x13, x3, x0
    slt    x14, x4, x0
    slt    x15, x5, x0
 
    # Store results
    sw      x6, 0(x31)
    sw      x7, 4(x31)
    sw      x8, 8(x31)
    sw      x9, 12(x31)
    sw      x10, 16(x31)
    sw      x11, 20(x31)
    sw      x12, 24(x31)
    sw      x13, 28(x31)
    sw      x14, 32(x31)
    sw      x15, 36(x31)
 
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x9, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x10, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x11, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x12, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x14, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x15, 0x00000001)
 
    RVTEST_IO_WRITE_STR("# Test part C  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part D - testing forwarding between instructions\n");
 
    # Addresses for test data and results
    la      x31, test_D_res
 
    # Register initialization
    li      x3, 0x1
 
    # Test
    slt    x1, x0, x3
    slt    x2, x1, x3
    slt    x28, x2, x3
    slt    x29, x28, x3
    slt    x30, x29, x3
 
    # Store results
    sw      x1, 0(x31)
    sw      x2, 4(x31)
    sw      x28, 8(x31)
    sw      x29, 12(x31)
    sw      x30, 16(x31)
 
    #RVTEST_IO_ASSERT_GPR_EQ(x1, 0x80001EEC)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x28, 0x00000001)
    RVTEST_IO_ASSERT_GPR_EQ(x29, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x30, 0x00000001)
 
    RVTEST_IO_WRITE_STR("# Test part D  - Complete\n");
 
    RVTEST_IO_WRITE_STR("# Test End\n")
 
 # ---------------------------------------------------------------------------------------------
    # HALT
    RV_COMPLIANCE_HALT
 
RV_COMPLIANCE_CODE_END
 
# Input data section.
    .data
    .align 4
 
test_A1_data:
    .word 0
test_A2_data:
    .word 1
test_A3_data:
    .word -1
test_A4_data:
    .word 0x7FFFFFFF
test_A5_data:
    .word 0x80000000
test_B_data:
    .word 0xFFFFFFFF
 
# Output data section.
RV_COMPLIANCE_DATA_BEGIN
    .align 4
 
test_A1_res:
    .fill 6, 4, -1
test_A2_res:
    .fill 6, 4, -1
test_A3_res:
    .fill 6, 4, -1
test_A4_res:
    .fill 6, 4, -1
test_A5_res:
    .fill 6, 4, -1
test_B_res:
    .fill 3, 4, -1
test_C_res:
    .fill 10, 4, -1
test_D_res:
    .fill 5, 4, -1
 
 
RV_COMPLIANCE_DATA_END

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Subversion Repositories fwrisc

[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-SLT-01.S] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	mballance	`# RISC-V Compliance Test I-SLT-01`
2			`#`
3			`# Copyright (c) 2017, Codasip Ltd.`
4			`# Copyright (c) 2018, Imperas Software Ltd. Additions`
5			`# All rights reserved.`
6			`#`
7			`# Redistribution and use in source and binary forms, with or without`
8			`# modification, are permitted provided that the following conditions are met:`
9			`# * Redistributions of source code must retain the above copyright`
10			`# notice, this list of conditions and the following disclaimer.`
11			`# * Redistributions in binary form must reproduce the above copyright`
12			`# notice, this list of conditions and the following disclaimer in the`
13			`# documentation and/or other materials provided with the distribution.`
14			`# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the`
15			`# names of its contributors may be used to endorse or promote products`
16			`# derived from this software without specific prior written permission.`
17			`#`
18			`# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS`
19			`# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,`
20			`# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR`
21			`# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.`
22			`# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
23			`# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;`
24			`# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND`
25			`# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT`
26			`# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF`
27			`# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.SE OF`
28			`# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`
29			`#`
30			`# Specification: RV32I Base Integer Instruction Set, Version 2.0`
31			`# Description: Testing instruction SLT.`
32
33			`#include "compliance_test.h"`
34			`#include "compliance_io.h"`
35			`#include "test_macros.h"`
36
37			`# Test Virtual Machine (TVM) used by program.`
38			`RV_COMPLIANCE_RV32M`
39
40			`# Test code region`
41			`RV_COMPLIANCE_CODE_BEGIN`
42
43			`RVTEST_IO_INIT`
44			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
45			`RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")`
46
47			`# ---------------------------------------------------------------------------------------------`
48			`RVTEST_IO_WRITE_STR("# Test part A1 - general test of value 0 with 0, 1, -1, MIN, MAX register values\n");`
49
50			`# Addresses for test data and results`
51			`la x1, test_A1_data`
52			`la x2, test_A1_res`
53
54			`# Load testdata`
55			`lw x3, 0(x1)`
56
57			`# Register initialization`
58			`li x4, 1`
59			`li x5, 0x7FFFFFFF`
60			`li x6, 0xFFFFFFFF`
61			`li x7, 0`
62			`li x8, 0x80000000`
63
64			`# Test`
65			`slt x4, x3, x4`
66			`slt x5, x3, x5`
67			`slt x6, x3, x6`
68			`slt x7, x3, x7`
69			`slt x8, x3, x8`
70
71			`# Store results`
72			`sw x3, 0(x2)`
73			`sw x4, 4(x2)`
74			`sw x5, 8(x2)`
75			`sw x6, 12(x2)`
76			`sw x7, 16(x2)`
77			`sw x8, 20(x2)`
78
79			`//`
80			`// Assert`
81			`//`
82			`RVTEST_IO_CHECK()`
83			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x00000000)`
84			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x00000001)`
85			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
86			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000000)`
87			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)`
88			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)`
89
90			`RVTEST_IO_WRITE_STR("# Test part A1 - Complete\n");`
91
92			`# ---------------------------------------------------------------------------------------------`
93			`RVTEST_IO_WRITE_STR("# Test part A2 - general test of value 1 with 0, 1, -1, MIN, MAX register values\n");`
94
95			`# Addresses for test data and results`
96			`la x1, test_A2_data`
97			`la x2, test_A2_res`
98
99			`# Load testdata`
100			`lw x8, 0(x1)`
101
102			`# Register initialization`
103			`li x9, 1`
104			`li x10, 0x7FFFFFFF`
105			`li x11, 0xFFFFFFFF`
106			`li x12, 0`
107			`li x13, 0x80000000`
108
109			`# Test`
110			`slt x9, x8, x9`
111			`slt x10, x8, x10`
112			`slt x11, x8, x11`
113			`slt x12, x8, x12`
114			`slt x13, x8, x13`
115
116			`# Store results`
117			`sw x8, 0(x2)`
118			`sw x9, 4(x2)`
119			`sw x10, 8(x2)`
120			`sw x11, 12(x2)`
121			`sw x12, 16(x2)`
122			`sw x13, 20(x2)`
123
124			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000001)`
125			`RVTEST_IO_ASSERT_GPR_EQ(x9, 0x00000000)`
126			`#RVTEST_IO_ASSERT_GPR_EQ(x10, 0x00000000)`
127			`RVTEST_IO_ASSERT_GPR_EQ(x11, 0x00000000)`
128			`RVTEST_IO_ASSERT_GPR_EQ(x12, 0x00000000)`
129			`RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000000)`
130
131			`RVTEST_IO_WRITE_STR("# Test part A2 - Complete\n");`
132
133			`# ---------------------------------------------------------------------------------------------`
134			`RVTEST_IO_WRITE_STR("# Test part A3 - general test of value -1 with 0, 1, -1, MIN, MAX register values\n");`
135
136			`# Addresses for test data and results`
137			`la x1, test_A3_data`
138			`la x2, test_A3_res`
139
140			`# Load testdata`
141			`lw x13, 0(x1)`
142
143			`# Register initialization`
144			`li x14, 1`
145			`li x15, 0x7FFFFFFF`
146			`li x16, 0xFFFFFFFF`
147			`li x17, 0`
148			`li x18, 0x80000000`
149
150			`# Test`
151			`slt x14, x13, x14`
152			`slt x15, x13, x15`
153			`slt x16, x13, x16`
154			`slt x17, x13, x17`
155			`slt x18, x13, x18`
156
157			`# Store results`
158			`sw x13, 0(x2)`
159			`sw x14, 4(x2)`
160			`sw x15, 8(x2)`
161			`sw x16, 12(x2)`
162			`sw x17, 16(x2)`
163			`sw x18, 20(x2)`
164
165			`RVTEST_IO_ASSERT_GPR_EQ(x13, 0xFFFFFFFF)`
166			`RVTEST_IO_ASSERT_GPR_EQ(x14, 0x00000001)`
167			`RVTEST_IO_ASSERT_GPR_EQ(x15, 0x00000001)`
168			`RVTEST_IO_ASSERT_GPR_EQ(x16, 0x00000000)`
169			`RVTEST_IO_ASSERT_GPR_EQ(x17, 0x00000001)`
170			`RVTEST_IO_ASSERT_GPR_EQ(x18, 0x00000000)`
171
172			`RVTEST_IO_WRITE_STR("# Test part A3 - Complete\n");`
173
174			`# ---------------------------------------------------------------------------------------------`
175			`RVTEST_IO_WRITE_STR("# Test part A4 - general test of value 0x7FFFFFFF with 0, 1, -1, MIN, MAX register values\n");`
176
177			`# Addresses for test data and results`
178			`la x1, test_A4_data`
179			`la x2, test_A4_res`
180
181			`# Load testdata`
182			`lw x18, 0(x1)`
183
184			`# Register initialization`
185			`li x19, 1`
186			`li x20, 0x7FFFFFFF`
187			`li x21, 0xFFFFFFFF`
188			`li x22, 0`
189			`li x23, 0x80000000`
190
191			`# Test`
192			`slt x19, x18, x19`
193			`slt x20, x18, x20`
194			`slt x21, x18, x21`
195			`slt x22, x18, x22`
196			`slt x23, x18, x23`
197
198			`# Store results`
199			`sw x18, 0(x2)`
200			`sw x19, 4(x2)`
201			`sw x20, 8(x2)`
202			`sw x21, 12(x2)`
203			`sw x22, 16(x2)`
204			`sw x23, 20(x2)`
205
206			`RVTEST_IO_ASSERT_GPR_EQ(x18, 0x7FFFFFFF)`
207			`RVTEST_IO_ASSERT_GPR_EQ(x19, 0x00000000)`
208			`RVTEST_IO_ASSERT_GPR_EQ(x20, 0x00000000)`
209			`RVTEST_IO_ASSERT_GPR_EQ(x21, 0x00000000)`
210			`RVTEST_IO_ASSERT_GPR_EQ(x22, 0x00000000)`
211			`RVTEST_IO_ASSERT_GPR_EQ(x23, 0x00000000)`
212
213			`RVTEST_IO_WRITE_STR("# Test part A4 - Complete\n");`
214
215			`# ---------------------------------------------------------------------------------------------`
216			`RVTEST_IO_WRITE_STR("# Test part A5 - general test of value 0x80000000 with 0, 1, -1, MIN, MAX register values\n");`
217
218			`# Addresses for test data and results`
219			`la x1, test_A5_data`
220			`la x2, test_A5_res`
221
222			`# Load testdata`
223			`lw x23, 0(x1)`
224
225			`# Register initialization`
226			`li x24, 1`
227			`li x25, 0x7FFFFFFF`
228			`li x26, 0xFFFFFFFF`
229			`li x27, 0`
230			`li x28, 0x80000000`
231
232			`# Test`
233			`slt x24, x23, x24`
234			`slt x25, x23, x25`
235			`slt x26, x23, x26`
236			`slt x27, x23, x27`
237			`slt x28, x23, x28`
238
239			`# Store results`
240			`sw x23, 0(x2)`
241			`sw x24, 4(x2)`
242			`sw x25, 8(x2)`
243			`sw x26, 12(x2)`
244			`sw x27, 16(x2)`
245			`sw x28, 20(x2)`
246
247			`RVTEST_IO_ASSERT_GPR_EQ(x23, 0x80000000)`
248			`RVTEST_IO_ASSERT_GPR_EQ(x24, 0x00000001)`
249			`RVTEST_IO_ASSERT_GPR_EQ(x25, 0x00000001)`
250			`RVTEST_IO_ASSERT_GPR_EQ(x26, 0x00000001)`
251			`RVTEST_IO_ASSERT_GPR_EQ(x27, 0x00000001)`
252			`RVTEST_IO_ASSERT_GPR_EQ(x28, 0x00000000)`
253
254			`RVTEST_IO_WRITE_STR("# Test part A5 - Complete\n");`
255
256			`# ---------------------------------------------------------------------------------------------`
257			`RVTEST_IO_WRITE_STR("# Test part B - testing writing to x0\n");`
258
259			`# Addresses for test data and results`
260			`la x26, test_B_data`
261			`la x27, test_B_res`
262
263			`# Load testdata`
264			`lw x1, 0(x26)`
265
266			`# Register initialization`
267			`li x2, 1`
268
269			`# Test`
270			`slt x0, x1, x2`
271
272			`# Store results`
273			`sw x0, 0(x27)`
274			`sw x1, 4(x27)`
275			`sw x2, 8(x27)`
276
277			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
278			`#RVTEST_IO_ASSERT_GPR_EQ(x1, 0x8000173C)`
279			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x00000001)`
280
281			`RVTEST_IO_WRITE_STR("# Test part B - Complete\n");`
282
283			`# ---------------------------------------------------------------------------------------------`
284			`RVTEST_IO_WRITE_STR("# Test part C - testing compare x0\n");`
285
286			`# Addresses for test data and results`
287			`la x31, test_C_res`
288
289			`# Register initialization`
290			`li x1, 1`
291			`li x2, 0x7FF`
292			`li x3, 0xFFFFFFFF`
293			`li x4, 0`
294			`li x5, 0xFFFFF800`
295
296			`# Test`
297			`slt x6, x0, x1`
298			`slt x7, x0, x2`
299			`slt x8, x0, x3`
300			`slt x9, x0, x4`
301			`slt x10, x0, x5`
302			`slt x11, x1, x0`
303			`slt x12, x2, x0`
304			`slt x13, x3, x0`
305			`slt x14, x4, x0`
306			`slt x15, x5, x0`
307
308			`# Store results`
309			`sw x6, 0(x31)`
310			`sw x7, 4(x31)`
311			`sw x8, 8(x31)`
312			`sw x9, 12(x31)`
313			`sw x10, 16(x31)`
314			`sw x11, 20(x31)`
315			`sw x12, 24(x31)`
316			`sw x13, 28(x31)`
317			`sw x14, 32(x31)`
318			`sw x15, 36(x31)`
319
320			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000001)`
321			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000001)`
322			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)`
323			`RVTEST_IO_ASSERT_GPR_EQ(x9, 0x00000000)`
324			`RVTEST_IO_ASSERT_GPR_EQ(x10, 0x00000000)`
325			`RVTEST_IO_ASSERT_GPR_EQ(x11, 0x00000000)`
326			`RVTEST_IO_ASSERT_GPR_EQ(x12, 0x00000000)`
327			`RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000001)`
328			`RVTEST_IO_ASSERT_GPR_EQ(x14, 0x00000000)`
329			`RVTEST_IO_ASSERT_GPR_EQ(x15, 0x00000001)`
330
331			`RVTEST_IO_WRITE_STR("# Test part C - Complete\n");`
332
333			`# ---------------------------------------------------------------------------------------------`
334			`RVTEST_IO_WRITE_STR("# Test part D - testing forwarding between instructions\n");`
335
336			`# Addresses for test data and results`
337			`la x31, test_D_res`
338
339			`# Register initialization`
340			`li x3, 0x1`
341
342			`# Test`
343			`slt x1, x0, x3`
344			`slt x2, x1, x3`
345			`slt x28, x2, x3`
346			`slt x29, x28, x3`
347			`slt x30, x29, x3`
348
349			`# Store results`
350			`sw x1, 0(x31)`
351			`sw x2, 4(x31)`
352			`sw x28, 8(x31)`
353			`sw x29, 12(x31)`
354			`sw x30, 16(x31)`
355
356			`#RVTEST_IO_ASSERT_GPR_EQ(x1, 0x80001EEC)`
357			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x00000000)`
358			`RVTEST_IO_ASSERT_GPR_EQ(x28, 0x00000001)`
359			`RVTEST_IO_ASSERT_GPR_EQ(x29, 0x00000000)`
360			`RVTEST_IO_ASSERT_GPR_EQ(x30, 0x00000001)`
361
362			`RVTEST_IO_WRITE_STR("# Test part D - Complete\n");`
363
364			`RVTEST_IO_WRITE_STR("# Test End\n")`
365
366			`# ---------------------------------------------------------------------------------------------`
367			`# HALT`
368			`RV_COMPLIANCE_HALT`
369
370			`RV_COMPLIANCE_CODE_END`
371
372			`# Input data section.`
373			`.data`
374			`.align 4`
375
376			`test_A1_data:`
377			`.word 0`
378			`test_A2_data:`
379			`.word 1`
380			`test_A3_data:`
381			`.word -1`
382			`test_A4_data:`
383			`.word 0x7FFFFFFF`
384			`test_A5_data:`
385			`.word 0x80000000`
386			`test_B_data:`
387			`.word 0xFFFFFFFF`
388
389			`# Output data section.`
390			`RV_COMPLIANCE_DATA_BEGIN`
391			`.align 4`
392
393			`test_A1_res:`
394			`.fill 6, 4, -1`
395			`test_A2_res:`
396			`.fill 6, 4, -1`
397			`test_A3_res:`
398			`.fill 6, 4, -1`
399			`test_A4_res:`
400			`.fill 6, 4, -1`
401			`test_A5_res:`
402			`.fill 6, 4, -1`
403			`test_B_res:`
404			`.fill 3, 4, -1`
405			`test_C_res:`
406			`.fill 10, 4, -1`
407			`test_D_res:`
408			`.fill 5, 4, -1`
409
410
411			`RV_COMPLIANCE_DATA_END`