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mballance |
# See LICENSE for license details.
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#*****************************************************************************
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# addw.S
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#-----------------------------------------------------------------------------
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#
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# Test addw instruction.
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#
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#include "riscv_test.h"
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#include "test_macros.h"
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RVTEST_RV64U
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RVTEST_CODE_BEGIN
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#-------------------------------------------------------------
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# Arithmetic tests
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#-------------------------------------------------------------
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TEST_RR_OP( 2, addw, 0x00000000, 0x00000000, 0x00000000 );
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TEST_RR_OP( 3, addw, 0x00000002, 0x00000001, 0x00000001 );
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TEST_RR_OP( 4, addw, 0x0000000a, 0x00000003, 0x00000007 );
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TEST_RR_OP( 5, addw, 0xffffffffffff8000, 0x0000000000000000, 0xffffffffffff8000 );
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TEST_RR_OP( 6, addw, 0xffffffff80000000, 0xffffffff80000000, 0x00000000 );
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TEST_RR_OP( 7, addw, 0x000000007fff8000, 0xffffffff80000000, 0xffffffffffff8000 );
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TEST_RR_OP( 8, addw, 0x0000000000007fff, 0x0000000000000000, 0x0000000000007fff );
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TEST_RR_OP( 9, addw, 0x000000007fffffff, 0x000000007fffffff, 0x0000000000000000 );
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TEST_RR_OP( 10, addw, 0xffffffff80007ffe, 0x000000007fffffff, 0x0000000000007fff );
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TEST_RR_OP( 11, addw, 0xffffffff80007fff, 0xffffffff80000000, 0x0000000000007fff );
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TEST_RR_OP( 12, addw, 0x000000007fff7fff, 0x000000007fffffff, 0xffffffffffff8000 );
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TEST_RR_OP( 13, addw, 0xffffffffffffffff, 0x0000000000000000, 0xffffffffffffffff );
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TEST_RR_OP( 14, addw, 0x0000000000000000, 0xffffffffffffffff, 0x0000000000000001 );
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TEST_RR_OP( 15, addw, 0xfffffffffffffffe, 0xffffffffffffffff, 0xffffffffffffffff );
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TEST_RR_OP( 16, addw, 0xffffffff80000000, 0x0000000000000001, 0x000000007fffffff );
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#-------------------------------------------------------------
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# Source/Destination tests
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#-------------------------------------------------------------
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TEST_RR_SRC1_EQ_DEST( 17, addw, 24, 13, 11 );
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TEST_RR_SRC2_EQ_DEST( 18, addw, 25, 14, 11 );
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TEST_RR_SRC12_EQ_DEST( 19, addw, 26, 13 );
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#-------------------------------------------------------------
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# Bypassing tests
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#-------------------------------------------------------------
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TEST_RR_DEST_BYPASS( 20, 0, addw, 24, 13, 11 );
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TEST_RR_DEST_BYPASS( 21, 1, addw, 25, 14, 11 );
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TEST_RR_DEST_BYPASS( 22, 2, addw, 26, 15, 11 );
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TEST_RR_SRC12_BYPASS( 23, 0, 0, addw, 24, 13, 11 );
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TEST_RR_SRC12_BYPASS( 24, 0, 1, addw, 25, 14, 11 );
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TEST_RR_SRC12_BYPASS( 25, 0, 2, addw, 26, 15, 11 );
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TEST_RR_SRC12_BYPASS( 26, 1, 0, addw, 24, 13, 11 );
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TEST_RR_SRC12_BYPASS( 27, 1, 1, addw, 25, 14, 11 );
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TEST_RR_SRC12_BYPASS( 28, 2, 0, addw, 26, 15, 11 );
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TEST_RR_SRC21_BYPASS( 29, 0, 0, addw, 24, 13, 11 );
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TEST_RR_SRC21_BYPASS( 30, 0, 1, addw, 25, 14, 11 );
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TEST_RR_SRC21_BYPASS( 31, 0, 2, addw, 26, 15, 11 );
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TEST_RR_SRC21_BYPASS( 32, 1, 0, addw, 24, 13, 11 );
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TEST_RR_SRC21_BYPASS( 33, 1, 1, addw, 25, 14, 11 );
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TEST_RR_SRC21_BYPASS( 34, 2, 0, addw, 26, 15, 11 );
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TEST_RR_ZEROSRC1( 35, addw, 15, 15 );
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TEST_RR_ZEROSRC2( 36, addw, 32, 32 );
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TEST_RR_ZEROSRC12( 37, addw, 0 );
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TEST_RR_ZERODEST( 38, addw, 16, 30 );
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TEST_PASSFAIL
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RVTEST_CODE_END
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.data
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RVTEST_DATA_BEGIN
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TEST_DATA
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RVTEST_DATA_END
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