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# RISC-V Compliance Test RV64I-ADDW-01

#

# Copyright (c) 2018, Imperas Software Ltd.

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#

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#      * Redistributions in binary form must reproduce the above copyright

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#

# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS

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#

# Specification: RV64I Base Integer Instruction Set, Version 2.0

# Description: Testing instruction ADDW.

#include "test_macros.h"

#include "compliance_test.h"

#include "compliance_io.h"

RV_COMPLIANCE_RV32M

RV_COMPLIANCE_CODE_BEGIN

        RVTEST_IO_INIT

        RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)

        RVTEST_IO_WRITE_STR("Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")

        # ---------------------------------------------------------------------------------------------

        RVTEST_IO_WRITE_STR("# Test number 1 - corner cases\n")

        # address for test results

        la      x2, test_1_res

        TEST_RR_SRC2(addw, x3, x4, 0, 0x0, 0x0, x2, 0)

        TEST_RR_SRC2(addw, x8, x9, 0x1, 0x0, 0x1, x2, 8)

        TEST_RR_SRC2(addw, x11, x12, 0xffffffffffffffff, 0x0, -0x1, x2, 16)

        TEST_RR_SRC2(addw, x13, x14, 0xffffffffffffffff, 0x0, 0x7fffffffffffffff, x2, 24)

        TEST_RR_SRC2(addw, x15, x16, 0, 0x0, 0x8000000000000000, x2, 32)

        # ---------------------------------------------------------------------------------------------

        RVTEST_IO_WRITE_STR("# Test number 2 - corner cases\n")

        # address for test results

        la      x2, test_2_res

        TEST_RR_SRC2(addw, x17, x18, 0x1, 0x1, 0x0, x2, 0)

        TEST_RR_SRC2(addw, x19, x20, 0x2, 0x1, 0x1, x2, 8)

        TEST_RR_SRC2(addw, x21, x22, 0, 0x1, -0x1, x2, 16)

        TEST_RR_SRC2(addw, x23, x24, 0, 0x1, 0x7fffffffffffffff, x2, 24)

        TEST_RR_SRC2(addw, x25, x26, 0x1, 0x1, 0x8000000000000000, x2, 32)

        # ---------------------------------------------------------------------------------------------

        RVTEST_IO_WRITE_STR("# Test number 3 - corner cases\n")

        # address for test results

        la      x2, test_3_res

        TEST_RR_SRC2(addw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0)

        TEST_RR_SRC2(addw, x29, x30, 0, -0x1, 0x1, x2, 8)

        TEST_RR_SRC2(addw, x31, x3, 0xfffffffffffffffe, -0x1, -0x1, x2, 16)

        TEST_RR_SRC2(addw, x4, x8, 0xfffffffffffffffe, -0x1, 0x7fffffffffffffff, x2, 24)

        TEST_RR_SRC2(addw, x9, x11, 0xffffffffffffffff, -0x1, 0x8000000000000000, x2, 32)

        # ---------------------------------------------------------------------------------------------

        RVTEST_IO_WRITE_STR("# Test number 4 - corner cases\n")

        # address for test results

        la      x2, test_4_res

        TEST_RR_SRC2(addw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0)

        TEST_RR_SRC2(addw, x14, x15, 0, 0x7fffffffffffffff, 0x1, x2, 8)

        TEST_RR_SRC2(addw, x16, x17, 0xfffffffffffffffe, 0x7fffffffffffffff, -0x1, x2, 16)

        TEST_RR_SRC2(addw, x18, x19, 0xfffffffffffffffe, 0x7fffffffffffffff, 0x7fffffffffffffff, x2, 24)

        TEST_RR_SRC2(addw, x20, x21, 0xffffffffffffffff, 0x7fffffffffffffff, 0x8000000000000000, x2, 32)

        # ---------------------------------------------------------------------------------------------

        RVTEST_IO_WRITE_STR("# Test number 5 - corner cases\n")

        # address for test results

        la      x2, test_5_res

        TEST_RR_SRC2(addw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0)

        TEST_RR_SRC2(addw, x24, x25, 0x1, 0x8000000000000000, 0x1, x2, 8)

        TEST_RR_SRC2(addw, x26, x27, 0xffffffffffffffff, 0x8000000000000000, -0x1, x2, 16)

        TEST_RR_SRC2(addw, x28, x29, 0xffffffffffffffff, 0x8000000000000000, 0x7fffffffffffffff, x2, 24)

        TEST_RR_SRC2(addw, x30, x31, 0, 0x8000000000000000, 0x8000000000000000, x2, 32)

        RVTEST_IO_WRITE_STR("Test End\n")

        # ---------------------------------------------------------------------------------------------

        RV_COMPLIANCE_HALT

RV_COMPLIANCE_CODE_END

# Input data section.

        .data

# Output data section.

RV_COMPLIANCE_DATA_BEGIN

test_1_res:

        .fill 5, 8, -1

test_2_res:

        .fill 5, 8, -1

test_3_res:

        .fill 5, 8, -1

test_4_res:

        .fill 5, 8, -1

test_5_res:

        .fill 5, 8, -1

test_6_res:

        .fill 5, 8, -1

test_7_res:

        .fill 5, 8, -1

test_8_res:

        .fill 5, 8, -1

test_9_res:

        .fill 5, 8, -1

test_10_res:

        .fill 5, 8, -1

RV_COMPLIANCE_DATA_END