Subversion Repositories g729a_codec

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-- Copyright (C) 2013 Stefano Tonello                          --

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-- G.729A ASIP logic (boolean) unit

---------------------------------------------------------------

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.numeric_std.all;

library WORK;

use WORK.G729A_ASIP_PKG.all;

use WORK.G729A_ASIP_BASIC_PKG.all;

use WORK.G729A_ASIP_ARITH_PKG.all;

--use WORK.G729A_TYPES_PKG.all;

--use WORK.G729A_BASIC_PKG.all;

--use WORK.G729A_ARITH_PKG.all;

--use WORK.G729A_CODER_PKG.all;

entity G729A_ASIP_LOGIC is

  port(

    --STRT_i : in std_logic;

    CTRL_i : in LOG_CTRL;

    OPA_i : in LDWORD_T;

    OPB_i : in LDWORD_T;

    RES_o : out LDWORD_T

  );

end G729A_ASIP_LOGIC;

architecture ARC of G729A_ASIP_LOGIC is

begin

  process(CTRL_i,OPA_i,OPB_i)

    variable OPA_LO,OPB_LO : signed(SDLEN-1 downto 0);

  begin

    OPA_LO := OPA_i(SDLEN-1 downto 0);

    OPB_LO := OPB_i(SDLEN-1 downto 0);

    case CTRL_i is

      when LC_AND =>

        RES_o(SDLEN-1 downto 0) <= (OPA_LO and OPB_LO);

      when others => --LC_OR

        RES_o(SDLEN-1 downto 0) <= (OPA_LO or OPB_LO);

    end case;

  end process;

  RES_o(LDLEN-1 downto SDLEN) <= (others => '0');

end ARC;